Description

This dissertation focuses on three different efficiency enhancement methods that are applicable to handset applications. These proposed designs are based on three critical requirements for handset application: 1) Small form

This dissertation focuses on three different efficiency enhancement methods that are applicable to handset applications. These proposed designs are based on three critical requirements for handset application: 1) Small form factor, 2) CMOS compatibility and 3) high power handling. The three presented methodologies are listed below:

1) A transformer-based power combiner architecture for out-phasing transmitters

2) A current steering DAC-based average power tracking circuit for on-chip power amplifiers (PA)

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Contributors
Date Created
  • 2019
Resource Type
  • Text
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    Note
    • Partial requirement for: Ph.D., Arizona State University, 2019
      Note type
      thesis
    • Includes bibliographical references (pages 142-149)
      Note type
      bibliography
    • Field of study: Electrical engineering

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    Statement of Responsibility

    by Soroush Moallemi

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