Rail clamp circuits are widely used for electrostatic discharge (ESD) protection in semiconductor products today. A step-by-step design procedure for the traditional RC and single-inverter-based rail clamp circuit and the design, simulation, implementation, and operation of two novel rail clamp circuits are described for use in the ESD protection of complementary metal-oxide-semiconductor (CMOS) circuits.
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- Partial requirement for: Ph.D., Arizona State University, 2016Note typethesis
- Includes bibliographical references (pages 83-86)Note typebibliography
- Field of study: Electrical engineering