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Modern day deep sub-micron SOC architectures often demand very low supply noise levels. As supply voltage decreases with decreasing deep sub-micron gate length, noise on the power supply starts playing a dominant role in noise-sensitive analog blocks, especially high precision ADC, PLL, and RF SOC's.

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    Date Created
    2014
    Resource Type
  • Text
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    Note
    • Partial requirement for: M.S., Arizona State University, 2014
      Note type
      thesis
    • Includes bibliographical references (p. 59-60)
      Note type
      bibliography
    • Field of study: Electrical engineering

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    by Raveesh Magod Ramakrishna

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