Description

Phase locked loops are an integral part of any electronic system that requires a clock signal and find use in a broad range of applications such as clock and data

Phase locked loops are an integral part of any electronic system that requires a clock signal and find use in a broad range of applications such as clock and data recovery circuits for high speed serial I/O and frequency synthesizers for RF transceivers and ADCs. Traditionally, PLLs have been primarily analog in nature and since the development of the charge pump PLL, they have almost exclusively been analog. Recently, however, much research has been focused on ADPLLs because of their scalability, flexibility and higher noise immunity.

Reuse Permissions
  • 1.75 MB application/pdf

    Download count: 0

    Details

    Contributors
    Date Created
    • 2012
    Resource Type
  • Text
  • Collections this item is in
    Note
    • Partial requirement for: M.S., Arizona State University, 2012
      Note type
      thesis
    • Includes bibliographical references (p. 99-102)
      Note type
      bibliography
    • Field of study: Electrical engineering

    Citation and reuse

    Statement of Responsibility

    by Joshua Zazzera

    Machine-readable links