With the emergence of electric transportation and the infrastructure for electric vehicles (EVs), numerous viable approaches and topologies have emerged. In order to improve the power quality of the grid, it is essential for Onboard Battery Chargers (OBC) for electric vehicles to maintain a power factor closer to unity. This study mainly focuses on two prominent PFC topologies, Totem-pole PFC (TPFC) and H-Bridge PFC (HPFC), which are simple to implement and capable enough of providing high operating efficiency. This study elucidates the comprehensive comparison of the TPFC and HPFC converters using the comprehensive mathematical modeling approach, simulation models, and the hardware experiments. Also, the comparison of the EMI filter requirement and design of DM EMI filter for both the topologies is also extensively illustrated in this study. Firstly, focusing the comprehensive mathematical models of TPFC and HPFC converters, which includes the mathematical formation of the duty cycle for both the converters incorporating the discretized input current controller into the mathematical model which gives more closer comparison when it is compared to simulation models and the hardware experiment model operations. The input current FFT analysis and the THD modeling are also covered in the mathematical modeling of TPFC and HPFC converters. Moreover, the EMI noise is modeled, and the corresponding EMI filter is also designed for both the PFC topologies. Further, the simulation models of TPFC and HPFC converters are also developed and the outputs of the simulation models show an input AC current is precisely following the input AC voltage and also the output voltage of constant 400V is attained for both the PFC converters. Similarly, for the experimental results, the constant 400V regulated DC output voltage is obtained and the input AC current is following the input AC voltage with the power factor of 0.983 for TPFC and 0.99 for HPFC converter. Moreover, the implementation of the EMI filter at the front end of the converter succinctly attenuates the EMI noise and complied within the FCC Class A limit for both TPFC and HPFC converters.

Adhering to an ever-increasing demand for innovation in the field of onboard electric vehicle (EV) charging, several technical aspects pertaining to the design and performance enhancement of integrated multi-port charger topologies are discussed in this study. This study also elucidates various research challenges pertaining to each module of the topology and elucidates technically validated solutions for each.Firstly, targeting the input side totempole power factor corrector (TPFC) circuit, a novel digital filter based Active Mitigation Scheme (AMS) is proposed to curb the third harmonic component, along with a novel discretized sampling-based robust control scheme. Experimental verification of these techniques yields an enhanced Total Harmonic Distortion (THD) of 1.68%, enhanced efficiency of 98.1% and resultant power factor of 0.998 (lag).
Further, focusing on the bidirectional CLLC based DC/DC converter topology, a general harmonic approximation (GHA) based secondary side turnoff current minimization technique is discussed. Numerous fabrication and design-based constraints and correlations for parametric modelling of high frequency planar transformer (HFPT) are explained with analytical and 3D Finite Element Analysis (FEA) findings. Further, characterization of the plant transfer function of all-inclusive CLLC model is described along with hybrid Sliding Mode Control (SMC) based control scheme. The steady state experimental results at 1kW rated load show a peak efficiency of 98.49%, while the quantification of dynamic response portray a settling time reduction of 46.4% and an over/undershoot reduction of 33%.
Further, comprehensive modeling of triple active bridge (TAB) DC/DC converter topology is presented with special focus on the control scheme and decoupling capabilities to independently regulate the output bridges. With an objective to reduce the overall losses and to add a dimension of controllability, a three-loop control scheme is proposed with power flow optimization. Inculcating the benefits of multiport and resonant topologies, a comprehensive multi-variable loss optimization study of a Triple Active C^3 L^3 (TAC^3L^3) converter is discussed. The performance of eight different hybrid modulation schemes is compared with respect to the developed global loss minimization objective function. Experimental validations for various loading conditions are presented for a wide-gain bidirectional operation (400V/500-600V/24-28V), portraying a peak converter efficiency of 97.42%.

Wide-BandGap (WBG) material-based switching devices such as gallium nitride (GaN) High Electron Mobility Transistors (HEMTs) and Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are considered very promising and valuable candidates for replacing conventional Silicon (Si) MOSFETs in various industrial high-frequency high-power applications, mainly because of their capabilities of higher switching frequencies with less switching and conduction losses. However, to make the most of their advantages, it is crucial to understand the intrinsic differences between WBG-based and Si-based switching devices and investigate effective means to safely, efficiently, and reliably utilize the WBG devices. Firstly, a comprehensive understanding of traditional Modular Multilevel Converter (MMC) topology is presented. Different novel SubModule (SM) topologies are described in detail. The low frequency SM voltage fluctuation problem is also discussed. Based on the analysis, some novel topologies which manage to damp or eliminate the voltage ripple are illustrated in detail. As demonstrated, simulation results of these proposed topologies verify the theory. Moreover, the hardware design considerations of traditional MMC platform are discussed. Based on these, a 6 kW smart Modular Isolated Multilevel Converter (MIMC) with symmetrical resonant converter based Ripple current elimination channels is delivered and related experimental results further verify the effectiveness of proposed topology. Secondly, the evolution of GaN transistor structure, from classical normally-on device to normally-off GaN, is well-described. As the benefits, channel current capability and drain-source voltage are significantly boosted. However, accompanying the evolution of GaN devices, the dynamic on-resistance issue is one of the urgent problems to be solved since it strongly affects the GaN device current and voltage limit. Unlike traditional methods from the perspective of transistor structure, this report proposes a novel Multi-Level-Voltage-Output gate drive circuit (MVO-GD) aimed at alleviating the dynamic on-resistance issue from engineering point of view. The comparative tests of proposed MVO-GD and the standard 2-level gate driver (STD-GD) are conducted under variable test conditions which may affect dynamic on-resistance, such as drain-source voltage, gate current width, device package temperature and so on. The experimental waveforms and data have been demonstrated and analyzed.