Description
Performance improvements have largely followed Moore's Law due to the help from technology scaling. In order to continue improving performance, power-efficiency must be reduced. Better technology has improved power-efficiency, but this has a limit. Multi-core architectures have been shown to be an additional aid to this crusade of increased power-efficiency.
Download count: 0
Details
Contributors
- Pager, Jared (Author)
- Shrivastava, Aviral (Thesis advisor)
- Gupta, Sandeep (Committee member)
- Speyer, Gil (Committee member)
- Arizona State University (Publisher)
Date Created
The date the item was original created (prior to any relationship with the ASU Digital Repositories.)
2011
Subjects
Resource Type
Collections this item is in
Note
- Partial requirement for: M.S., Arizona State University, 2011Note typethesis
- Includes bibliographical references (p. 65-68)Note typebibliography
- Field of study: Computer science
Citation and reuse
Statement of Responsibility
by Jared Pager