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- All Subjects: engineering
- Genre: Masters Thesis
- Creators: Bakkaloglu, Bertan
- Creators: Karady, George G.
- Status: Published
Description
ABSTRACT To meet stringent market demands, manufacturers must produce Radio Frequency (RF) transceivers that provide wireless communication between electronic components used in consumer products at extremely low cost. Semiconductor manufacturers are in a steady race to increase integration levels through advanced system-on-chip (SoC) technology. The testing costs of these devices tend to increase with higher integration levels. As the integration levels increase and the devices get faster, the need for high-calibre low cost test equipment become highly dominant. However testing the overall system becomes harder and more expensive. Traditionally, the transceiver system is tested in two steps utilizing high-calibre RF instrumentation and mixed-signal testers, with separate measurement setups for transmitter and receiver paths. Impairments in the RF front-end, such as the I/Q gain and phase imbalance and nonlinearity, severely affect the performance of the device. The transceiver needs to be characterized in terms of these impairments in order to guarantee good performance and specification requirements. The motivation factor for this thesis is to come up with a low cost and computationally simple extraction technique of these impairments. In the proposed extraction technique, the mapping between transmitter input signals and receiver output signals are used to extract the impairment and nonlinearity parameters. This is done with the help of detailed mathematical modeling of the transceiver. While the overall behavior is nonlinear, both linear and nonlinear models to be used under different test setups are developed. A two step extraction technique has been proposed in this work. The extraction of system parameters is performed by using the mathematical model developed along with a genetic algorithm implemented in MATLAB. The technique yields good extraction results with reasonable error. It uses simple mathematical operation which makes the extraction fast and computationally simple when compared to other existing techniques such as traditional two step dedicated approach, Nonlinear Solver (NLS) approach, etc. It employs frequency domain analysis of low frequency input and output signals, over cumbersome time domain computations. Thus a test method, including detailed behavioral modeling of the transceiver, appropriate test signal design along with a simple algorithm for extraction is presented.
ContributorsSreenivassan, Aiswariya (Author) / Ozev, Sule (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
Description
The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change to the process. The transition frequency of the device is demonstrated to be 45GHz, which makes the MESFET suitable for applications in high power RF power amplifier designs. Also, high breakdown voltage and low turn-on resistance make it the ideal choice for switches in the switching regulator designs. One of the anticipated applications of the MESFET is for the pass device for a low dropout linear regulator. Conventional NMOS and PMOS linear regulators suffer from high dropout voltage, low bandwidth and poor stability issues. In contrast, the N-MESFET pass transistor can provide an ultra-low dropout voltage and high bandwidth without the need for an external compensation capacitor to ensure stability. In this thesis, the design theory and problems of the conventional linear regulators are discussed. N-MESFET low dropout regulators are evaluated and characterized. The error amplifier used a folded cascode architecture with gain boosting. The source follower topology is utilized as the buffer to sink the gate leakage current from the MESFET. A shunt-feedback transistor is added to reduce the output impedance and provide the current adaptively. Measurement results show that the dropout voltage is less than 150 mV for a 1A load current at 1.8V output. Radiation measurements were done for discrete MESFET and fully integrated LDO regulators, which demonstrate their radiation tolerance ability for aerospace applications.
ContributorsChen, Bo (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
The smart grid initiative is the impetus behind changes that are expected to culminate into an enhanced distribution system with the communication and control infrastructure to support advanced distribution system applications and resources such as distributed generation, energy storage systems, and price responsive loads. This research proposes a distribution-class analog of the transmission LMP (DLMP) as an enabler of the advanced applications of the enhanced distribution system. The DLMP is envisioned as a control signal that can incentivize distribution system resources to behave optimally in a manner that benefits economic efficiency and system reliability and that can optimally couple the transmission and the distribution systems. The DLMP is calculated from a two-stage optimization problem; a transmission system OPF and a distribution system OPF. An iterative framework that ensures accurate representation of the distribution system's price sensitive resources for the transmission system problem and vice versa is developed and its convergence problem is discussed. As part of the DLMP calculation framework, a DCOPF formulation that endogenously captures the effect of real power losses is discussed. The formulation uses piecewise linear functions to approximate losses. This thesis explores, with theoretical proofs, the breakdown of the loss approximation technique when non-positive DLMPs/LMPs occur and discusses a mixed integer linear programming formulation that corrects the breakdown. The DLMP is numerically illustrated in traditional and enhanced distribution systems and its superiority to contemporary pricing mechanisms is demonstrated using price responsive loads. Results show that the impact of the inaccuracy of contemporary pricing schemes becomes significant as flexible resources increase. At high elasticity, aggregate load consumption deviated from the optimal consumption by up to about 45 percent when using a flat or time-of-use rate. Individual load consumption deviated by up to 25 percent when using a real-time price. The superiority of the DLMP is more pronounced when important distribution network conditions are not reflected by contemporary prices. The individual load consumption incentivized by the real-time price deviated by up to 90 percent from the optimal consumption in a congested distribution network. While the DLMP internalizes congestion management, the consumption incentivized by the real-time price caused overloads.
ContributorsAkinbode, Oluwaseyi Wemimo (Author) / Hedman, Kory W (Thesis advisor) / Heydt, Gerald T (Committee member) / Zhang, Muhong (Committee member) / Arizona State University (Publisher)
Created2013
Description
ABSTRACT Ongoing research into wireless transceivers in the 60 GHz band is required to address the demand for high data rate communications systems at a frequency where signal propagation is challenging even over short ranges. This thesis proposes a mixer architecture in Complementary Metal Oxide Semiconductor (CMOS) technology that uses a voltage controlled oscillator (VCO) operating at a fractional multiple of the desired output signal. The proposed topology is different from conventional subharmonic mixing in that the oscillator phase generation circuitry usually required for such a circuit is unnecessary. Analysis and simulations are performed on the proposed mixer circuit in an IBM 90 nm RF process on a 1.2 V supply. A typical RF transmitter system is considered in determining the block requirements needed for the mixer to meet the IEEE 802.11ad 60 GHz Draft Physical Layer Specification. The proposed circuit has a conversion loss of 21 dB at 60 GHz with a 5 dBm LO power at 20 GHz. Input-referred third-order intercept point (IIP3) is 2.93 dBm. The gain and linearity of the proposed mixer are sufficient for Orthogonal Frequency Division Multiplexing (OFDM) modulation at 60 GHz with a transmitted data rate of over 4 Gbps.
ContributorsMartino, Todd Jeffrey (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Aberle, James T., 1961- (Committee member) / Arizona State University (Publisher)
Created2010
Description
Switching surges are a common type of phenomenon that occur on any sort of power system network. These are more pronounced on long transmission lines and in high voltage substations. The problem with switching surges is encountered when a lot of power is transmitted across a transmission line
etwork, typically from a concentrated generation node to a concentrated load. The problem becomes significantly worse when the transmission line is long and when the voltage levels are high, typically above 400 kV. These overvoltage transients occur following any type of switching action such as breaker operation, fault occurrence/clearance and energization, and they pose a very real danger to weakly interconnected systems. At EHV levels, the insulation coordination of such lines is mainly dictated by the peak level of switching surges, the most dangerous of which include three phase line energization and single-phase reclosing. Switching surges can depend on a number of independent and inter-dependent factors like voltage level, line length, tower construction, location along the line, and presence of other equipment like shunt/series reactors and capacitors.
This project discusses the approaches taken and methods applied to observe and tackle the problems associated with switching surges on a long transmission line. A detailed discussion pertaining to different aspects of switching surges and their effects is presented with results from various studies published in IEEE journals and conference papers. Then a series of simulations are presented to determine an arrangement of substation equipment with respect to incoming transmission lines; that correspond to the lowest surge levels at that substation.
etwork, typically from a concentrated generation node to a concentrated load. The problem becomes significantly worse when the transmission line is long and when the voltage levels are high, typically above 400 kV. These overvoltage transients occur following any type of switching action such as breaker operation, fault occurrence/clearance and energization, and they pose a very real danger to weakly interconnected systems. At EHV levels, the insulation coordination of such lines is mainly dictated by the peak level of switching surges, the most dangerous of which include three phase line energization and single-phase reclosing. Switching surges can depend on a number of independent and inter-dependent factors like voltage level, line length, tower construction, location along the line, and presence of other equipment like shunt/series reactors and capacitors.
This project discusses the approaches taken and methods applied to observe and tackle the problems associated with switching surges on a long transmission line. A detailed discussion pertaining to different aspects of switching surges and their effects is presented with results from various studies published in IEEE journals and conference papers. Then a series of simulations are presented to determine an arrangement of substation equipment with respect to incoming transmission lines; that correspond to the lowest surge levels at that substation.
ContributorsShaikh, Mohammed Mubashir (Author) / Qin, Jiangchao (Thesis advisor) / Heydt, Gerald T (Committee member) / Lei, Qin (Committee member) / Arizona State University (Publisher)
Created2018
Description
The demand for cleaner energy technology is increasing very rapidly. Hence it is
important to increase the eciency and reliability of this emerging clean energy technologies.
This thesis focuses on modeling and reliability of solar micro inverters. In
order to make photovoltaics (PV) cost competitive with traditional energy sources,
the economies of scale have been guiding inverter design in two directions: large,
centralized, utility-scale (500 kW) inverters vs. small, modular, module level (300
W) power electronics (MLPE). MLPE, such as microinverters and DC power optimizers,
oer advantages in safety, system operations and maintenance, energy yield,
and component lifetime due to their smaller size, lower power handling requirements,
and module-level power point tracking and monitoring capability [1]. However, they
suer from two main disadvantages: rst, depending on array topology (especially
the proximity to the PV module), they can be subjected to more extreme environments
(i.e. temperature cycling) during the day, resulting in a negative impact to
reliability; second, since solar installations can have tens of thousands to millions of
modules (and as many MLPE units), it may be dicult or impossible to track and
repair units as they go out of service. Therefore identifying the weak links in this
system is of critical importance to develop more reliable micro inverters.
While an overwhelming majority of time and research has focused on PV module
eciency and reliability, these issues have been largely ignored for the balance
of system components. As a relatively nascent industry, the PV power electronics
industry does not have the extensive, standardized reliability design and testing procedures
that exist in the module industry or other more mature power electronics
industries (e.g. automotive). To do so, the critical components which are at risk and
their impact on the system performance has to be studied. This thesis identies and
addresses some of the issues related to reliability of solar micro inverters.
This thesis presents detailed discussions on various components of solar micro inverter
and their design. A micro inverter with very similar electrical specications in
comparison with commercial micro inverter is modeled in detail and veried. Components
in various stages of micro inverter are listed and their typical failure mechanisms
are reviewed. A detailed FMEA is conducted for a typical micro inverter to identify
the weak links of the system. Based on the S, O and D metrics, risk priority number
(RPN) is calculated to list the critical at-risk components. Degradation of DC bus
capacitor is identied as one the failure mechanism and the degradation model is built
to study its eect on the system performance. The system is tested for surge immunity
using standard ring and combinational surge waveforms as per IEEE 62.41 and
IEC 61000-4-5 standards. All the simulation presented in this thesis is performed
using PLECS simulation software.
important to increase the eciency and reliability of this emerging clean energy technologies.
This thesis focuses on modeling and reliability of solar micro inverters. In
order to make photovoltaics (PV) cost competitive with traditional energy sources,
the economies of scale have been guiding inverter design in two directions: large,
centralized, utility-scale (500 kW) inverters vs. small, modular, module level (300
W) power electronics (MLPE). MLPE, such as microinverters and DC power optimizers,
oer advantages in safety, system operations and maintenance, energy yield,
and component lifetime due to their smaller size, lower power handling requirements,
and module-level power point tracking and monitoring capability [1]. However, they
suer from two main disadvantages: rst, depending on array topology (especially
the proximity to the PV module), they can be subjected to more extreme environments
(i.e. temperature cycling) during the day, resulting in a negative impact to
reliability; second, since solar installations can have tens of thousands to millions of
modules (and as many MLPE units), it may be dicult or impossible to track and
repair units as they go out of service. Therefore identifying the weak links in this
system is of critical importance to develop more reliable micro inverters.
While an overwhelming majority of time and research has focused on PV module
eciency and reliability, these issues have been largely ignored for the balance
of system components. As a relatively nascent industry, the PV power electronics
industry does not have the extensive, standardized reliability design and testing procedures
that exist in the module industry or other more mature power electronics
industries (e.g. automotive). To do so, the critical components which are at risk and
their impact on the system performance has to be studied. This thesis identies and
addresses some of the issues related to reliability of solar micro inverters.
This thesis presents detailed discussions on various components of solar micro inverter
and their design. A micro inverter with very similar electrical specications in
comparison with commercial micro inverter is modeled in detail and veried. Components
in various stages of micro inverter are listed and their typical failure mechanisms
are reviewed. A detailed FMEA is conducted for a typical micro inverter to identify
the weak links of the system. Based on the S, O and D metrics, risk priority number
(RPN) is calculated to list the critical at-risk components. Degradation of DC bus
capacitor is identied as one the failure mechanism and the degradation model is built
to study its eect on the system performance. The system is tested for surge immunity
using standard ring and combinational surge waveforms as per IEEE 62.41 and
IEC 61000-4-5 standards. All the simulation presented in this thesis is performed
using PLECS simulation software.
ContributorsManchanahalli Ranganatha, Arkanatha Sastry (Author) / Ayyanar, Raja (Thesis advisor) / Karady, George G. (Committee member) / Qin, Jiangchao (Committee member) / Arizona State University (Publisher)
Created2015
Description
Shunt capacitors are often added in transmission networks at suitable locations to improve the voltage profile. In this thesis, the transmission system in Arizona is considered as a test bed. Many shunt capacitors already exist in the Arizona transmission system and more are planned to be added. Addition of these shunt capacitors may create resonance conditions in response to harmonic voltages and currents. Such resonance, if it occurs, may create problematic issues in the system. It is main objective of this thesis to identify potential problematic effects that could occur after placing new shunt capacitors at selected buses in the Arizona network. Part of the objective is to create a systematic plan for avoidance of resonance issues.
For this study, a method of capacitance scan is proposed. The bus admittance matrix is used as a model of the networked transmission system. The calculations on the admittance matrix were done using Matlab. The test bed is the actual transmission system in Arizona; however, for proprietary reasons, bus names are masked in the thesis copy in-tended for the public domain. The admittance matrix was obtained from data using the PowerWorld Simulator after equivalencing the 2016 summer peak load (planning case). The full Western Electricity Coordinating Council (WECC) system data were used. The equivalencing procedure retains only the Arizona portion of the WECC.
The capacitor scan results for single capacitor placement and multiple capacitor placement cases are presented. Problematic cases are identified in the form of ‘forbidden response. The harmonic voltage impact of known sources of harmonics, mainly large scale HVDC sources, is also presented.
Specific key results for the study indicated include:
• The forbidden zones obtained as per the IEEE 519 standard indicates the bus 10 to be the most problematic bus.
• The forbidden zones also indicate that switching values for the switched shunt capacitor (if used) at bus 3 should be should be considered carefully to avoid resonance condition from existing.
• The highest sensitivity of 0.0033 per unit for HVDC sources of harmonics was observed at bus 7 when all the HVDC sources were active at the same time.
For this study, a method of capacitance scan is proposed. The bus admittance matrix is used as a model of the networked transmission system. The calculations on the admittance matrix were done using Matlab. The test bed is the actual transmission system in Arizona; however, for proprietary reasons, bus names are masked in the thesis copy in-tended for the public domain. The admittance matrix was obtained from data using the PowerWorld Simulator after equivalencing the 2016 summer peak load (planning case). The full Western Electricity Coordinating Council (WECC) system data were used. The equivalencing procedure retains only the Arizona portion of the WECC.
The capacitor scan results for single capacitor placement and multiple capacitor placement cases are presented. Problematic cases are identified in the form of ‘forbidden response. The harmonic voltage impact of known sources of harmonics, mainly large scale HVDC sources, is also presented.
Specific key results for the study indicated include:
• The forbidden zones obtained as per the IEEE 519 standard indicates the bus 10 to be the most problematic bus.
• The forbidden zones also indicate that switching values for the switched shunt capacitor (if used) at bus 3 should be should be considered carefully to avoid resonance condition from existing.
• The highest sensitivity of 0.0033 per unit for HVDC sources of harmonics was observed at bus 7 when all the HVDC sources were active at the same time.
ContributorsPatil, Hardik U (Author) / Heydt, Gerald T (Thesis advisor) / Karady, George G. (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2015
Description
Underground transmission cables in power systems are less likely to experience electrical faults, however, resulting outage times are much greater in the event that a failure does occur. Unlike overhead lines, underground cables are not self-healing from flashover events. The faulted section must be located and repaired before the line can be put back into service. Since this will often require excavation of the underground duct bank, the procedure to repair the faulted section is both costly and time consuming. These added complications are the prime motivators for developing accurate and reliable ratings for underground cable circuits.
This work will review the methods by which power ratings, or ampacity, for underground cables are determined and then evaluate those ratings by making comparison with measured data taken from an underground 69 kV cable, which is part of the Salt River Project (SRP) power subtransmission system. The process of acquiring, installing, and commissioning the temperature monitoring system is covered in detail as well. The collected data are also used to evaluate typical assumptions made when determining underground cable ratings such as cable hot-spot location and ambient temperatures.
Analysis results show that the commonly made assumption that the deepest portion of an underground power cable installation will be the hot-spot location does not always hold true. It is shown that distributed cable temperature measurements can be used to locate the proper line segment to be used for cable ampacity calculations.
This work will review the methods by which power ratings, or ampacity, for underground cables are determined and then evaluate those ratings by making comparison with measured data taken from an underground 69 kV cable, which is part of the Salt River Project (SRP) power subtransmission system. The process of acquiring, installing, and commissioning the temperature monitoring system is covered in detail as well. The collected data are also used to evaluate typical assumptions made when determining underground cable ratings such as cable hot-spot location and ambient temperatures.
Analysis results show that the commonly made assumption that the deepest portion of an underground power cable installation will be the hot-spot location does not always hold true. It is shown that distributed cable temperature measurements can be used to locate the proper line segment to be used for cable ampacity calculations.
ContributorsStowers, Travis (Author) / Tylavsky, Daniel (Thesis advisor) / Karady, George G. (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2015
Description
This work implements three switched mode power amplifier topologies namely inverse class-D (CMCD), push-pull class-E and inverse push-pull class-E, in a GaN-on-Si process for medium power level (5-10W) femto/pico-cells base-station applications. The presented power amplifiers address practical implementation design constraints and explore the fundamental performance limitations of switched-mode power amplifiers for cellular band. The designs are analyzed and compared with respect to non-idealities like finite on-resistance, finite-Q of inductors, bond-wire effects, input signal duty cycle, and supply and component variations. These architectures are designed for non-constant envelope inputs in the form of digitally modulated signals such as RFPWM, which undergo duty cycle variation. After comparing the three topologies, this work concludes that the inverse push-pull class-E power amplifier shows lower efficiency degradation at reduced duty cycles. For GaN based discrete power amplifiers which have less drain capacitance compared to GaAs or CMOS and where the switch loss is dominated by wire-bonds, an inverse push-pull class-E gives highest output power at highest efficiency. Push-pull class-E can give efficiencies comparable to inverse push-pull class-E in presence of bondwires on tuning the Zero-Voltage Switching (ZVS) network components but at a lower output power. Current-Mode Class-D (CMCD) is affected most by the presence of bondwires and gives least output power and efficiency compared to other two topologies. For systems dominated by drain capacitance loss or which has no bondwires, the CMCD and push-pull class-E gives better output power than inverse push-pull class-E. However, CMCD is more suitable for high breakdown voltage process.
ContributorsShukla, Shishir Ramasare (Author) / Kitchen, Jennifer N (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Trichopoulos, Georgios (Committee member) / Arizona State University (Publisher)
Created2015
Description
With the growing importance of underground power systems and the need for greater reliability of the power supply, cable monitoring and accurate fault location detection has become an increasingly important issue. The presence of inherent random fluctuations in power system signals can be used to extract valuable information about the condition of system equipment. One such component is the power cable, which is the primary focus of this research.
This thesis investigates a unique methodology that allows online monitoring of an underground power cable. The methodology analyzes conventional power signals in the frequency domain to monitor the condition of a power cable.
First, the proposed approach is analyzed theoretically with the help of mathematical computations. Frequency domain analysis techniques are then used to compute the power spectral density (PSD) of the system signals. The importance of inherent noise in the system, a key requirement of this methodology, is also explained. The behavior of resonant frequencies, which are unique to every system, are then analyzed under different system conditions with the help of mathematical expressions.
Another important aspect of this methodology is its ability to accurately estimate cable fault location. The process is online and hence does not require the system to be disconnected from the grid. A single line to ground fault case is considered and the trend followed by the resonant frequencies for different fault positions is observed.
The approach is initially explained using theoretical calculations followed by simulations in MATLAB/Simulink. The validity of this technique is proved by comparing the results obtained from theory and simulation to actual measurement data.
This thesis investigates a unique methodology that allows online monitoring of an underground power cable. The methodology analyzes conventional power signals in the frequency domain to monitor the condition of a power cable.
First, the proposed approach is analyzed theoretically with the help of mathematical computations. Frequency domain analysis techniques are then used to compute the power spectral density (PSD) of the system signals. The importance of inherent noise in the system, a key requirement of this methodology, is also explained. The behavior of resonant frequencies, which are unique to every system, are then analyzed under different system conditions with the help of mathematical expressions.
Another important aspect of this methodology is its ability to accurately estimate cable fault location. The process is online and hence does not require the system to be disconnected from the grid. A single line to ground fault case is considered and the trend followed by the resonant frequencies for different fault positions is observed.
The approach is initially explained using theoretical calculations followed by simulations in MATLAB/Simulink. The validity of this technique is proved by comparing the results obtained from theory and simulation to actual measurement data.
ContributorsGovindarajan, Sudarshan (Author) / Holbert, Keith E. (Thesis advisor) / Heydt, Gerald (Committee member) / Karady, George G. (Committee member) / Arizona State University (Publisher)
Created2016