This collection includes both ASU Theses and Dissertations, submitted by graduate students, and the Barrett, Honors College theses submitted by undergraduate students. 

Displaying 1 - 10 of 98
151771-Thumbnail Image.png
Description
This research examines the current challenges of using Lamb wave interrogation methods to localize fatigue crack damage in a complex metallic structural component subjected to unknown temperatures. The goal of this work is to improve damage localization results for a structural component interrogated at an unknown temperature, by developing a

This research examines the current challenges of using Lamb wave interrogation methods to localize fatigue crack damage in a complex metallic structural component subjected to unknown temperatures. The goal of this work is to improve damage localization results for a structural component interrogated at an unknown temperature, by developing a probabilistic and reference-free framework for estimating Lamb wave velocities and the damage location. The methodology for damage localization at unknown temperatures includes the following key elements: i) a model that can describe the change in Lamb wave velocities with temperature; ii) the extension of an advanced time-frequency based signal processing technique for enhanced time-of-flight feature extraction from a dispersive signal; iii) the development of a Bayesian damage localization framework incorporating data association and sensor fusion. The technique requires no additional transducers to be installed on a structure, and allows for the estimation of both the temperature and the wave velocity in the component. Additionally, the framework of the algorithm allows it to function completely in an unsupervised manner by probabilistically accounting for all measurement origin uncertainty. The novel algorithm was experimentally validated using an aluminum lug joint with a growing fatigue crack. The lug joint was interrogated using piezoelectric transducers at multiple fatigue crack lengths, and at temperatures between 20°C and 80°C. The results showed that the algorithm could accurately predict the temperature and wave speed of the lug joint. The localization results for the fatigue damage were found to correlate well with the true locations at long crack lengths, but loss of accuracy was observed in localizing small cracks due to time-of-flight measurement errors. To validate the algorithm across a wider range of temperatures the electromechanically coupled LISA/SIM model was used to simulate the effects of temperatures. The numerical results showed that this approach would be capable of experimentally estimating the temperature and velocity in the lug joint for temperatures from -60°C to 150°C. The velocity estimation algorithm was found to significantly increase the accuracy of localization at temperatures above 120°C when error due to incorrect velocity selection begins to outweigh the error due to time-of-flight measurements.
ContributorsHensberry, Kevin (Author) / Chattopadhyay, Aditi (Thesis advisor) / Liu, Yongming (Committee member) / Papandreou-Suppappola, Antonia (Committee member) / Arizona State University (Publisher)
Created2013
152510-Thumbnail Image.png
Description
Aluminum alloys and their composites are attractive materials for applications requiring high strength-to-weight ratios and reasonable cost. Many of these applications, such as those in the aerospace industry, undergo fatigue loading. An understanding of the microstructural damage that occurs in these materials is critical in assessing their fatigue resistance. Two

Aluminum alloys and their composites are attractive materials for applications requiring high strength-to-weight ratios and reasonable cost. Many of these applications, such as those in the aerospace industry, undergo fatigue loading. An understanding of the microstructural damage that occurs in these materials is critical in assessing their fatigue resistance. Two distinct experimental studies were performed to further the understanding of fatigue damage mechanisms in aluminum alloys and their composites, specifically fracture and plasticity. Fatigue resistance of metal matrix composites (MMCs) depends on many aspects of composite microstructure. Fatigue crack growth behavior is particularly dependent on the reinforcement characteristics and matrix microstructure. The goal of this work was to obtain a fundamental understanding of fatigue crack growth behavior in SiC particle-reinforced 2080 Al alloy composites. In situ X-ray synchrotron tomography was performed on two samples at low (R=0.1) and at high (R=0.6) R-ratios. The resulting reconstructed images were used to obtain three-dimensional (3D) rendering of the particles and fatigue crack. Behaviors of the particles and crack, as well as their interaction, were analyzed and quantified. Four-dimensional (4D) visual representations were constructed to aid in the overall understanding of damage evolution. During fatigue crack growth in ductile materials, a plastic zone is created in the region surrounding the crack tip. Knowledge of the plastic zone is important for the understanding of fatigue crack formation as well as subsequent growth behavior. The goal of this work was to quantify the 3D size and shape of the plastic zone in 7075 Al alloys. X-ray synchrotron tomography and Laue microdiffraction were used to non-destructively characterize the volume surrounding a fatigue crack tip. The precise 3D crack profile was segmented from the reconstructed tomography data. Depth-resolved Laue patterns were obtained using differential-aperture X-ray structural microscopy (DAXM), from which peak-broadening characteristics were quantified. Plasticity, as determined by the broadening of diffracted peaks, was mapped in 3D. Two-dimensional (2D) maps of plasticity were directly compared to the corresponding tomography slices. A 3D representation of the plastic zone surrounding the fatigue crack was generated by superimposing the mapped plasticity on the 3D crack profile.
ContributorsHruby, Peter (Author) / Chawla, Nikhilesh (Thesis advisor) / Solanki, Kiran (Committee member) / Liu, Yongming (Committee member) / Arizona State University (Publisher)
Created2014
152800-Thumbnail Image.png
Description
To uncover the neural correlates to go-directed behavior, single unit action potentials are considered fundamental computing units and have been examined by different analytical methodologies under a broad set of hypotheses. Using a behaving rat performing a directional choice learning task, we aim to study changes in rat's cortical neural

To uncover the neural correlates to go-directed behavior, single unit action potentials are considered fundamental computing units and have been examined by different analytical methodologies under a broad set of hypotheses. Using a behaving rat performing a directional choice learning task, we aim to study changes in rat's cortical neural patterns while he improved his task performance accuracy from chance to 80% or higher. Specifically, simultaneous multi-channel single unit neural recordings from the rat's agranular medial (AGm) and Agranular lateral (AGl) cortices were analyzed using joint peristimulus time histogram (JPSTHs), which effectively unveils firing coincidences in neural action potentials. My results based on data from six rats revealed that coincidences of pair-wise neural action potentials are higher when rats were performing the task than they were not at the learning stage, and this trend abated after the rats learned the task. Another finding is that the coincidences at the learning stage are stronger than that when the rats learned the task especially when they were performing the task. Therefore, this coincidence measure is the highest when the rats were performing the task at the learning stage. This may suggest that neural coincidences play a role in the coordination and communication among populations of neurons engaged in a purposeful act. Additionally, attention and working memory may have contributed to the modulation of neural coincidences during the designed task.
ContributorsCheng, Bing (Author) / Si, Jennie (Thesis advisor) / Chae, Junseok (Committee member) / Seo, Jae-Sun (Committee member) / Arizona State University (Publisher)
Created2014
152962-Thumbnail Image.png
Description
This research focuses on the benefits of using nanocomposites in aerospace structural components to prevent or delay the onset of unique composite failure modes, such as delamination. Analytical, numerical, and experimental analyses were conducted to provide a comprehensive understanding of how carbon nanotubes (CNTs) can provide additional structural integrity when

This research focuses on the benefits of using nanocomposites in aerospace structural components to prevent or delay the onset of unique composite failure modes, such as delamination. Analytical, numerical, and experimental analyses were conducted to provide a comprehensive understanding of how carbon nanotubes (CNTs) can provide additional structural integrity when they are used in specific hot spots within a structure. A multiscale approach was implemented to determine the mechanical and thermal properties of the nanocomposites, which were used in detailed finite element models (FEMs) to analyze interlaminar failures in T and Hat section stringers. The delamination that first occurs between the tow filler and the bondline between the stringer and skin was of particular interest. Both locations are considered to be hot spots in such structural components, and failures tend to initiate from these areas. In this research, nanocomposite use was investigated as an alternative to traditional methods of suppressing delamination. The stringer was analyzed under different loading conditions and assuming different structural defects. Initial damage, defined as the first drop in the load displacement curve was considered to be a useful variable to compare the different behaviors in this study and was detected via the virtual crack closure technique (VCCT) implemented in the FE analysis.

Experiments were conducted to test T section skin/stringer specimens under pull-off loading, replicating those used in composite panels as stiffeners. Two types of designs were considered: one using pure epoxy to fill the tow region and another that used nanocomposite with 5 wt. % CNTs. The response variable in the tests was the initial damage. Detailed analyses were conducted using FEMs to correlate with the experimental data. The correlation between both the experiment and model was satisfactory. Finally, the effects of thermal cure and temperature variation on nanocomposite structure behavior were studied, and both variables were determined to influence the nanocomposite structure performance.
ContributorsHasan, Zeaid (Author) / Chattopadhyay, Aditi (Thesis advisor) / Dai, Lenore (Committee member) / Jiang, Hanqing (Committee member) / Rajadas, John (Committee member) / Liu, Yongming (Committee member) / Arizona State University (Publisher)
Created2014
152922-Thumbnail Image.png
Description
Photovoltaic (PV) systems are affected by converter losses, partial shading and other mismatches in the panels. This dissertation introduces a sub-panel maximum power point tracking (MPPT) architecture together with an integrated CMOS current sensor circuit on a chip to reduce the mismatch effects, losses and increase the efficiency of the

Photovoltaic (PV) systems are affected by converter losses, partial shading and other mismatches in the panels. This dissertation introduces a sub-panel maximum power point tracking (MPPT) architecture together with an integrated CMOS current sensor circuit on a chip to reduce the mismatch effects, losses and increase the efficiency of the PV system. The sub-panel MPPT increases the efficiency of the PV during the shading and replaces the bypass diodes in the panels with an integrated MPPT and DC-DC regulator. For the integrated MPPT and regulator, the research developed an integrated standard CMOS low power and high common mode range Current-to-Digital Converter (IDC) circuit and its application for DC-DC regulator and MPPT. The proposed charge based CMOS switched-capacitor circuit directly digitizes the output current of the DC-DC regulator without an analog-to-digital converter (ADC) and the need for high-voltage process technology. Compared to the resistor based current-sensing methods that requires current-to-voltage circuit, gain block and ADC, the proposed CMOS IDC is a low-power efficient integrated circuit that achieves high resolution, lower complexity, and lower power consumption. The IDC circuit is fabricated on a 0.7 um CMOS process, occupies 2mm x 2mm and consumes less than 27mW. The IDC circuit has been tested and used for boost DC-DC regulator and MPPT for photo-voltaic system. The DC-DC converter has an efficiency of 95%. The sub-module level power optimization improves the output power of a shaded panel by up to 20%, compared to panel MPPT with bypass diodes.
ContributorsMarti-Arbona, Edgar (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kitchen, Jennifer (Committee member) / Seo, Jae-Sun (Committee member) / Arizona State University (Publisher)
Created2014
153490-Thumbnail Image.png
Description
This work describes the development of automated flows to generate pad rings, mixed signal power grids, and mega cells in a multi-project test chip. There were three major design flows that were created to create the test chip. The first was the pad ring which was used as the staring

This work describes the development of automated flows to generate pad rings, mixed signal power grids, and mega cells in a multi-project test chip. There were three major design flows that were created to create the test chip. The first was the pad ring which was used as the staring block for creating the test chip. This flow put all of the signals for the chip in the order that was wanted along the outside of the die along with creation of the power ring that is used to supply the chip with a robust power source.

The second flow that was created was used to put together a flash block that is based off of a XILIX XCFXXP. This flow was somewhat similar to how the pad ring flow worked except that optimizations and a clock tree was added into the flow. There was a couple of design redoes due to timing and orientation constraints.

Finally, the last flow that was created was the top level flow which is where all of the components are combined together to create a finished test chip ready for fabrication. The main components that were used were the finished flash block, HERMES, test structures, and a clock instance along with the pad ring flow for the creation of the pad ring and power ring.

Also discussed is some work that was done on a previous multi-project test chip. The work that was done was the creation of power gaters that were used like switches to turn the power on and off for some flash modules. To control the power gaters the functionality change of some pad drivers was done so that they output a higher voltage than what is seen in the core of the chip.
ContributorsLieb, Christopher (Author) / Clark, Lawrence (Thesis advisor) / Holbert, Keith E. (Committee member) / Seo, Jae-Sun (Committee member) / Arizona State University (Publisher)
Created2015
153099-Thumbnail Image.png
Description
In this dissertation, the results of our comprehensive computational studies of disordered jammed (i.e., mechanically stable) packings of hard particles are presented, including the family of superdisks in 2D and ellipsoids in 3D Euclidean space. Following a very brief introduction to the hard-particle systems, the event driven molecular dynamics (EDMD)

In this dissertation, the results of our comprehensive computational studies of disordered jammed (i.e., mechanically stable) packings of hard particles are presented, including the family of superdisks in 2D and ellipsoids in 3D Euclidean space. Following a very brief introduction to the hard-particle systems, the event driven molecular dynamics (EDMD) employed to generate the packing ensembles will be discussed. A large number of 2D packing configurations of superdisks are subsequently analyzed, through which a relatively accurate theoretical scheme for packing-fraction prediction based on local particle contact configurations is proposed and validated via additional numerical simulations. Moreover, the studies on binary ellipsoid packing in 3D are briefly discussed and the effects of different geometrical parameters on the final packing fraction are analyzed.
ContributorsXu, Yaopengxiao (Author) / Jiao, Yang (Thesis advisor) / Oswald, Jay (Committee member) / Liu, Yongming (Committee member) / Arizona State University (Publisher)
Created2014
153039-Thumbnail Image.png
Description
Switching Converters (SC) are an excellent choice for hand held devices due to their high power conversion efficiency. However, they suffer from two major drawbacks. The first drawback is that their dynamic response is sensitive to variations in inductor (L) and capacitor (C) values. A cost effective solution is implemented

Switching Converters (SC) are an excellent choice for hand held devices due to their high power conversion efficiency. However, they suffer from two major drawbacks. The first drawback is that their dynamic response is sensitive to variations in inductor (L) and capacitor (C) values. A cost effective solution is implemented by designing a programmable digital controller. Despite variations in L and C values, the target dynamic response can be achieved by computing and programming the filter coefficients for a particular L and C. Besides, digital controllers have higher immunity to environmental changes such as temperature and aging of components. The second drawback of SCs is their poor efficiency during low load conditions if operated in Pulse Width Modulation (PWM) mode. However, if operated in Pulse Frequency Modulation (PFM) mode, better efficiency numbers can be achieved. A mostly-digital way of detecting PFM mode is implemented. Besides, a slow serial interface to program the chip, and a high speed serial interface to characterize mixed signal blocks as well as to ship data in or out for debug purposes are designed. The chip is taped out in 0.18µm IBM's radiation hardened CMOS process technology. A test board is built with the chip, external power FETs and driver IC. At the time of this writing, PWM operation, PFM detection, transitions between PWM and PFM, and both serial interfaces are validated on the test board.
ContributorsMumma Reddy, Abhiram (Author) / Bakkaloglu, Bertan (Thesis advisor) / Ogras, Umit Y. (Committee member) / Seo, Jae-Sun (Committee member) / Arizona State University (Publisher)
Created2014
153021-Thumbnail Image.png
Description
The focus of this investigation is on the formulation and a validation of reduced order models (ROMs) for the prediction of the response of structures with embedded piezoelectric actuators. The ROMs considered here are those constructed in a nonintrusive manner from a commercial finite element software, NASTRAN is adopted here.

The focus of this investigation is on the formulation and a validation of reduced order models (ROMs) for the prediction of the response of structures with embedded piezoelectric actuators. The ROMs considered here are those constructed in a nonintrusive manner from a commercial finite element software, NASTRAN is adopted here. Notwithstanding the popularity of piezoelectric materials in structural dynamics related applications such as structural health monitoring and energy harvesting, not all commercial finite element software allow directly their modeling. In such cases, e.g., with NASTRAN, one can proceed with an analogy and replace the electric actuation in the piezoelectric material by a fictitious thermal effect producing the same strain. This process recasts the determination of a ROM for a structure with embedded piezoelectric actuator into a similar ROM but for a heated structure, the framework of which has recently been developed. Yet, the temperature field resulting from the analogy would be quite different from the one considered in past effort and would excite a broad array of structural modes. Accordingly, as a preamble to considering a beam with a piezoelectric layer, a simpler plate model is considered that is subjected to a uniform temperature but a complex pressure loading that excites the entire set of modes of the plate in the broad frequency band considered. The very good match of the predictions obtained by this ROM in comparison to their full finite element counterparts provides the necessary confidence to next address a beam with embedded piezoelectic actuator. The test model considered for this validation is a built-up nano beam analyzed recently in nonlinear geometric conditions by full finite elements and by a non-intrusive ROM procedure under harmonic variations of the piezoelectic voltage. This structural model and its loading conditions are very different from those considered in past applications of nonintrusive ROMs, thus the excellent results obtained here provide further support of the broad generality of the nonintrusive ROM methodology, including of the appropriateness of the "dual modes" basis functions.
ContributorsVyas, Varun (Author) / Mignolet, Marc (Thesis advisor) / Hollkamp, Joseph (Committee member) / Liu, Yongming (Committee member) / Arizona State University (Publisher)
Created2014
153288-Thumbnail Image.png
Description
Register file (RF) memory is important in low power system on chip (SOC) due to its

inherent low voltage stability. Moreover, designs increasingly use compiled instead of custom memory blocks, which frequently employ static, rather than pre-charged dynamic RFs. In this work, the various RFs designed for a microprocessor cache and

Register file (RF) memory is important in low power system on chip (SOC) due to its

inherent low voltage stability. Moreover, designs increasingly use compiled instead of custom memory blocks, which frequently employ static, rather than pre-charged dynamic RFs. In this work, the various RFs designed for a microprocessor cache and register files are discussed. Comparison between static and dynamic RF power dissipation and timing characteristics is also presented. The relative timing and power advantages of the designs are shown to be dependent on the memory aspect ratio, i.e. array width and height.
ContributorsVashishtha, Vinay (Author) / Clark, Lawrence T. (Thesis advisor) / Seo, Jae-Sun (Committee member) / Ogras, Umit Y. (Committee member) / Arizona State University (Publisher)
Created2014