ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
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- Creators: Bakkaloglu, Bertan
Description
This work implements three switched mode power amplifier topologies namely inverse class-D (CMCD), push-pull class-E and inverse push-pull class-E, in a GaN-on-Si process for medium power level (5-10W) femto/pico-cells base-station applications. The presented power amplifiers address practical implementation design constraints and explore the fundamental performance limitations of switched-mode power amplifiers for cellular band. The designs are analyzed and compared with respect to non-idealities like finite on-resistance, finite-Q of inductors, bond-wire effects, input signal duty cycle, and supply and component variations. These architectures are designed for non-constant envelope inputs in the form of digitally modulated signals such as RFPWM, which undergo duty cycle variation. After comparing the three topologies, this work concludes that the inverse push-pull class-E power amplifier shows lower efficiency degradation at reduced duty cycles. For GaN based discrete power amplifiers which have less drain capacitance compared to GaAs or CMOS and where the switch loss is dominated by wire-bonds, an inverse push-pull class-E gives highest output power at highest efficiency. Push-pull class-E can give efficiencies comparable to inverse push-pull class-E in presence of bondwires on tuning the Zero-Voltage Switching (ZVS) network components but at a lower output power. Current-Mode Class-D (CMCD) is affected most by the presence of bondwires and gives least output power and efficiency compared to other two topologies. For systems dominated by drain capacitance loss or which has no bondwires, the CMCD and push-pull class-E gives better output power than inverse push-pull class-E. However, CMCD is more suitable for high breakdown voltage process.
ContributorsShukla, Shishir Ramasare (Author) / Kitchen, Jennifer N (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Trichopoulos, Georgios (Committee member) / Arizona State University (Publisher)
Created2015
Description
Impedance is one of the fundamental properties of electrical components, materials, and waves. Therefore, impedance measurement and monitoring have a wide range of applications. The multi-port technique is a natural candidate for impedance measurement and monitoring due to its low overhead and ease of implementation for Built-in Self-Test (BIST) applications. The multi-port technique can measure complex reflection coefficients, thus impedance, by using scalar measurements provided by the power detectors. These power detectors are strategically placed on different points (ports) of a passive network to produce unique solution. Impedance measurement and monitoring is readily deployed on mobile phone radio-frequency (RF) front ends, and are combined with antenna tuners to boost the signal reception capabilities of phones. These sensors also can be used in self-healing circuits to improve their yield and performance under process, voltage, and temperature variations. Even though, this work is preliminary interested in low-overhead impedance measurement for RF circuit applications, the proposed methods can be used in a wide variety of metrology applications where impedance measurements are already used. Some examples of these applications include determining material properties, plasma generation, and moisture detection. Additionally, multi-port applications extend beyond the impedance measurement. There are applications where multi-ports are used as receivers for communication systems, RADARs, and remote sensing applications. The multi-port technique generally requires a careful design of the testing structure to produce a unique solution from power detector measurements. It also requires the use of nonlinear solvers during calibration, and depending on calibration procedure, measurement. The use of nonlinear solvers generates issues for convergence, computational complexity, and resources needed for carrying out calibrations and measurements in a timely manner. In this work, using periodic structures, a structure where a circuit block repeats itself, for multi-port measurements is proposed. The periodic structures introduce a new constraint that simplifies the multi-port theory and leads to an explicit calibration and measurement procedure. Unlike the existing calibration procedures which require at least five loads and various constraints on the load for explicit solution, the proposed method can use three loads for calibration. Multi-ports built with periodic structures will always produce a unique measurement result. This leads to increased bandwidth of operation and simplifies design procedure. The efficacy of the method demonstrated in two embodiments.
In the first embodiment, a multi-port is directly embedded into a matching network to measure impedance of the load.
In the second embodiment, periodic structures are used to compare two loads without requiring any calibration.
ContributorsAvci, Muslum Emir (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kitchen, Jennifer (Committee member) / Trichopoulos, Georgios (Committee member) / Arizona State University (Publisher)
Created2023
Description
In this dissertation, enhanced coherent detection of terahertz (THz) radiation is presented for Silicon integrated circuits (ICs). In general THz receivers implemented in silicon technologies face a challenge due to the high noise figure (NF) of the low noise amplifier (LNA) and low conversion gain of the radio frequency (RF) mixers. Moreover, issues with implementing local oscillators (LOs) further compound these challenges, including power driving mixes, distribution networks, and overall power consumption, particularly for large-scale arrays. To address these inherent obstacles, two notable cases of enhancing THz receiver performance are presented. In the Sideband Separation Receiver (SSR) for space-borne applications is introduced. Implemented in SiGe BiCMOS technology this broadband SSR boasts a high Image Rejection Ratio (IRR) exceeding 20 dB across 220 – 320 GHz. Employing a modified Weaver architecture, optimized for simultaneous spectral line observation, it utilizes an I/Q double down-conversion, pushing the technological boundaries of silicon and enabling large-scale focal plane array (FPA) deployment in space. Notably, the use of a sub-harmonic down-conversion mixer (SHM) significantly reduces LO power generation challenges, enhancing scalability while maintaining minimal NF.
In the 4x4 FPA active THz imager, a dual-polarized patch antenna operating at 420 GHz utilizes orthogonal polarization for RF and LO signals, coupled with a coherent homodyne power detector. Realized in 0.13µm SiGe HBT technology, the power detector is co-designing with the antenna to ensure minimal crosstalk and achieving -30dB cross-polarization isolation. Illumination of the LO enhances power detector performance without on-chip routing complexities, enabling scalability to 1K pixel THz imagers. Each pixel achieves a Noise-Equivalent Power (NEP) of 1 pW/√Hz at 420 GHz, and integration with a readout and digital filter ensures high dynamic range.
Furthermore, this study explores radiation hardening techniques to mitigate single-event effects (SEEs) in high-frequency receivers operating in space. Leveraging a W-band receiver in 90 nm SiGe BiCMOS technology, matching considerations and diverse modes of operation are employed to reduce SEE susceptibility. Transient current pulse modeling, validated through TCAD simulations, demonstrates the effectiveness of proposed techniques in substantially mitigating SETs within the proposed radiation-hardened-by-design (RHBD) receiver front-end.
ContributorsAl Seragi, Ebrahim (Author) / Zeinolabedinzadeh, Saeed (Thesis advisor) / Trichopoulos, Georgios (Committee member) / Bakkaloglu, Bertan (Committee member) / Aberle, James (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2024