This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.

In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.

Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.

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Description
As residential photovoltaic (PV) systems become more and more common and widespread, their system architectures are being developed to maximize power extraction while keeping the cost of associated electronics to a minimum. An architecture that has become popular in recent years is the "DC optimizer" architecture, wherein one DC-DC

As residential photovoltaic (PV) systems become more and more common and widespread, their system architectures are being developed to maximize power extraction while keeping the cost of associated electronics to a minimum. An architecture that has become popular in recent years is the "DC optimizer" architecture, wherein one DC-DC converter is connected to the output of each PV module. The DC optimizer architecture has the advantage of performing maximum power-point tracking (MPPT) at the module level, without the high cost of using an inverter on each module (the "microinverter" architecture). This work details the design of a proposed DC optimizer. The design incorporates a series-input parallel-output topology to implement MPPT at the sub-module level. This topology has some advantages over the more common series-output DC optimizer, including relaxed requirements for the system's inverter. An autonomous control scheme is proposed for the series-connected converters, so that no external control signals are needed for the system to operate, other than sunlight. The DC optimizer in this work is designed with an emphasis on efficiency, and to that end it uses GaN FETs and an active clamp technique to reduce switching and conduction losses. As with any parallel-output converter, phase interleaving is essential to minimize output RMS current losses. This work proposes a novel phase-locked loop (PLL) technique to achieve interleaving among the series-input converters.
ContributorsLuster, Daniel (Author) / Ayyanar, Raja (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2014
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Description
This paper introduces an application space of Power over Ethernet to Universal Serial Bus (USB) Power Delivery, and develops 3 different flyback approaches to a 45 Watt solution in the space. The designs of Fixed Frequency Flyback, Quasi-Resonant Flyback, and Active Clamp Flyback are developed for the application with 37

This paper introduces an application space of Power over Ethernet to Universal Serial Bus (USB) Power Delivery, and develops 3 different flyback approaches to a 45 Watt solution in the space. The designs of Fixed Frequency Flyback, Quasi-Resonant Flyback, and Active Clamp Flyback are developed for the application with 37 Volts (V) to 57 V Direct Current (DC) input voltage and 5 V, 9 V, 15 V, and 20 V output, and results are examined for the given specifications. Implementation based concerns are addressed for each topology during the design process. The systems are proven and tested for efficiency, thermals, and output voltage ripple across the operation range. The topologies are then compared for a cost and benefit analysis and their highlights are identified to showcase each systems prowess.
ContributorsNasir, Anthony Michael (Author) / Ayyanar, Raja (Thesis advisor) / Lei, Qin (Committee member) / Hari, Ajay (Committee member) / Arizona State University (Publisher)
Created2021