ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
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- All Subjects: leakage current
- Creators: Ayyanar, Raja
Description
Two major challenges in the transformer-less, single-phase PV string inverters are common mode leakage currents and double-line-frequency power decoupling. In the proposed doubly-grounded inverter topology with innovative active-power-decoupling approach, both of these issues are simultaneously addressed. The topology allows the PV negative terminal to be directly connected to the neutral, thereby eliminating the common-mode ground-currents. The decoupling capacitance requirement is minimized by a dynamically-variable dc-link with large voltage swing, allowing an all-film-capacitor implementation. Furthermore, the use of wide-bandgap devices enables the converter operation at higher switching frequency, resulting in smaller magnetic components. The operating principles, design and optimization, and control methods are explained in detail, and compared with other transformer-less, active-decoupling topologies. A 3 kVA, 100 kHz single-phase hardware prototype at 400 V dc nominal input and 240 V ac output has been developed using SiC MOSFETs with only 45 μF/1100 V dc-link capacitance. The proposed doubly-grounded topology is then extended for split-phase PV inverter application which results in significant reduction in both the peak and RMS values of the boost stage inductor current and allows for easy design of zero voltage transition. A topological enhancement involving T-type dc-ac stage is also developed which takes advantage of the three-level switching states with reduced voltage stress on the main switches, lower switching loss and almost halved inductor current ripple.
In addition, this thesis also proposed two new schemes to improve the efficiency of conventional H-bridge inverter topology. The first scheme is to add an auxiliary zero-voltage-transition (ZVT) circuit to realize zero-voltage-switching (ZVS) for all the main switches and inherent zero-current-switching (ZCS) for the auxiliary switches. The advantages include the provision to implement zero state modulation schemes to decrease the inductor current THD, naturally adaptive auxiliary inductor current and elimination of need for large balancing capacitors. The second proposed scheme improves the system efficiency while still meeting a given THD requirement by implementing variable instantaneous switching frequency within a line frequency cycle. This scheme aims at minimizing the combined switching loss and inductor core loss by including different characteristics of the losses relative to the instantaneous switching frequency in the optimization process.
In addition, this thesis also proposed two new schemes to improve the efficiency of conventional H-bridge inverter topology. The first scheme is to add an auxiliary zero-voltage-transition (ZVT) circuit to realize zero-voltage-switching (ZVS) for all the main switches and inherent zero-current-switching (ZCS) for the auxiliary switches. The advantages include the provision to implement zero state modulation schemes to decrease the inductor current THD, naturally adaptive auxiliary inductor current and elimination of need for large balancing capacitors. The second proposed scheme improves the system efficiency while still meeting a given THD requirement by implementing variable instantaneous switching frequency within a line frequency cycle. This scheme aims at minimizing the combined switching loss and inductor core loss by including different characteristics of the losses relative to the instantaneous switching frequency in the optimization process.
ContributorsXia, Yinglai (Author) / Ayyanar, Raja (Thesis advisor) / Karady, George G. (Committee member) / Lei, Qin (Committee member) / Qin, Jiangchao (Committee member) / Arizona State University (Publisher)
Created2017
Description
The performance of voltage source inverter (VSI) in terms of output waveform quality, conversion efficiency and common mode noise depends greatly on the pulse width modulation (PWM) method. In this work, a low-loss space vector PWM i.e., 240°-clamped space vector PWM (240CPWM) is proposed to improve the performance of VSIs in electric/hybrid electric vehicles (EV/HEVs) and grid connected photovoltaic (PV) systems. The salient features of 240CPWM include 240° clamping of each phase pole to positive or negative DC bus in a fundamental cycle ensuring that switching losses are reduced by a factor of seven as compared to conventional space vector PWM (CSVPWM) at unity power factor. Zero states are completely eliminated and only two nearest active states are used ensuring that there is no penalty in terms of total harmonic distortion (THD) in line current. The THD of the line current is analyzed using the notion of stator flux ripple and compared with conventional and discontinuous PWM method. Discontinuous PWM methods achieve switching loss reduction at the expense of higher THD while 240CPWM achieves a much greater loss reduction without impacting the THD. The analysis and performance of 240CPWM are validated on a 10 kW two-stage experimental prototype.
Common mode voltage (CMV) and leakage current characteristics of 240CPWM are analyzed in detail. It is shown analytically that 240CPWM reduces the CMV and leakage current as compared to other PWM methods while simultaneously reducing the switching loss and THD. Experimental results from a 10-kW hardware prototype conform to the analytical discussions and validate the superior performance of 240CPWM.
240CPWM requires a six-pulse dynamic DC link voltage that introduces low frequency harmonics in DC input current and/or AC line currents that can affect maximum power point tracking, battery life or THD in line current. Four topologies have been proposed to minimize the low frequency harmonics in input and line currents in grid-connected PV system with 240CPWM.
In order to achieve further benefits in terms of THD and device stress reduction, 240CPWM is extended to three-level inverters. The performance metrics such as THD and switching loss for 240CPWM are analyzed in three-level inverter.
ContributorsQamar, Hafsa (Author) / Ayyanar, Raja (Thesis advisor) / Yu, Hongbin (Committee member) / Lei, Qin (Committee member) / Weng, Yang (Committee member) / Arizona State University (Publisher)
Created2022