ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
Displaying 1 - 10 of 161
Filtering by
- Creators: Yu, Hongbin
- Creators: Shrivastava, Aviral
Description
Fluxgate sensors are magnetic field sensors that can measure DC and low frequency AC magnetic fields. They can measure much lower magnetic fields than other magnetic sensors like Hall effect sensors, magnetoresistive sensors etc. They also have high linearity, high sensitivity and low noise. The major application of fluxgate sensors is in magnetometers for the measurement of earth's magnetic field. Magnetometers are used in navigation systems and electronic compasses. Fluxgate sensors can also be used to measure high DC currents. Integrated micro-fluxgate sensors have been developed in recent years. These sensors have much lower power consumption and area compared to their PCB counterparts. The output voltage of micro-fluxgate sensors is very low which makes the analog front end more complex and results in an increase in power consumption of the system. In this thesis a new analog front-end circuit for micro-fluxgate sensors is developed. This analog front-end circuit uses charge pump based excitation circuit and phase delay based read-out chain. With these two features the power consumption of analog front-end is reduced. The output is digital and it is immune to amplitude noise at the output of the sensor. Digital output is produced without using an ADC. A SPICE model of micro-fluxgate sensor is used to verify the operation of the analog front-end and the simulation results show very good linearity.
ContributorsPappu, Karthik (Author) / Bakkaloglu, Bertan (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2013
Description
Integrated photonics requires high gain optical materials in the telecom wavelength range for optical amplifiers and coherent light sources. Erbium (Er) containing materials are ideal candidates due to the 1.5 μm emission from Er3+ ions. However, the Er density in typical Er-doped materials is less than 1 x 1020 cm-3, thus limiting the maximum optical gain to a few dB/cm, too small to be useful for integrated photonics applications. Er compounds could potentially solve this problem since they contain much higher Er density. So far the existing Er compounds suffer from short lifetime and strong upconversion effects, mainly due to poor quality of crystals produced by various methods of thin film growth and deposition. This dissertation explores a new Er compound: erbium chloride silicate (ECS, Er3(SiO4)2Cl ) in the nanowire form, which facilitates the growth of high quality single crystals. Growth methods for such single crystal ECS nanowires have been established. Various structural and optical characterizations have been carried out. The high crystal quality of ECS material leads to a long lifetime of the first excited state of Er3+ ions up to 1 ms at Er density higher than 1022 cm-3. This Er lifetime-density product was found to be the largest among all Er containing materials. A unique integrating sphere method was developed to measure the absorption cross section of ECS nanowires from 440 to 1580 nm. Pump-probe experiments demonstrated a 644 dB/cm signal enhancement from a single ECS wire. It was estimated that such large signal enhancement can overcome the absorption to result in a net material gain, but not sufficient to compensate waveguide propagation loss. In order to suppress the upconversion process in ECS, Ytterbium (Yb) and Yttrium (Y) ions are introduced as substituent ions of Er in the ECS crystal structure to reduce Er density. While the addition of Yb ions only partially succeeded, erbium yttrium chloride silicate (EYCS) with controllable Er density was synthesized successfully. EYCS with 30 at. % Er was found to be the best. It shows the strongest PL emission at 1.5 μm, and thus can be potentially used as a high gain material.
ContributorsYin, Leijun (Author) / Ning, Cun-Zheng (Thesis advisor) / Chamberlin, Ralph (Committee member) / Yu, Hongbin (Committee member) / Menéndez, Jose (Committee member) / Ponce, Fernando (Committee member) / Arizona State University (Publisher)
Created2013
Description
In recent years we have witnessed a shift towards multi-processor system-on-chips (MPSoCs) to address the demands of embedded devices (such as cell phones, GPS devices, luxury car features, etc.). Highly optimized MPSoCs are well-suited to tackle the complex application demands desired by the end user customer. These MPSoCs incorporate a constellation of heterogeneous processing elements (PEs) (general purpose PEs and application-specific integrated circuits (ASICS)). A typical MPSoC will be composed of a application processor, such as an ARM Coretex-A9 with cache coherent memory hierarchy, and several application sub-systems. Each of these sub-systems are composed of highly optimized instruction processors, graphics/DSP processors, and custom hardware accelerators. Typically, these sub-systems utilize scratchpad memories (SPM) rather than support cache coherency. The overall architecture is an integration of the various sub-systems through a high bandwidth system-level interconnect (such as a Network-on-Chip (NoC)). The shift to MPSoCs has been fueled by three major factors: demand for high performance, the use of component libraries, and short design turn around time. As customers continue to desire more and more complex applications on their embedded devices the performance demand for these devices continues to increase. Designers have turned to using MPSoCs to address this demand. By using pre-made IP libraries designers can quickly piece together a MPSoC that will meet the application demands of the end user with minimal time spent designing new hardware. Additionally, the use of MPSoCs allows designers to generate new devices very quickly and thus reducing the time to market. In this work, a complete MPSoC synthesis design flow is presented. We first present a technique \cite{leary1_intro} to address the synthesis of the interconnect architecture (particularly Network-on-Chip (NoC)). We then address the synthesis of the memory architecture of a MPSoC sub-system \cite{leary2_intro}. Lastly, we present a co-synthesis technique to generate the functional and memory architectures simultaneously. The validity and quality of each synthesis technique is demonstrated through extensive experimentation.
ContributorsLeary, Glenn (Author) / Chatha, Karamvir S (Thesis advisor) / Vrudhula, Sarma (Committee member) / Shrivastava, Aviral (Committee member) / Beraha, Rudy (Committee member) / Arizona State University (Publisher)
Created2013
Description
This dissertation is on the study of structural and optical properties of some III-V and II-VI compound semiconductors. The first part of this dissertation is a study of the deformation mechanisms associated with nanoindentation and nanoscratching of InP, GaN, and ZnO crystals. The second part is an investigation of some fundamental issues regarding compositional fluctuations and microstructure in GaInNAs and InAlN alloys. In the first part, the microstructure of (001) InP scratched in an atomic force microscope with a small diamond tip has been studied as a function of applied normal force and crystalline direction in order to understand at the nanometer scale the deformation mechanisms in the zinc-blende structure. TEM images show deeper dislocation propagation for scratches along <110> compared to <100>. High strain fields were observed in <100> scratches, indicating hardening due to locking of dislocations gliding on different slip planes. Reverse plastic flow have been observed in <110> scratches in the form of pop-up events that result from recovery of stored elastic strain. In a separate study, nanoindentation-induced plastic deformation has been studied in c-, a-, and m-plane ZnO single crystals and c-plane GaN respectively, to study the deformation mechanism in wurtzite hexagonal structures. TEM results reveal that the prime deformation mechanism is slip on basal planes and in some cases, on pyramidal planes, and strain built up along particular directions. No evidence of phase transformation or cracking was observed in both materials. CL imaging reveals quenching of near band-edge emission by dislocations. In the second part, compositional inhomogeneity in quaternary GaInNAs and ternary InAlN alloys has been studied using TEM. It is shown that exposure to antimony during growth of GaInNAs results in uniform chemical composition in the epilayer, as antimony suppresses the surface mobility of adatoms that otherwise leads to two-dimensional growth and elemental segregation. In a separate study, compositional instability is observed in lattice-matched InAlN films grown on GaN, for growth beyond a certain thickness. Beyond 200 nm of thickness, two sub-layers with different indium content are observed, the top one with lower indium content.
ContributorsHuang, Jingyi (Author) / Ponce, Fernando A. (Thesis advisor) / Carpenter, Ray W (Committee member) / Smith, David J. (Committee member) / Yu, Hongbin (Committee member) / Treacy, Michael Mj (Committee member) / Arizona State University (Publisher)
Created2013
Description
One dimensional (1D) and quasi-one dimensional quantum wires have been a subject of both theoretical and experimental interest since 1990s and before. Phenomena such as the "0.7 structure" in the conductance leave many open questions. In this dissertation, I study the properties and the internal electron states of semiconductor quantum wires with the path integral Monte Carlo (PIMC) method. PIMC is a tool for simulating many-body quantum systems at finite temperature. Its ability to calculate thermodynamic properties and various correlation functions makes it an ideal tool in bridging experiments with theories. A general study of the features interpreted by the Luttinger liquid theory and observed in experiments is first presented, showing the need for new PIMC calculations in this field. I calculate the DC conductance at finite temperature for both noninteracting and interacting electrons. The quantized conductance is identified in PIMC simulations without making the same approximation in the Luttinger model. The low electron density regime is subject to strong interactions, since the kinetic energy decreases faster than the Coulomb interaction at low density. An electron state called the Wigner crystal has been proposed in this regime for quasi-1D wires. By using PIMC, I observe the zig-zag structure of the Wigner crystal. The quantum fluctuations suppress the long range correla- tions, making the order short-ranged. Spin correlations are calculated and used to evaluate the spin coupling strength in a zig-zag state. I also find that as the density increases, electrons undergo a structural phase transition to a dimer state, in which two electrons of opposite spins are coupled across the two rows of the zig-zag. A phase diagram is sketched for a range of densities and transverse confinements. The quantum point contact (QPC) is a typical realization of quantum wires. I study the QPC by explicitly simulating a system of electrons in and around a Timp potential (Timp, 1992). Localization of a single electron in the middle of the channel is observed at 5 K, as the split gate voltage increases. The DC conductance is calculated, which shows the effect of the Coulomb interaction. At 1 K and low electron density, a state similar to the Wigner crystal is found inside the channel.
ContributorsLiu, Jianheng, 1982- (Author) / Shumway, John B (Thesis advisor) / Schmidt, Kevin E (Committee member) / Chen, Tingyong (Committee member) / Yu, Hongbin (Committee member) / Ros, Robert (Committee member) / Arizona State University (Publisher)
Created2012
Description
Nitride semiconductors have wide applications in electronics and optoelectronics technologies. Understanding the nature of the optical recombination process and its effects on luminescence efficiency is important for the development of novel devices. This dissertation deals with the optical properties of nitride semiconductors, including GaN epitaxial layers and more complex heterostructures. The emission characteristics are examined by cathodoluminescence spectroscopy and imaging, and are correlated with the structural and electrical properties studied by transmission electron microscopy and electron holography. Four major areas are covered in this dissertation, which are described next. The effect of strain on the emission characteristics in wurtzite GaN has been studied. The values of the residual strain in GaN epilayers with different dislocation densities are determined by x-ray diffraction, and the relationship between exciton emission energy and the in-plane residual strain is demonstrated. It shows that the emission energy increases withthe magnitude of the in-plane compressive strain. The temperature dependence of the emission characteristics in cubic GaN has been studied. It is observed that the exciton emission and donor-acceptor pair recombination behave differently with temperature. The donor-bound exciton binding energy has been measured to be 13 meV from the temperature dependence of the emission spectrum. It is also found that the ionization energies for both acceptors and donors are smaller in cubic compared with hexagonal structures, which should contribute to higher doping efficiencies. A comprehensive study on the structural and optical properties is presented for InGaN/GaN quantum wells emitting in the blue, green, and yellow regions of the electromagnetic spectrum. Transmission electron microscopy images indicate the presence of indium inhomogeneties which should be responsible for carrier localization. The temperature dependence of emission luminescence shows that the carrier localization effects become more significant with increasing emission wavelength. On the other hand, the effect of non-radiative recombination on luminescence efficiency also varies with the emission wavelength. The fast increase of the non-radiative recombination rate with temperature in the green emitting QWs contributes to the lower efficiency compared with the blue emitting QWs. The possible saturation of non-radiative recombination above 100 K may explain the unexpected high emission efficiency for the yellow emitting QWs Finally, the effects of InGaN underlayers on the electronic and optical properties of InGaN/GaN quantum wells emitting in visible spectral regions have been studied. A significant improvement of the emission efficiency is observed, which is associated with a blue shift in the emission energy, a reduced recombination lifetime, an increased spatial homogeneity in the luminescence, and a weaker internal field across the quantum wells. These are explained by a partial strain relaxation introduced by the InGaN underlayer, which is measured by reciprocal space mapping of the x-ray diffraction intensity.
ContributorsLi, Di (Author) / Ponce, Fernando (Thesis advisor) / Culbertson, Robert (Committee member) / Yu, Hongbin (Committee member) / Shumway, John (Committee member) / Menéndez, Jose (Committee member) / Arizona State University (Publisher)
Created2012
Description
Rapid technology scaling, the main driver of the power and performance improvements of computing solutions, has also rendered our computing systems extremely susceptible to transient errors called soft errors. Among the arsenal of techniques to protect computation from soft errors, Control Flow Checking (CFC) based techniques have gained a reputation of effective, yet low-cost protection mechanism. The basic idea is that, there is a high probability that a soft-fault in program execution will eventually alter the control flow of the program. Therefore just by making sure that the control flow of the program is correct, significant protection can be achieved. More than a dozen techniques for CFC have been developed over the last several decades, ranging from hardware techniques, software techniques, and hardware-software hybrid techniques as well. Our analysis shows that existing CFC techniques are not only ineffective in protecting from soft errors, but cause additional power and performance overheads. For this analysis, we develop and validate a simulation based experimental setup to accurately and quantitatively estimate the architectural vulnerability of a program execution on a processor micro-architecture. We model the protection achieved by various state-of-the-art CFC techniques in this quantitative vulnerability estimation setup, and find out that software only CFC protection schemes (CFCSS, CFCSS+NA, CEDA) increase system vulnerability by 18% to 21% with 17% to 38% performance overhead. Hybrid CFC protection (CFEDC) increases vulnerability by 5%, while the vulnerability remains almost the same for hardware only CFC protection (CFCET); notwithstanding the hardware overheads of design cost, area, and power incurred in the hardware modifications required for their implementations.
ContributorsRhisheekesan, Abhishek (Author) / Shrivastava, Aviral (Thesis advisor) / Colbourn, Charles Joseph (Committee member) / Wu, Carole-Jean (Committee member) / Arizona State University (Publisher)
Created2013
Description
We are expecting hundreds of cores per chip in the near future. However, scaling the memory architecture in manycore architectures becomes a major challenge. Cache coherence provides a single image of memory at any time in execution to all the cores, yet coherent cache architectures are believed will not scale to hundreds and thousands of cores. In addition, caches and coherence logic already take 20-50% of the total power consumption of the processor and 30-60% of die area. Therefore, a more scalable architecture is needed for manycore architectures. Software Managed Manycore (SMM) architectures emerge as a solution. They have scalable memory design in which each core has direct access to only its local scratchpad memory, and any data transfers to/from other memories must be done explicitly in the application using Direct Memory Access (DMA) commands. Lack of automatic memory management in the hardware makes such architectures extremely power-efficient, but they also become difficult to program. If the code/data of the task mapped onto a core cannot fit in the local scratchpad memory, then DMA calls must be added to bring in the code/data before it is required, and it may need to be evicted after its use. However, doing this adds a lot of complexity to the programmer's job. Now programmers must worry about data management, on top of worrying about the functional correctness of the program - which is already quite complex. This dissertation presents a comprehensive compiler and runtime integration to automatically manage the code and data of each task in the limited local memory of the core. We firstly developed a Complete Circular Stack Management. It manages stack frames between the local memory and the main memory, and addresses the stack pointer problem as well. Though it works, we found we could further optimize the management for most cases. Thus a Smart Stack Data Management (SSDM) is provided. In this work, we formulate the stack data management problem and propose a greedy algorithm for the same. Later on, we propose a general cost estimation algorithm, based on which CMSM heuristic for code mapping problem is developed. Finally, heap data is dynamic in nature and therefore it is hard to manage it. We provide two schemes to manage unlimited amount of heap data in constant sized region in the local memory. In addition to those separate schemes for different kinds of data, we also provide a memory partition methodology.
ContributorsBai, Ke (Author) / Shrivastava, Aviral (Thesis advisor) / Chatha, Karamvir (Committee member) / Xue, Guoliang (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2014
Description
This thesis summarizes modeling and simulation of plasmonic waveguides and nanolasers. The research includes modeling of dielectric constants of doped semiconductor as a potential plasmonic material, simulation of plasmonic waveguides with different configurations and geometries, simulation and design of plasmonic nanolasers. In the doped semiconductor part, a more accurate model accounting for dielectric constant of doped InAs was proposed. In the model, Interband transitions accounted for by Adachi's model considering Burstein-Moss effect and free electron effect governed by Drude model dominate in different spectral regions. For plasmonic waveguide part, Insulator-Metal-Insulator (IMI) waveguide, silver nanowire waveguide with and without substrate, Metal-Semiconductor-Metal (MSM) waveguide and Metal-Insulator-Semiconductor-Insulator-Metal (MISIM) waveguide were investigated respectively. Modal analysis was given for each part. Lastly, a comparative study of plasmonic and optical modes in an MSM disk cavity was performed by FDTD simulation for room temperature at the telecommunication wavelength. The results show quantitatively that plasmonic modes have advantages over optical modes in the scalability down to small size and the cavity Quantum Electrodynamics(QED) effects due to the possibility of breaking the diffraction limit. Surprisingly for lasing characteristics, though plasmonic modes have large loss as expected, minimal achievable threshold can be attained for whispering gallery plasmonic modes with azimuthal number of 2 by optimizing cavity design at 1.55µm due to interplay of metal loss and radiation loss.
ContributorsWang, Haotong (Author) / Ning, Cunzheng (Thesis advisor) / Palais, Joseph (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2014
Description
Semiconductor nanowires are important candidates for highly scaled three dimensional electronic devices. It is very advantageous to combine their scaling capability with the high yield of planar CMOS technology by integrating nanowire devices into planar circuits. The purpose of this research is to identify the challenges associated with the fabrication of vertically oriented Si and Ge nanowire diodes and modeling their electrical behavior so that they can be utilized to create unique three dimensional architectures that can boost the scaling of electronic devices into the next generation. In this study, vertical Ge and Si nanowire Schottky diodes have been fabricated using bottom-up vapor-liquid-solid (VLS) and top-down reactive ion etching (RIE) approaches respectively. VLS growth yields nanowires with atomically smooth sidewalls at sub-50 nm diameters but suffers from the problem that the doping increases radially outwards from the core of the devices. RIE is much faster than VLS and does not suffer from the problem of non-uniform doping. However, it yields nanowires with rougher sidewalls and gets exceedingly inefficient in yielding vertical nanowires for diameters below 50 nm. The I-V characteristics of both Ge and Si nanowire diodes cannot be adequately fit by the thermionic emission model. Annealing in forming gas which passivates dangling bonds on the nanowire surface is shown to have a considerable impact on the current through the Si nanowire diodes indicating that fixed charges and traps on the surface of the devices play a major role in determining their electrical behavior. Also, due to the vertical geometry of the nanowire diodes, electric field lines originating from the metal and terminating on their sidewalls can directly modulate their conductivity. Both these effects have to be included in the model aimed at predicting the current through vertical nanowire diodes. This study shows that the current through vertical nanowire diodes cannot be predicted accurately using the thermionic emission model which is suitable for planar devices and identifies the factors needed to build a comprehensive analytical model for predicting the current through vertically oriented nanowire diodes.
ContributorsChandra, Nishant (Author) / Goodnick, Stephen M (Thesis advisor) / Tracy, Clarence J. (Committee member) / Yu, Hongbin (Committee member) / Ferry, David K. (Committee member) / Arizona State University (Publisher)
Created2014