ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
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- Creators: Kitchen, Jennifer
- Creators: Shen, Wei
Description
There is an increasing demand for fully integrated point-of-load (POL) isolated DC-DC converters that can provide an isolation barrier between the primary and the secondary side, while delivering a low ripple, low noise regulated voltage at their isolated sides to a high dynamic range, sensitive mixed signal devices, such as sensors, current-shunt-monitors and ADCs. For these applications, smaller system size and integration level is important because the whole system may need to fit to limited space. Traditional methods for providing isolated power are discrete solutions using bulky transformers. Miniaturization of isolated POL regulators is becoming highly desirable for low power applications.
A fully integrated, low noise isolated point-of-load DC-DC converter for supply regulation of high dynamic range analog and mixed signal sensor signal-chains is presented. The isolated DC-DC converter utilizes an integrated planar air-core micro-transformer as a coupled resonator and isolation barrier and enables direct connection of low-voltage mixed signal circuits to higher supply rails. The air core transformer is driven at its primary resonant frequency of 100 MHz to achieve maximum power transfer. A mixed-signal perturb-and-observe based frequency search algorithm is developed to improve maximum power transfer efficiency by 60% across the isolation barrier compared to fixed driving frequency method. The isolated converter’s output ripple is reduced by utilizing spread spectrum clocking in the driver. An isolated PMOS LDO in the secondary side is used to suppress switching noise and ripple by 21dB. Conducted and radiated EMI distribution on the IC is measured by a set of integrated ring oscillator based noise sensors with -68dBm noise sensitivity. The proposed isolated converter achieves highest level of integration with respect to earlier reported integrated isolated converters, while providing 50V on-chip junction isolation without the need for extra silicon post-processing steps.
A fully integrated, low noise isolated point-of-load DC-DC converter for supply regulation of high dynamic range analog and mixed signal sensor signal-chains is presented. The isolated DC-DC converter utilizes an integrated planar air-core micro-transformer as a coupled resonator and isolation barrier and enables direct connection of low-voltage mixed signal circuits to higher supply rails. The air core transformer is driven at its primary resonant frequency of 100 MHz to achieve maximum power transfer. A mixed-signal perturb-and-observe based frequency search algorithm is developed to improve maximum power transfer efficiency by 60% across the isolation barrier compared to fixed driving frequency method. The isolated converter’s output ripple is reduced by utilizing spread spectrum clocking in the driver. An isolated PMOS LDO in the secondary side is used to suppress switching noise and ripple by 21dB. Conducted and radiated EMI distribution on the IC is measured by a set of integrated ring oscillator based noise sensors with -68dBm noise sensitivity. The proposed isolated converter achieves highest level of integration with respect to earlier reported integrated isolated converters, while providing 50V on-chip junction isolation without the need for extra silicon post-processing steps.
ContributorsLiu, Chengxi (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kiaei, Sayfe (Committee member) / Song, Hongjiang (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2018
Description
The continuing advancement of modulation standards with newer generations of cellular technology, promises ever increasing data rate and bandwidth efficiency. However, these modulation schemes present high peak to average power ratio (PAPR) even after applying crest factor reduction. Being the most power-hungry component in the radio frequency (RF) transmitter, power amplifiers (PA) for infrastructure applications, need to operate efficiently at the presence of these high PAPR signals while maintaining reasonable linearity performance which could be improved by moderate digital pre-distortion (DPD) techniques. This strict requirement of operating efficiently at average power level while being capable of delivering the peak power, made the load modulated PAs such as Doherty PA, Outphasing PA, various Envelope Tracking PAs, Polar transmitters and most recently the load modulated balanced PA, the prime candidates for such application. However, due to its simpler architecture and ability to deliver RF power efficiently with good linearity performance has made Doherty PA (DPA) the most popular solution and has been deployed almost exclusively for wireless infrastructure application all over the world.
Although DPAs has been very successful at amplifying the high PAPR signals, most recent advancements in cellular technology has opted for higher PAPR based signals at wider bandwidth. This lead to increased research and development work to innovate advanced Doherty architectures which are more efficient at back-off (BO) power levels compared to traditional DPAs. In this dissertation, three such advanced Doherty architectures and/or techniques are proposed to achieve high efficiency at further BO power level compared to traditional architecture using symmetrical devices for carrier and peaking PAs. Gallium Nitride (GaN) based high-electron-mobility (HEMT) technology has been used to design and fabricate the DPAs to validate the proposed advanced techniques for higher efficiency with good linearity performance at BO power levels.
Although DPAs has been very successful at amplifying the high PAPR signals, most recent advancements in cellular technology has opted for higher PAPR based signals at wider bandwidth. This lead to increased research and development work to innovate advanced Doherty architectures which are more efficient at back-off (BO) power levels compared to traditional DPAs. In this dissertation, three such advanced Doherty architectures and/or techniques are proposed to achieve high efficiency at further BO power level compared to traditional architecture using symmetrical devices for carrier and peaking PAs. Gallium Nitride (GaN) based high-electron-mobility (HEMT) technology has been used to design and fabricate the DPAs to validate the proposed advanced techniques for higher efficiency with good linearity performance at BO power levels.
ContributorsRuhul Hasin, Muhammad (Author) / Kitchen, Jennifer (Thesis advisor) / Aberle, James T., 1961- (Committee member) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2018
Description
This work covers the design and implementation of a Parallel Doherty RF Power Amplifier in a GaN HEMT process for medium power macro-cell (16W) base station applications. This work improves the key parameters of a Doherty Power Amplifier including the peak and back-off efficiency, operational instantaneous bandwidth and output power by proposing a Parallel Doherty amplifier architecture.
As there is a progression in the wireless communication systems from the first generation to the future 5G systems, there is ever increasing demand for higher data rates which means signals with higher peak-to-average power ratios (PAPR). The present modulation schemes require PAPRs close to 8-10dB. So, there is an urgent need to develop energy efficient power amplifiers that can transmit these high data rate signals.
The Doherty Power Amplifier (DPA) is the most common PA architecture in the cellular infrastructure, as it achieves reasonably high back-off power levels with good efficiency. This work advances the DPA architecture by proposing a Parallel Doherty Power Amplifier to broaden the PAs instantaneous bandwidth, designed with frequency range of operation for 2.45 – 2.70 GHz to support WiMAX applications and future broadband signals.
As there is a progression in the wireless communication systems from the first generation to the future 5G systems, there is ever increasing demand for higher data rates which means signals with higher peak-to-average power ratios (PAPR). The present modulation schemes require PAPRs close to 8-10dB. So, there is an urgent need to develop energy efficient power amplifiers that can transmit these high data rate signals.
The Doherty Power Amplifier (DPA) is the most common PA architecture in the cellular infrastructure, as it achieves reasonably high back-off power levels with good efficiency. This work advances the DPA architecture by proposing a Parallel Doherty Power Amplifier to broaden the PAs instantaneous bandwidth, designed with frequency range of operation for 2.45 – 2.70 GHz to support WiMAX applications and future broadband signals.
ContributorsBHARDWAJ, SUMIT (Author) / Kitchen, Jennifer (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2018
Description
This dissertation proposes and presents two different passive sigma-delta
modulator zoom Analog to Digital Converter (ADC) architectures. The first ADC is fullydifferential, synthesizable zoom-ADC architecture with a passive loop filter for lowfrequency Built in Self-Test (BIST) applications. The detailed ADC architecture and a step
by step process designing the zoom-ADC along with a synthesis tool that can target various
design specifications are presented. The design flow does not rely on extensive knowledge
of an experienced ADC designer. Two example set of BIST ADCs have been synthesized
with different performance requirements in 65nm CMOS process. The first ADC achieves
90.4dB Signal to Noise Ratio (SNR) in 512µs measurement time and consumes 17µW
power. Another example achieves 78.2dB SNR in 31.25µs measurement time and
consumes 63µW power. The second ADC architecture is a multi-mode, dynamically
zooming passive sigma-delta modulator. The architecture is based on a 5b interpolating
flash ADC as the zooming unit, and a passive discrete time sigma delta modulator as the
fine conversion unit. The proposed ADC provides an Oversampling Ratio (OSR)-
independent, dynamic zooming technique, employing an interpolating zooming front-end.
The modulator covers between 0.1 MHz and 10 MHz signal bandwidth which makes it
suitable for cellular applications including 4G radio systems. By reconfiguring the OSR,
bias current, and component parameters, optimal power consumption can be achieved for
every mode. The ADC is implemented in 0.13 µm CMOS technology and it achieves an
SNDR of 82.2/77.1/74.2/68 dB for 0.1/1.92/5/10MHz bandwidth with 1.3/5.7/9.6/11.9mW
power consumption from a 1.2 V supply.
modulator zoom Analog to Digital Converter (ADC) architectures. The first ADC is fullydifferential, synthesizable zoom-ADC architecture with a passive loop filter for lowfrequency Built in Self-Test (BIST) applications. The detailed ADC architecture and a step
by step process designing the zoom-ADC along with a synthesis tool that can target various
design specifications are presented. The design flow does not rely on extensive knowledge
of an experienced ADC designer. Two example set of BIST ADCs have been synthesized
with different performance requirements in 65nm CMOS process. The first ADC achieves
90.4dB Signal to Noise Ratio (SNR) in 512µs measurement time and consumes 17µW
power. Another example achieves 78.2dB SNR in 31.25µs measurement time and
consumes 63µW power. The second ADC architecture is a multi-mode, dynamically
zooming passive sigma-delta modulator. The architecture is based on a 5b interpolating
flash ADC as the zooming unit, and a passive discrete time sigma delta modulator as the
fine conversion unit. The proposed ADC provides an Oversampling Ratio (OSR)-
independent, dynamic zooming technique, employing an interpolating zooming front-end.
The modulator covers between 0.1 MHz and 10 MHz signal bandwidth which makes it
suitable for cellular applications including 4G radio systems. By reconfiguring the OSR,
bias current, and component parameters, optimal power consumption can be achieved for
every mode. The ADC is implemented in 0.13 µm CMOS technology and it achieves an
SNDR of 82.2/77.1/74.2/68 dB for 0.1/1.92/5/10MHz bandwidth with 1.3/5.7/9.6/11.9mW
power consumption from a 1.2 V supply.
ContributorsEROL, OSMAN EMIR (Author) / Ozev, Sule (Thesis advisor) / Kitchen, Jennifer (Committee member) / Ogras, Umit Y. (Committee member) / Blain-Christen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2018
Description
There is an ever-increasing demand for higher bandwidth and data rate ensuing from exploding number of radio frequency integrated systems and devices. As stated in the Shannon-Hartley theorem, the maximum achievable data rate of a communication channel is linearly proportional to the system bandwidth. This is the main driving force behind pushing wireless systems towards millimeter-wave frequency range, where larger bandwidth is available at a higher carrier frequency. Observing the Moor’s law, highly scaled complementary metal–oxide–semiconductor (CMOS) technologies provide fast transistors with a high unity power gain frequency which enables operating at millimeter-wave frequency range. CMOS is the compelling choice for digital and signal processing modules which concurrently offers high computation speed, low power consumption, and mass integration at a high manufacturing yield. One of the main shortcomings of the sub-micron CMOS technologies is the low breakdown voltage of the transistors that limits the dynamic range of the radio frequency (RF) power blocks, especially with the power amplifiers. Low voltage swing restricts the achievable output power which translates into low signal to noise ratio and degraded linearity. Extensive research has been done on proposing new design and IC fabrication techniques with the goal of generating higher output power in CMOS technology. The prominent drawbacks of these solutions are an increased die area, higher cost per design, and lower overall efficiency due to lossy passive components. In this dissertation, CMOS compatible metal–semiconductor field-effect transistor (MESFETs) are utilized to put forward a new solution to enhance the power amplifier’s breakdown voltage, gain and maximum output power. Requiring no change to the conventional CMOS process flow, this low cost approach allows direct incorporation of high voltage power MESFETs into silicon. High voltage MESFETs were employed in a cascode structure to push the amplifier’s cutoff frequency and unity power gain frequency to the 5G and K-band frequency range. This dissertation begins with CMOS compatible MESFET modeling and fabrication steps, and culminates in the discussion of amplifier design and optimization methodology, parasitic de-embedding steps, simulation and measurement results, and high resistivity RF substrate characterization.
ContributorsHabibiMehr, Payam (Author) / Thornton, Trevor John (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Formicone, Gabriele (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2019
Description财富管理是一个高度信息不对称的行业，因此投资人需要尽可能减少自身的不确定来做投资决策，通过文献整理，本文发现通过建立信任来消除不确定性是很多投资人都会选择的帮助投资决策的方法。纵观历史，美国2007-2008年的金融危机也恰恰导致金融市场投资人对于理财机构信任的严重缺失，相同的情况也可能发生在中国财富管理市场，因此本文将此选作研究重点，希望深入研究财富管理公司投资人对理财师的信任来得到一系列结论。本文最终发现就平台和理财师相比，投资人更看重平台的信誉度。 投资人大多认为平台的信誉度要高于理财师的信誉度，但是这并不意味着理财师不重要。本文进一步的分析发现，多数投资人会和理财师建立起一种私人联系，且该私人关系有助于加强客户和平台的联系。投资人认为行业经验、为人诚恳，说话可信以及责任心是加强这种私人关系的重要因素。最后，投资人对于钜派平台的信任主要由对于理财师的信任来维持，同时对于理财师的信任主要来自与情感信任。本文的发现对财富管理平台具有战略意义。
ContributorsWu, Qimin (Author) / Shen, Wei (Thesis advisor) / Chang, Chun (Thesis advisor) / Zhu, Hongquan (Committee member) / Arizona State University (Publisher)
Created2019
Description摘要
在复杂多变的商业环境中，企业传统的人力资源管理已经难以应对日益频发的员工职业倦怠、人际间矛盾冲突、频繁跳槽等局面与问题。企业员工工作的价值与意义早已不再是传统的雇佣模式下，通过出卖劳动力或智力从而获得工资以实现“养家糊口”的目的那么单纯与简单，员工也希望通过辛勤的工作，以获得个体的幸福感、荣誉感与认同感等。对于现代企业的管理者而言，员工追求事业的提升、个人价值的实现，不仅体现在薪酬、福利待遇的提升，更重要的是员工个人的成长以及潜能和竞争力的提升。
随着组织行为学和心理学的不断发展与演变，与员工幸福感相关的研究备受关注。对现代企业而言，管理者借助制度设计对员工幸福积极管理，可以最大限度地发挥员工的积极性、主动性与创造性，实现员工与企业之间的利益相趋同，从而更为高效地实现组织的目标。基于此，本文以民营企业员工工作幸福感作为研究的切入点，借助理论分析、问卷调查和实证分析相结合的研究方法，系统深入地研究我国民营企业员工工作幸福感的构成、可控前因和绩效后果等问题。
本文研究发现：
第一，员工薪酬的提高有助于员工工作幸福感的提升，薪资对基层员工幸福感的影响显著高于其对高层员工幸福感的影响；
第二，完善的晋升机制对于中层员工而言更能提升其幸福感，完善的晋升机制更有利于中层员工；
第三，公平性的提高有助于提高员工工作幸福感，而且这种正效应更多体现在基层员工群体之中；
第四，高层员工更注重自我价值的实现，高层员工的工作挑战性越高，其自我实现需求获得的满足感则约高，但是对于基层员工和中层员工而言，其效果则恰恰相反，基础员工和高层员工更多地将工作挑战性和压力看作是一种负面的因素；
第五，员工幸福感的确会给企业带来正向的绩效。
本文的研究框架和实证结论不仅可以丰富学术界有关员工工作幸福感的研究，而且为企业管理者进行绩效管理以及员工工作质量的提升提供理论和实证借鉴。
在复杂多变的商业环境中，企业传统的人力资源管理已经难以应对日益频发的员工职业倦怠、人际间矛盾冲突、频繁跳槽等局面与问题。企业员工工作的价值与意义早已不再是传统的雇佣模式下，通过出卖劳动力或智力从而获得工资以实现“养家糊口”的目的那么单纯与简单，员工也希望通过辛勤的工作，以获得个体的幸福感、荣誉感与认同感等。对于现代企业的管理者而言，员工追求事业的提升、个人价值的实现，不仅体现在薪酬、福利待遇的提升，更重要的是员工个人的成长以及潜能和竞争力的提升。
随着组织行为学和心理学的不断发展与演变，与员工幸福感相关的研究备受关注。对现代企业而言，管理者借助制度设计对员工幸福积极管理，可以最大限度地发挥员工的积极性、主动性与创造性，实现员工与企业之间的利益相趋同，从而更为高效地实现组织的目标。基于此，本文以民营企业员工工作幸福感作为研究的切入点，借助理论分析、问卷调查和实证分析相结合的研究方法，系统深入地研究我国民营企业员工工作幸福感的构成、可控前因和绩效后果等问题。
本文研究发现：
第一，员工薪酬的提高有助于员工工作幸福感的提升，薪资对基层员工幸福感的影响显著高于其对高层员工幸福感的影响；
第二，完善的晋升机制对于中层员工而言更能提升其幸福感，完善的晋升机制更有利于中层员工；
第三，公平性的提高有助于提高员工工作幸福感，而且这种正效应更多体现在基层员工群体之中；
第四，高层员工更注重自我价值的实现，高层员工的工作挑战性越高，其自我实现需求获得的满足感则约高，但是对于基层员工和中层员工而言，其效果则恰恰相反，基础员工和高层员工更多地将工作挑战性和压力看作是一种负面的因素；
第五，员工幸福感的确会给企业带来正向的绩效。
本文的研究框架和实证结论不仅可以丰富学术界有关员工工作幸福感的研究，而且为企业管理者进行绩效管理以及员工工作质量的提升提供理论和实证借鉴。
ContributorsShu, Man (Author) / Shen, Wei (Thesis advisor) / Wu, Fei (Thesis advisor) / Chen, Xin (Committee member) / Arizona State University (Publisher)
Created2019
Description当前，上市公司的盈余管理问题已是我国资本市场中普遍存在的突出问题。一般来说，一些企业为了满足资本市场对于上市、增发等条件的要求,以及为有效推动企业的并购、重组等行为的顺利实现,甚至为了谋求公司管理层的个别利益,往往运用盈余管理等举措实施公司财报及关键指标的粉饰修正，让不知情的股民蒙受一定的损失。普遍分析显示，我国股市中民营企业比其他企业遭遇的问题和压力更多、更大、更突出,因此民营企业从客观上来说拥有更强的盈余管理动机。而从当前我国资本市场的实际情况来看，我国相关专家学者对盈余管理的系统性深入研究，一般都瞄准了上市企业群体或持续亏损企业，对盈余管理的研究不系统、不全面、不深入，这将对我国进一步提升盈余管理监管水平构成一定不利影响。当前，由于我国民企在自身管理及发展动力方面的特殊性,我国民企的管理、盈余管理特点和国外上市公司还存在着很大的不同,进一步深入研究我国民企上市公司自身管理方面的突出特点，以及其对企业盈余管理等方面的深层次影响,有助于监管层对症下药，更有针对性地研究出台全新的监管措施,进一步提升管理水平。这还可以为公司发展的决策层及相关会计信息使用人员提供一定的决策参考, 因此其拥有十分重要的意义。
本文首先认真总结分析了有关上市企业治理结构和盈余管理等方面的历史文献资料，依托当前资本市场上普遍运用的委托代理、内部人控制和契约等理论，系统研究了我国民企上市公司在自身治理结构方面的突出特征以及其对盈余管理方面所构成影响的深层次原理。在此基础上，本文通过2015-2017年我国上市企业数据，基于截面Jones模型对民营企业和非民营企业盈余管理程度进行测算和比较分析，发现民营企业盈余管理程度更高；从四个层面系统研究民企公司自身的治理结构突出特点,设立回归模型论证了民营企业独特的公司治理结构特征对盈余管理程度确实会产生影响；最后,本文进一步利用修正的费尔萨姆一奥尔森估价模型对民营上市公司盈余管理有公司价值的关系进行了验证，发现两者具有显著相关性。
本文首先认真总结分析了有关上市企业治理结构和盈余管理等方面的历史文献资料，依托当前资本市场上普遍运用的委托代理、内部人控制和契约等理论，系统研究了我国民企上市公司在自身治理结构方面的突出特征以及其对盈余管理方面所构成影响的深层次原理。在此基础上，本文通过2015-2017年我国上市企业数据，基于截面Jones模型对民营企业和非民营企业盈余管理程度进行测算和比较分析，发现民营企业盈余管理程度更高；从四个层面系统研究民企公司自身的治理结构突出特点,设立回归模型论证了民营企业独特的公司治理结构特征对盈余管理程度确实会产生影响；最后,本文进一步利用修正的费尔萨姆一奥尔森估价模型对民营上市公司盈余管理有公司价值的关系进行了验证，发现两者具有显著相关性。
ContributorsChen, Hui (Author) / Shen, Wei (Thesis advisor) / Chang, Chun (Thesis advisor) / Huang, Xiaochuan (Committee member) / Arizona State University (Publisher)
Created2019
Description中国律师制度自“文化大革命”结束后恢复至今，已有近四十年。中国律师行业伴随着中国改革开放的进程，得到了飞速的发展，当然，同时也面临着诸多的问题。重要的问题之一便是，中国律师事务所采用“加盟制合伙人”模式和采用“权益制合伙人”模式之争。本文试图从回顾企业边界的三大理论出发，提出“加盟制合伙人”模式和 “权益制合伙人”模式与合伙人律师的业务专业化程度、业务复杂化程度以及大客户和律师事务所规模关系的四个假设，通过实证分析的方式，试图以企业边界三大理论解释前述四个假设中的关系，并以此期望对律师行业的发展有所启发。
ContributorsChu, Xiaoqing (Author) / Pei, Ker-Wei (Thesis advisor) / Cheng, Shijun (Thesis advisor) / Shen, Wei (Committee member) / Arizona State University (Publisher)
Created2019
Description中国水环境行业当前正处在以质量驱动、效率提升为主导的发展阶段，为积极响应国家政策以及环境发展导向，平衡公众日益增长的公共品需求同公共品短缺、低效之间的矛盾，抓住市场发展机遇，提高企业市场竞争中的核心能力，水环境行业必须要明确资本驱动、效率导向、服务标准提高要求下的价值流方向，加快行业发展动力的创新改革。因此，本文立足政府充分授权下的水环境企业战略联盟模式（具体体现为BOT模式）影响因素研究，包括如下几部分内容：
第一，界定政府充分授权下水环境企业战略联盟内涵，分析其形成的理论基础、水环境企业战略联盟的类型、发展差异性及战略联盟动因。通过梳理战略联盟理论国内外研究现状回顾及评述，提出政府充分授权下水环境企业战略联盟模式研究的主要问题。
第二，探索政府充分授权下水环境企业战略联盟模式的影响因素。通过对水环境基础设施战略联盟项目合同关键内容的深入分析，识别出政府充分授权下水环境企业战略联盟模式的关键影响因素。
第三，实证分析各关键因素对政府充分授权下水环境企业战略联盟模式效果的影响。运用回归分析方法对项目规模、政府政策、监督管理、激励机制、风险分配和投资回报对联盟模式效果的影响进行实证检验，验证了各影响因素对政府充分授权下水环境企业战略联盟模式效果的正向作用。
最后，对政府充分授权下水环境企业战略联盟模式影响因素及作用研究的结论进行总结。
第一，界定政府充分授权下水环境企业战略联盟内涵，分析其形成的理论基础、水环境企业战略联盟的类型、发展差异性及战略联盟动因。通过梳理战略联盟理论国内外研究现状回顾及评述，提出政府充分授权下水环境企业战略联盟模式研究的主要问题。
第二，探索政府充分授权下水环境企业战略联盟模式的影响因素。通过对水环境基础设施战略联盟项目合同关键内容的深入分析，识别出政府充分授权下水环境企业战略联盟模式的关键影响因素。
第三，实证分析各关键因素对政府充分授权下水环境企业战略联盟模式效果的影响。运用回归分析方法对项目规模、政府政策、监督管理、激励机制、风险分配和投资回报对联盟模式效果的影响进行实证检验，验证了各影响因素对政府充分授权下水环境企业战略联盟模式效果的正向作用。
最后，对政府充分授权下水环境企业战略联盟模式影响因素及作用研究的结论进行总结。
ContributorsLi, Zhensheng (Author) / Pei, Ker-Wei (Thesis advisor) / Yu, Xiaoyun (Thesis advisor) / Shen, Wei (Committee member) / Arizona State University (Publisher)
Created2019