ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
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- Creators: Rogers, Rodney
- Creators: Cao, Yu
Description
Several contemporary clarinet works use Chinese folk music elements from different regions in new compositions to entice listener's and performer's appreciation of Chinese culture. However, to date, limited academic research on this topic exists. This research paper introduces six contemporary clarinet works by six Chinese composers: Qigang Chen's Morning Song, Yan Wang's Mu ma zhi ge (The Song of Grazing Horses), An-lun Huang's Capriccio for Clarinet and Strings Op. 41, Bijing Hu's The Sound of Pamir Clarinet Concerto, Mei-Mi Lan's Concerto for Clarinet and String Orchestra with Harp and Percussion, and Yu-Hui Chang's Three Fantasias for Solo Clarinet in B-flat. They are examined from different perspectives, including general structure, style, and rejuvenated folk music use. The focus of this research paper is to investigate the use of Chinese folk music in several works in collaboration with the composers. The author found that although contemporary composers use Chinese folk music differently in their works (i.e., some use melodies, others use harmony, while others use modes), each work celebrates the music and culture of the folk music on which the pieces are based. It is the author's hope to stimulate people's interest in music using Chinese folk music elements, and bring these lesser known works into the common clarinet repertoire.
ContributorsFeng, Chiao-Ting (Author) / Spring, Robert (Thesis advisor) / Gardner, Joshua (Committee member) / Micklich, Albie (Committee member) / Rogers, Rodney (Committee member) / Schuring, Martin (Committee member) / Arizona State University (Publisher)
Created2013
Description
Bright Summer, a one-movement piece for orchestra, was composed in Arizona, and completed in February 2013. The piece is approximately twelve minutes long. The motivation for writing this piece was the death of my mother the year before, in 2012. The prevailing mood of this work is bright and pleasant, expressing my mother's cheerful personality when she was alive. It also portrays bright summer days which resemble my mother's spirit. Thus, soundscape plays an important role in this work. It depicts summer breeze, rustling sounds of leaves, and, to translate a Korean saying, "high blue skies." This soundscape opens the piece as well as closes it. In the middle section, the fast upbeat themes represent my mother's witty and optimistic personality. The piece also contains the presence of a hymn tune, The Love of God is Greater Far, which informs the motivic content and also functions as the climax of the piece. It was my mother's favorite hymn and we used to sing it together following her conversion to Christianity. The piece contains three main sections, which are held together by transitional material based on the soundscape and metric modulations. Unlike my earlier works, Bright Summer is tonal, with upper tertian harmonies prevailing throughout the piece. However, the opening and closing soundscapes do not have functional harmonies. For example, tertian chords appear and vanish silently, leaving behind some resonant sounds without any harmonic progression. Overall, the whole piece is reminiscent of my mother who lived a beautiful life.
ContributorsKim, JeeYeon (Composer) / DeMars, James (Thesis advisor) / Hackbarth, Glenn (Committee member) / Rogers, Rodney (Committee member) / Levy, Benjamin (Committee member) / Rockmaker, Jody (Committee member) / Arizona State University (Publisher)
Created2013
Description
ABSTRACT Developing new non-traditional device models is gaining popularity as the silicon-based electrical device approaches its limitation when it scales down. Membrane systems, also called P systems, are a new class of biological computation model inspired by the way cells process chemical signals. Spiking Neural P systems (SNP systems), a certain kind of membrane systems, is inspired by the way the neurons in brain interact using electrical spikes. Compared to the traditional Boolean logic, SNP systems not only perform similar functions but also provide a more promising solution for reliable computation. Two basic neuron types, Low Pass (LP) neurons and High Pass (HP) neurons, are introduced. These two basic types of neurons are capable to build an arbitrary SNP neuron. This leads to the conclusion that these two basic neuron types are Turing complete since SNP systems has been proved Turing complete. These two basic types of neurons are further used as the elements to construct general-purpose arithmetic circuits, such as adder, subtractor and comparator. In this thesis, erroneous behaviors of neurons are discussed. Transmission error (spike loss) is proved to be equivalent to threshold error, which makes threshold error discussion more universal. To improve the reliability, a new structure called motif is proposed. Compared to Triple Modular Redundancy improvement, motif design presents its efficiency and effectiveness in both single neuron and arithmetic circuit analysis. DRAM-based CMOS circuits are used to implement the two basic types of neurons. Functionality of basic type neurons is proved using the SPICE simulations. The motif improved adder and the comparator, as compared to conventional Boolean logic design, are much more reliable with lower leakage, and smaller silicon area. This leads to the conclusion that SNP system could provide a more promising solution for reliable computation than the conventional Boolean logic.
ContributorsAn, Pei (Author) / Cao, Yu (Thesis advisor) / Barnaby, Hugh (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2013
Description
ABSTRACT Musicians endure injuries at an alarming rate, largely due to the misuse of their bodies. Musicians move their bodies for a living and therefore should understand how to move them in a healthy way. This paper presents Body Mapping as an injury prevention technique specifically directed toward collaborative pianists. A body map is the self-representation in one's brain that includes information on the structure, function, and size of one's body; Body Mapping is the process of refining one's body map to produce coordinated movement. In addition to preventing injury, Body Mapping provides a means to achieve greater musical artistry through the training of movement, attention, and the senses. With the main function of collaborating with one or more musical partners, a collaborative pianist will have the opportunity to share the knowledge of Body Mapping with many fellow musicians. This study demonstrates the author's credentials as a Body Mapping instructor, the current status of the field of collaborative piano, and the recommendation for increased body awareness. Information on the nature and abundance of injuries and Body Mapping concepts are also analyzed. The study culminates in a course syllabus entitled An Introduction to Collaborative Piano and Body Mapping with the objective of imparting fundamental collaborative piano skills integrated with proper body use. The author hopes to inform educators of the benefits of prioritizing health among their students and to provide a Body Mapping foundation upon which their students can build technique.
ContributorsBindel, Jennifer (Author) / Campbell, Andrew (Thesis advisor) / Doan, Jerry (Committee member) / Rogers, Rodney (Committee member) / Ryan, Russell (Committee member) / Schuring, Martin (Committee member) / Arizona State University (Publisher)
Created2013
Description
There are a significant number of musical compositions for violin by composers who used folk songs and dances of various cultures in their music, including works by George Enescu, Béla Bartók and György Ligeti. Less known are pieces that draw on the plethora of melodies and rhythms from Turkey. The purpose of this paper is to help performers become more familiar with two such compositions: Fazil Say's Sonata for Violin and Piano and Cleopatra for Solo Violin. Fazil Say (b. 1970) is considered to be a significant, contemporary Turkish composer. Both of the works discussed in this document simulate traditional "Eastern" instruments, such as the kemenҫe, the baðlama, the kanun and the ud. Additionally, both pieces use themes from folk melodies of Turkey, Turkish dance rhythms and Arabian scales, all framed within traditional structural techniques, such as ostinato bass and the fughetta. Both the Sonata for Violin and Piano and Cleopatra are enormously expressive and musically interesting works, demanding virtuosity and a wide technical range. Although this document does not purport to be a full theoretical analysis, by providing biographical information, analytical descriptions, notes regarding interpretation, and suggestions to assist performers in overcoming technical obstacles, the writer hopes to inspire other violinists to consider learning and performing these works.
ContributorsKalantzi, Panagiota (Author) / Jiang, Danwen (Thesis advisor) / Hill, Gary (Committee member) / Rogers, Rodney (Committee member) / Rotaru, Catalin (Committee member) / Arizona State University (Publisher)
Created2013
Description
The purpose of this project is twofold: to contribute to the literature of chamber ensembles comprising mixed wind, string, and percussion instruments by producing arrangements of three piano rags by William Bolcom; and to highlight Bolcom's pivotal role in the ragtime revival of the 1960's and 1970's. Through his influence as a scholar, composer, and performer, Bolcom (b. 1938), one of the most prominent American composers of his generation, helped garner respect for ragtime as art music and as one of America's great popular music genres. Bolcom's 3 Ghost Rags were written in the tradition of classic piano rags, but with a compositional sensibility that is influenced by the fifty years that separate them from the close of the original ragtime era. The basis for the present orchestrations of 3 Ghost Rags is the collection of instrumental arrangements of piano rags published by Stark Publishing Co., entitled Standard High-Class Rags. More familiarly known as the "Red Back Book," this publication was representative of the exchange of repertoire between piano and ensembles and served as a repertory for the various ragtime revivals that occurred later in the twentieth century. In creating these orchestrations of Bolcom's piano rags, the author strove to provide another medium in which Bolcom's music could be performed, while orchestrating the music for an historically appropriate ensemble.
ContributorsMelley, Eric Charles (Author) / Hill, Gary W. (Thesis advisor) / Bailey, Wayne (Committee member) / Norton, Kay (Committee member) / Rogers, Rodney (Committee member) / Russell, Timothy (Committee member) / Arizona State University (Publisher)
Created2013
Description
The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive, complex, and lengthy. Rapid prototyping and emulation of analog ICs will be significant in the design and testing of complex analog systems. A new approach, Programmable ANalog Device Array (PANDA) that maps any AMS design problem to a transistor-level programmable hardware, is proposed. This approach enables fast system level validation and a reduction in post-Silicon bugs, minimizing design risk and cost. The unique features of the approach include 1) transistor-level programmability that emulates each transistor behavior in an analog design, achieving very fine granularity of reconfiguration; 2) programmable switches that are treated as a design component during analog transistor emulating, and optimized with the reconfiguration matrix; 3) compensation of AC performance degradation through boosting the bias current. Based on these principles, a digitally controlled PANDA platform is designed at 45nm node that can map AMS modules across 22nm to 90nm technology nodes. A systematic emulation approach to map any analog transistor to PANDA cell is proposed, which achieves transistor level matching accuracy of less than 5% for ID and less than 10% for Rout and Gm. Circuit level analog metrics of a voltage-controlled oscillator (VCO) emulated by PANDA, match to those of the original designs in 90nm nodes with less than a 5% error. Voltage-controlled delay lines at 65nm and 90nm are emulated by 32nm PANDA, which successfully match important analog metrics. And at-speed emulation is achieved as well. Several other 90nm analog blocks are successfully emulated by the 45nm PANDA platform, including a folded-cascode operational amplifier and a sample-and-hold module (S/H)
ContributorsXu, Cheng (Author) / Cao, Yu (Thesis advisor) / Blain Christen, Jennifer (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2012
Description
Scaling of the classical planar MOSFET below 20 nm gate length is facing not only technological difficulties but also limitations imposed by short channel effects, gate and junction leakage current due to quantum tunneling, high body doping induced threshold voltage variation, and carrier mobility degradation. Non-classical multiple-gate structures such as double-gate (DG) FinFETs and surrounding gate field-effect-transistors (SGFETs) have good electrostatic integrity and are an alternative to planar MOSFETs for below 20 nm technology nodes. Circuit design with these devices need compact models for SPICE simulation. In this work physics based compact models for the common-gate symmetric DG-FinFET, independent-gate asymmetric DG-FinFET, and SGFET are developed. Despite the complex device structure and boundary conditions for the Poisson-Boltzmann equation, the core structure of the DG-FinFET and SGFET models, are maintained similar to the surface potential based compact models for planar MOSFETs such as SP and PSP. TCAD simulations show differences between the transient behavior and the capacitance-voltage characteristics of bulk and SOI FinFETs if the gate-voltage swing includes the accumulation region. This effect can be captured by a compact model of FinFETs only if it includes the contribution of both types of carriers in the Poisson-Boltzmann equation. An accurate implicit input voltage equation valid in all regions of operation is proposed for common-gate symmetric DG-FinFETs with intrinsic or lightly doped bodies. A closed-form algorithm is developed for solving the new input voltage equation including ambipolar effects. The algorithm is verified for both the surface potential and its derivatives and includes a previously published analytical approximation for surface potential as a special case when ambipolar effects can be neglected. The symmetric linearization method for common-gate symmetric DG-FinFETs is developed in a form free of the charge-sheet approximation present in its original formulation for bulk MOSFETs. The accuracy of the proposed technique is verified by comparison with exact results. An alternative and computationally efficient description of the boundary between the trigonometric and hyperbolic solutions of the Poisson-Boltzmann equation for the independent-gate asymmetric DG-FinFET is developed in terms of the Lambert W function. Efficient numerical algorithm is proposed for solving the input voltage equation. Analytical expressions for terminal charges of an independent-gate asymmetric DG-FinFET are derived. The new charge model is C-infinity continuous, valid for weak as well as for strong inversion condition of both the channels and does not involve the charge-sheet approximation. This is accomplished by developing the symmetric linearization method in a form that does not require identical boundary conditions at the two Si-SiO2 interfaces and allows for volume inversion in the DG-FinFET. Verification of the model is performed with both numerical computations and 2D TCAD simulations under a wide range of biasing conditions. The model is implemented in a standard circuit simulator through Verilog-A code. Simulation examples for both digital and analog circuits verify good model convergence and demonstrate the capabilities of new circuit topologies that can be implemented using independent-gate asymmetric DG-FinFETs.
ContributorsDessai, Gajanan (Author) / Gildenblat, Gennady (Committee member) / McAndrew, Colin (Committee member) / Cao, Yu (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2012
Description
Test cost has become a significant portion of device cost and a bottleneck in high volume manufacturing. Increasing integration density and shrinking feature sizes increased test time/cost and reduce observability. Test engineers have to put a tremendous effort in order to maintain test cost within an acceptable budget. Unfortunately, there is not a single straightforward solution to the problem. Products that are tested have several application domains and distinct customer profiles. Some products are required to operate for long periods of time while others are required to be low cost and optimized for low cost. Multitude of constraints and goals make it impossible to find a single solution that work for all cases. Hence, test development/optimization is typically design/circuit dependent and even process specific. Therefore, test optimization cannot be performed using a single test approach, but necessitates a diversity of approaches. This works aims at addressing test cost minimization and test quality improvement at various levels. In the first chapter of the work, we investigate pre-silicon strategies, such as design for test and pre-silicon statistical simulation optimization. In the second chapter, we investigate efficient post-silicon test strategies, such as adaptive test, adaptive multi-site test, outlier analysis, and process shift detection/tracking.
ContributorsYilmaz, Ender (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Cao, Yu (Committee member) / Christen, Jennifer Blain (Committee member) / Arizona State University (Publisher)
Created2012
Description
Memories play an integral role in today's advanced ICs. Technology scaling has enabled high density designs at the price paid for impact due to variability and reliability. It is imperative to have accurate methods to measure and extract the variability in the SRAM cell to produce accurate reliability projections for future technologies. This work presents a novel test measurement and extraction technique which is non-invasive to the actual operation of the SRAM memory array. The salient features of this work include i) A single ended SRAM test structure with no disturbance to SRAM operations ii) a convenient test procedure that only requires quasi-static control of external voltages iii) non-iterative method that extracts the VTH variation of each transistor from eight independent switch point measurements. With the present day technology scaling, in addition to the variability with the process, there is also the impact of other aging mechanisms which become dominant. The various aging mechanisms like Negative Bias Temperature Instability (NBTI), Channel Hot Carrier (CHC) and Time Dependent Dielectric Breakdown (TDDB) are critical in the present day nano-scale technology nodes. In this work, we focus on the impact of NBTI due to aging in the SRAM cell and have used Trapping/De-Trapping theory based log(t) model to explain the shift in threshold voltage VTH. The aging section focuses on the following i) Impact of Statistical aging in PMOS device due to NBTI dominates the temporal shift of SRAM cell ii) Besides static variations , shifting in VTH demands increased guard-banding margins in design stage iii) Aging statistics remain constant during the shift, presenting a secondary effect in aging prediction. iv) We have investigated to see if the aging mechanism can be used as a compensation technique to reduce mismatch due to process variations. Finally, the entire test setup has been tested in SPICE and also validated with silicon and the results are presented. The method also facilitates the study of design metrics such as static, read and write noise margins and also the data retention voltage and thus help designers to improve the cell stability of SRAM.
ContributorsRavi, Venkatesa (Author) / Cao, Yu (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Clark, Lawrence (Committee member) / Arizona State University (Publisher)
Created2013