ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
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- Creators: Yu, Hongbin
Description
CMOS technology is expected to enter the 10nm regime for future integrated circuits (IC). Such aggressive scaling leads to vastly increased variability, posing a grand challenge to robust IC design. Variations in CMOS are often divided into two types: intrinsic variations and process-induced variations. Intrinsic variations are limited by fundamental physics. They are inherent to CMOS structure, considered as one of the ultimate barriers to the continual scaling of CMOS devices. In this work the three primary intrinsic variations sources are studied, including random dopant fluctuation (RDF), line-edge roughness (LER) and oxide thickness fluctuation (OTF). The research is focused on the modeling and simulation of those variations and their scaling trends. Besides the three variations, a time dependent variation source, Random Telegraph Noise (RTN) is also studied. Different from the other three variations, RTN does not contribute much to the total variation amount, but aggregate the worst case of Vth variations in CMOS. In this work a TCAD based simulation study on RTN is presented, and a new SPICE based simulation method for RTN is proposed for time domain circuit analysis. Process-induced variations arise from the imperfection in silicon fabrication, and vary from foundries to foundries. In this work the layout dependent Vth shift due to Rapid-Thermal Annealing (RTA) are investigated. In this work, we develop joint thermal/TCAD simulation and compact modeling tools to analyze performance variability under various layout pattern densities and RTA conditions. Moreover, we propose a suite of compact models that bridge the underlying RTA process with device parameter change for efficient design optimization.
ContributorsYe, Yun, Ph.D (Author) / Cao, Yu (Thesis advisor) / Yu, Hongbin (Committee member) / Song, Hongjiang (Committee member) / Clark, Lawrence (Committee member) / Arizona State University (Publisher)
Created2011
Description
The microelectronics technology has seen a tremendous growth over the past sixty years. The advancements in microelectronics, which shows the capability of yielding highly reliable and reproducible structures, have made the mass production of integrated electronic components feasible. Miniaturized, low-cost, and accurate sensors became available due to the rise of the microelectronics industry. A variety of sensors are being used extensively in many portable applications. These sensors are promising not only in research area but also in daily routine applications.
However, many sensing systems are relatively bulky, complicated, and expensive and main advantages of new sensors do not play an important role in practical applications. Many challenges arise due to intricacies for sensor packaging, especially operation in a solution environment. Additional problems emerge when interfacing sensors with external off-chip components. A large amount of research in the field of sensors has been focused on how to improve the system integration.
This work presents new methods for the design, fabrication, and integration of sensor systems. This thesis addresses these challenges, for example, interfacing microelectronic system to a liquid environment and developing a new technique for impedimetric measurement. This work also shows a new design for on-chip optical sensor without any other extra components or post-processing.
However, many sensing systems are relatively bulky, complicated, and expensive and main advantages of new sensors do not play an important role in practical applications. Many challenges arise due to intricacies for sensor packaging, especially operation in a solution environment. Additional problems emerge when interfacing sensors with external off-chip components. A large amount of research in the field of sensors has been focused on how to improve the system integration.
This work presents new methods for the design, fabrication, and integration of sensor systems. This thesis addresses these challenges, for example, interfacing microelectronic system to a liquid environment and developing a new technique for impedimetric measurement. This work also shows a new design for on-chip optical sensor without any other extra components or post-processing.
ContributorsLuo, Tao (Author) / Blain Christen, Jennifer (Thesis advisor) / Song, Hongjiang (Committee member) / Goryll, Michael (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2015
Description
A novel integrated constant current LED driver design on a single chip is developed in this dissertation. The entire design consists of two sections. The first section is a DC-DC switching regulator (boost regulator) as the frontend power supply; the second section is the constant current LED driver system.
In the first section, a pulse width modulated (PWM) peak current mode boost regulator is utilized. The overall boost regulator system and its related sub-cells are explained. Among them, an original error amplifier design, a current sensing circuit and slope compensation circuit are presented.
In the second section – the focus of this dissertation – a highly accurate constant current LED driver system design is unveiled. The detailed description of this highly accurate LED driver system and its related sub-cells are presented. A hybrid PWM and linear current modulation scheme to adjust the LED driver output currents is explained. The novel design ideas to improve the LED current accuracy and channel-to-channel output current mismatch are also explained in detail. These ideas include a novel LED driver system architecture utilizing 1) a dynamic current mirror structure and 2) a closed loop structure to keep the feedback loop of the LED driver active all the time during both PWM on-duty and PWM off-duty periods. Inside the LED driver structure, the driving amplifier with a novel slew rate enhancement circuit to dramatically accelerate its response time is also presented.
In the first section, a pulse width modulated (PWM) peak current mode boost regulator is utilized. The overall boost regulator system and its related sub-cells are explained. Among them, an original error amplifier design, a current sensing circuit and slope compensation circuit are presented.
In the second section – the focus of this dissertation – a highly accurate constant current LED driver system design is unveiled. The detailed description of this highly accurate LED driver system and its related sub-cells are presented. A hybrid PWM and linear current modulation scheme to adjust the LED driver output currents is explained. The novel design ideas to improve the LED current accuracy and channel-to-channel output current mismatch are also explained in detail. These ideas include a novel LED driver system architecture utilizing 1) a dynamic current mirror structure and 2) a closed loop structure to keep the feedback loop of the LED driver active all the time during both PWM on-duty and PWM off-duty periods. Inside the LED driver structure, the driving amplifier with a novel slew rate enhancement circuit to dramatically accelerate its response time is also presented.
ContributorsWang, Ge (Author) / Holbert, Keith E. (Thesis advisor) / Song, Hongjiang (Committee member) / Ayyanar, Raja (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2016
Description
Visible light communication (VLC) is the promise of a high data rate wireless network for both indoor and outdoor uses. It competes with 5G radio frequency (RF) system as well. Even though the breakthrough of Gallium Nitride (GaN) based micro-light-emitting-diodes (micro-LEDs) enhances the -3dB modulation bandwidth dramatically from tens of MHz to hundreds of MHz, the optical power onto a fast photo receiver drops exponentially. It determines the signal to noise ratio (SNR) of VLC. For full implementation of the useful high data-rate VLC link enabled by a GaN-based micro-LED, it needs focusing optics and a tracking system. In this dissertation, we demonstrate a novel active on-chip monitoring system for VLC using a GaN-based micro-LED and none-return-to-zero on-off keying (NRZ-OOK) modulation scheme. By this innovative technique without manual focusing, the field of view (FOV) was enlarged to 120° and data rates up to 600 Mbps at a bit error rate (BER) of 2.1×10⁻⁴ were achieved. This work demonstrates the establishment of a VLC physical link. It shows improved communication quality by orders, making it optimized for real communications.
This dissertation also gives an experimental demonstration of non-line-of-sight (NLOS) visible light communication (VLC) using a single 80 μm gallium nitride (GaN) based micro-light-emitting diode (micro-LED). IEEE 802.11ac modulation scheme with 80 MHz bandwidth, as an entry level of the fifth generation of Wi-Fi, was employed to use the micro-LED bandwidth efficiently. These practical techniques were successfully utilized to achieve a demonstration of line-of-sight (LOS) VLC at a speed of 433 Mbps, and a bit error rate (BER) of 10⁻⁵ with a free space transmit distance 3.6 m. Besides this, we demonstrated directed NLOS VLC links based on mirror reflections with a data rate of 433 Mbps and a BER of 10⁻⁴. For non-directed NLOS VLC using a print paper as the reflective material, 195 Mbps data rate and a BER of 10⁻⁵ was achieved.
This dissertation also gives an experimental demonstration of non-line-of-sight (NLOS) visible light communication (VLC) using a single 80 μm gallium nitride (GaN) based micro-light-emitting diode (micro-LED). IEEE 802.11ac modulation scheme with 80 MHz bandwidth, as an entry level of the fifth generation of Wi-Fi, was employed to use the micro-LED bandwidth efficiently. These practical techniques were successfully utilized to achieve a demonstration of line-of-sight (LOS) VLC at a speed of 433 Mbps, and a bit error rate (BER) of 10⁻⁵ with a free space transmit distance 3.6 m. Besides this, we demonstrated directed NLOS VLC links based on mirror reflections with a data rate of 433 Mbps and a BER of 10⁻⁴. For non-directed NLOS VLC using a print paper as the reflective material, 195 Mbps data rate and a BER of 10⁻⁵ was achieved.
ContributorsLu, Zhijian (Author) / Zhao, Yuji (Thesis advisor) / Yu, Hongbin (Committee member) / Song, Hongjiang (Committee member) / Bliss, Daniel (Committee member) / Arizona State University (Publisher)
Created2017