This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.

In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.

Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.

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Description
Interdigitated back contact (IBC) solar cells have achieved the highest single junction silicon wafer-based solar cell power conversion efficiencies reported to date. This thesis is about the fabrication of a high-efficiency silicon heterojunction IBC solar cell for potential use as the bottom cell for a 3-terminal lattice-matched dilute-nitride Ga (In)NP(As)/Si

Interdigitated back contact (IBC) solar cells have achieved the highest single junction silicon wafer-based solar cell power conversion efficiencies reported to date. This thesis is about the fabrication of a high-efficiency silicon heterojunction IBC solar cell for potential use as the bottom cell for a 3-terminal lattice-matched dilute-nitride Ga (In)NP(As)/Si monolithic tandem solar cell. An effective fabrication process has been developed and the process challenges related to open circuit voltage (Voc), series resistance (Rs), and fill factor (FF) are experimentally analyzed. While wet etching, the sample lost the initial passivation, and by changing the etchant solution and passivation process, the voltage at maximum power recovered to an initial value of over 710 mV before metallization. The factors reducing the series resistance loss in IBC cells were also studied. One of these factors was the Indium Tin Oxide (ITO) sputtering parameters, which impact the conductivity of the ITO layer and transport across the a-Si:H/ITO interface. For the standard recipe, the chamber pressure was 3.5 mTorr with no oxygen partial pressure, and the thickness of the ITO layer in contact with the a-Si:H layers, was optimized to 150 nm. The patterning method for the metal contacts and final annealing also change the contact resistance of the base and emitter stack layers. The final annealing step is necessary to recover the sputtering damage; however, the higher the annealing time the higher the final IBC series resistance. The best efficiency achieved was 19.3% (Jsc = 37 mA/cm2, Voc = 691 mV, FF = 71.7%) on 200 µm thick 1-15 Ω-cm n-type CZ C-Si with a designated area of 4 cm2.
ContributorsMoeini Rizi, Mansoure (Author) / Goodnick, Stephen (Thesis advisor) / Honsberg, Christina (Committee member) / Goryll, Michael (Committee member) / Smith, David (Committee member) / Bowden, Stuart (Committee member) / Arizona State University (Publisher)
Created2022
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Description
Crystalline silicon covers more than 85% of the global photovoltaics industry and has sustained a nearly 30% year-over-year growth rate. Continued cost and capital expenditure (CAPEX) reductions are needed to sustain this growth. Using thin silicon wafers well below the current industry standard of 160 µm can reduce manufacturing cost,

Crystalline silicon covers more than 85% of the global photovoltaics industry and has sustained a nearly 30% year-over-year growth rate. Continued cost and capital expenditure (CAPEX) reductions are needed to sustain this growth. Using thin silicon wafers well below the current industry standard of 160 µm can reduce manufacturing cost, CAPEX, and levelized cost of electricity. Additionally, thinner wafers enable more flexible and lighter module designs, making them more compelling in market segments like building-integrated photovoltaics, portable power, aerospace, and automotive industries. Advanced architectures and superior surface passivation schemes are needed to enable the use of very thin silicon wafers. Silicon heterojunction (SHJ) and SHJ with interdigitated back contact solar cells have demonstrated open-circuit voltages surpassing 720 mV and the potential to surpass 25% conversion efficiency. These factors have led to an increasing interest in exploring SHJ solar cells on thin wafers. In this work, the passivation capability of the thin intrinsic hydrogenated amorphous silicon layer is improved by controlling the deposition temperature and the silane-to-hydrogen dilution ratio. An effective way to parametrize surface recombination is by using surface saturation current density and a very low surface saturation density is achieved on textured wafers for wafer thicknesses ranging between 40 and 180 µm which is an order of magnitude lesser compared to the prevalent industry standards. Implied open-circuit voltages over 760 mV were accomplished on SHJ structures deposited on n-type silicon wafers with thicknesses below 50 µm. An analytical model is also described for a better understanding of the variation of the recombination fractions for varying substrate thicknesses. The potential of using very thin wafers is also established by manufacturing SHJ solar cells, using industrially pertinent processing steps, on 40 µm thin standalone wafers while achieving maximum efficiency of 20.7%. It is also demonstrated that 40 µm thin SHJ solar cells can be manufactured using these processes on large areas. An analysis of the percentage contribution of current, voltage, and resistive losses are also characterized for the SHJ devices fabricated in this work for varying substrate thicknesses.
ContributorsBalaji, Pradeep (Author) / Bowden, Stuart (Thesis advisor) / Alford, Terry (Thesis advisor) / Goryll, Michael (Committee member) / Augusto, Andre (Committee member) / Arizona State University (Publisher)
Created2021
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Description
Unlike conventional solar cells, modern high efficiency passivated contacts solar cells like silicon heterojunction (SHJ) cells have excellent surface passivation and use high bulk lifetime wafers which increase the operating injection level of these devices. These solar cell architectures can benefit from having lower doped substrates, with undoped solar cells

Unlike conventional solar cells, modern high efficiency passivated contacts solar cells like silicon heterojunction (SHJ) cells have excellent surface passivation and use high bulk lifetime wafers which increase the operating injection level of these devices. These solar cell architectures can benefit from having lower doped substrates, with undoped solar cells becoming an attractive option. There has been very limited literature on high bulk resistivity substrates (>>10 Ωcm). This thesis work provides a comprehensive assessment of the potential of high resistivity/undoped substrates for high performance and more reliable silicon solar cells by demonstrating the results from modeling as well as characterization of SHJ solar cells fabricated with high resistivity/undoped substrates under real-world illumination and temperature conditions that the cells/modules experience in the field. In this work, the results from the analytical model demonstrated the effects of various defects, variation in doping and temperature on the performance of silicon solar cells. Experimentally, SHJ cells with bulk resistivities in the range of 1 Ωcm to >15k Ωcm were fabricated, and cell efficiencies over 20% were measured at standard testing conditions (STC) across the entire range of bulk resistivities. The illumination response (0.1-1 sun) and temperature coefficients (25-90 °C) were shown to be independent of the bulk resistivity. No light induced degradation was observed in the n-type SHJ cells of all resistivity ranges whereas high resistivity p-type SHJ cells showed less degradation compared to that of commercial resistivity range (<10 Ωcm). Very high reverse breakdown voltages (over 1 kV) were demonstrated for SHJ cells fabricated with high resistivity wafers. Using simulation, the importance of having cells in the modules with breakdown voltage higher than the series string voltage for safe and reliable operation of the photovoltaic (PV) system was highlighted. The ingot yield can be improved by moving towards high resistivity ranges to manufacture high efficiency reliable solar cells by utilizing the entire ingot and eliminating the need to adhere to narrow resistivity range. Thus, the novel findings from this work can have profound impact on ingot and module manufacturing resulting in significant cost savings as well as improvement in the system reliability.
ContributorsSrinivasa, Apoorva (Author) / Bowden, Stuart (Thesis advisor) / Honsberg, Christiana (Committee member) / King, Richard (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2021
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Description
In this dissertation, the nanofabrication process is characterized for fabrication of nanostructure on surface of silicon and gallium phosphide using silica nanosphere lithography (SNL) and metal assisted chemical etching (MACE) process. The SNL process allows fast process time and well defined silica nanosphere monolayer by spin-coating process after mixing N,N-dimethyl-formamide

In this dissertation, the nanofabrication process is characterized for fabrication of nanostructure on surface of silicon and gallium phosphide using silica nanosphere lithography (SNL) and metal assisted chemical etching (MACE) process. The SNL process allows fast process time and well defined silica nanosphere monolayer by spin-coating process after mixing N,N-dimethyl-formamide (DMF) solvent. The MACE process achieves the high aspect ratio structure fabrication using the reaction between metal and wet chemical. The nanostructures are fabricated on Si surface for enhanced light management, but, without proper surface passivation those gains hardly impact the performance of the solar cell. The surface passivation of nanostructures is challenging, not only due to larger surface areas and aspect ratios, but also has a direct result of the nanofabrication processes. In this research, the surface passivation of silicon nanostructures is improved by modifying the silica nanosphere lithography (SNL) and the metal assisted chemical etching (MACE) processes, frequently used to fabricate nanostructures. The implementation of a protective silicon oxide layer is proposed prior to the lithography process to mitigate the impact of the plasma etching during the SNL. Additionally, several adhesion layers are studied, chromium (Cr), nickel (Ni) and titanium (Ti) with gold (Au), used in the MACE process. The metal contamination is one of main damage and Ti makes the mitigation of metal contamination. Finally, a new chemical etching step is introduced, using potassium hydroxide at room temperature, to smooth the surface of the nanostructures after the MACE process. This chemical treatment allows to improve passivation by surface area control and removing surface defects. In this research, I demonstrate the Aluminum Oxide (Al2O3) passivation on nanostructure using atomic layer deposition (ALD) process. 10nm of Al2O3 layer makes effective passivation on nanostructure with optimized post annealing in forming gas (N2/H2) environment. However, 10nm thickness is not suitable for hetero structure because of carrier transportation. For carrier transportation, ultrathin Al2O3 (≤ 1nm) layer is used for passivation, but effective passivation is not achieved because of insufficient hydrogen contents. This issue is solved to use additional ultrathin SiO2 (1nm) below Al2O3 layer and hydrogenation from doped a-Si:H. Moreover, the nanostructure is creased on gallium phosphide (GaP) by SNL and MACE process. The fabrication process is modified by control of metal layer and MACE solution.
ContributorsKim, Sangpyeong (Author) / Honsberg, Christiana (Thesis advisor) / Bowden, Stuart (Committee member) / Goryll, Michael (Committee member) / Augusto, Andre (Committee member) / Arizona State University (Publisher)
Created2021