ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
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- Creators: Mallik, Ayan
Description
With the emergence of electric transportation and the infrastructure for electric vehicles (EVs), numerous viable approaches and topologies have emerged. In order to improve the power quality of the grid, it is essential for Onboard Battery Chargers (OBC) for electric vehicles to maintain a power factor closer to unity. This study mainly focuses on two prominent PFC topologies, Totem-pole PFC (TPFC) and H-Bridge PFC (HPFC), which are simple to implement and capable enough of providing high operating efficiency. This study elucidates the comprehensive comparison of the TPFC and HPFC converters using the comprehensive mathematical modeling approach, simulation models, and the hardware experiments. Also, the comparison of the EMI filter requirement and design of DM EMI filter for both the topologies is also extensively illustrated in this study. Firstly, focusing the comprehensive mathematical models of TPFC and HPFC converters, which includes the mathematical formation of the duty cycle for both the converters incorporating the discretized input current controller into the mathematical model which gives more closer comparison when it is compared to simulation models and the hardware experiment model operations. The input current FFT analysis and the THD modeling are also covered in the mathematical modeling of TPFC and HPFC converters. Moreover, the EMI noise is modeled, and the corresponding EMI filter is also designed for both the PFC topologies. Further, the simulation models of TPFC and HPFC converters are also developed and the outputs of the simulation models show an input AC current is precisely following the input AC voltage and also the output voltage of constant 400V is attained for both the PFC converters. Similarly, for the experimental results, the constant 400V regulated DC output voltage is obtained and the input AC current is following the input AC voltage with the power factor of 0.983 for TPFC and 0.99 for HPFC converter. Moreover, the implementation of the EMI filter at the front end of the converter succinctly attenuates the EMI noise and complied within the FCC Class A limit for both TPFC and HPFC converters.
ContributorsRathod, Parth Narendrakumar (Author) / Mallik, Ayan (Thesis advisor) / Ayyanar, Raja (Committee member) / Ranjram, Mike (Committee member) / Arizona State University (Publisher)
Created2023
Description
Wide-BandGap (WBG) material-based switching devices such as gallium nitride (GaN) High Electron Mobility Transistors (HEMTs) and Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are considered very promising and valuable candidates for replacing conventional Silicon (Si) MOSFETs in various industrial high-frequency high-power applications, mainly because of their capabilities of higher switching frequencies with less switching and conduction losses. However, to make the most of their advantages, it is crucial to understand the intrinsic differences between WBG-based and Si-based switching devices and investigate effective means to safely, efficiently, and reliably utilize the WBG devices. Firstly, a comprehensive understanding of traditional Modular Multilevel Converter (MMC) topology is presented. Different novel SubModule (SM) topologies are described in detail. The low frequency SM voltage fluctuation problem is also discussed. Based on the analysis, some novel topologies which manage to damp or eliminate the voltage ripple are illustrated in detail. As demonstrated, simulation results of these proposed topologies verify the theory. Moreover, the hardware design considerations of traditional MMC platform are discussed. Based on these, a 6 kW smart Modular Isolated Multilevel Converter (MIMC) with symmetrical resonant converter based Ripple current elimination channels is delivered and related experimental results further verify the effectiveness of proposed topology. Secondly, the evolution of GaN transistor structure, from classical normally-on device to normally-off GaN, is well-described. As the benefits, channel current capability and drain-source voltage are significantly boosted. However, accompanying the evolution of GaN devices, the dynamic on-resistance issue is one of the urgent problems to be solved since it strongly affects the GaN device current and voltage limit. Unlike traditional methods from the perspective of transistor structure, this report proposes a novel Multi-Level-Voltage-Output gate drive circuit (MVO-GD) aimed at alleviating the dynamic on-resistance issue from engineering point of view. The comparative tests of proposed MVO-GD and the standard 2-level gate driver (STD-GD) are conducted under variable test conditions which may affect dynamic on-resistance, such as drain-source voltage, gate current width, device package temperature and so on. The experimental waveforms and data have been demonstrated and analyzed.
ContributorsLIU, YIFU (Author) / Lei, Qin (Thesis advisor) / Ayyanar, Raja (Committee member) / Ranjram, Mike (Committee member) / Mallik, Ayan (Committee member) / Arizona State University (Publisher)
Created2022
Description
Power amplifiers and tuneable matching networks for plasma generation systems arebeing continuously advanced, and recent innovations have shown tremendous
improvements in their size, efficiency, and capability. These improvements must
ultimately be validated on a live plasma chamber, but this is costly and time-consuming,
and debugging errors or failures is a challenge owing to the highly dynamic nature of
the plasma and the experimental prototype nature of the advancements. This work
addresses this challenge by developing a reactive load emulation system that can mimic
the inductive reactance of a live plasma chamber. This includes a study of the saturation
characteristics of low-permeability, high-frequency materials, demonstration of the
suitability of this method for plasma emulation, and the design of an inductor array
platform which verifies the approach.
ContributorsTagare, Darshan Ravindra (Author) / Ranjram, Mike (Thesis advisor) / Mallik, Ayan (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2024