ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
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- All Subjects: Power Electronics
Description
This dissertation examines modeling, design and control challenges associatedwith two classes of power converters: a direct current-direct current (DC-DC) step-down (buck)
regulator and a 3-phase (3-ϕ) 4-wire direct current-alternating current
(DC-AC) inverter. These are widely used for power transfer in a variety of industrial
and personal applications. This motivates the precise quantification of conditions
under which existing modeling and design methods yield satisfactory designs, and
the study of alternatives when they don’t. This dissertation describes a method
utilizing Fourier components of the input square wave and the inductor-capacitor (LC)
filter transfer function, which doesn’t require the small ripple approximation. Then,
trade-offs associated with the choice of the filter order are analyzed for integrated buck
converters with a constraint on their chip area. Design specifications which would
justify using a fourth or sixth order filter instead of the widely used second order
one are examined. Next, sampled-data (SD) control of a buck converter is analyzed.
Three methods for the digital controller design are studied: analog design followed
by discretization, direct digital design of a discretized plant, and a “lifting” based
method wherein the sampling time is incorporated in the design process by lifting
the continuous-time design plant before doing the controller design. Specifically,
controller performance is quantified by studying the induced-L2 norm of the closed
loop system for a range of switching/sampling frequencies. In the final segment of
this dissertation, the inner-outer control loop, employed in inverters with an
inductor-capacitor-inductor (LCL) output filter, is studied. Closed loop sensitivities for the
loop broken at the error and the control are examined, demonstrating that traditional
methods only address these properties for one loop-breaking point. New controllers
are then provided for improving both sets of properties.
ContributorsSarkar, Aratrik (Author) / Rodriguez, Armando A (Thesis advisor) / Si, Jennie (Committee member) / Mittelmann, Hans D (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2021
Description
A new photovoltaic (PV) array power converter circuit is presented. The salient features of this inverter are: transformerless topology, grounded PV array, and only film capacitors. The motivations are to reduce cost, eliminate leakage ground currents, and improve reliability. The use of Silicon Carbide (SiC) transistors is the key enabling technology for this particular circuit to attain good efficiency.
Traditionally, grid connected PV inverters required a transformer for isolation and safety. The disadvantage of high frequency transformer based inverters is complexity and cost. Transformerless inverters have become more popular recently, although they can be challenging to implement because of possible high frequency currents through the PV array's stay capacitance to earth ground. Conventional PV inverters also typically utilize electrolytic capacitors for bulk power buffering. However such capacitors can be prone to decreased reliability.
The solution proposed here to solve these problems is a bi directional buck boost converter combined with half bridge inverters. This configuration enables grounding of the array's negative terminal and passive power decoupling with only film capacitors.
Several aspects of the proposed converter are discussed. First a literature review is presented on the issues to be addressed. The proposed circuit is then presented and examined in detail. This includes theory of operation, component selection, and control systems. An efficiency analysis is also conducted. Simulation results are then presented that show correct functionality. A hardware prototype is built and experiment results also prove the concept. Finally some further developments are mentioned.
As a summary of the research a new topology and control technique were developed. The resultant circuit is a high performance transformerless PV inverter with upwards of 97% efficiency.
Traditionally, grid connected PV inverters required a transformer for isolation and safety. The disadvantage of high frequency transformer based inverters is complexity and cost. Transformerless inverters have become more popular recently, although they can be challenging to implement because of possible high frequency currents through the PV array's stay capacitance to earth ground. Conventional PV inverters also typically utilize electrolytic capacitors for bulk power buffering. However such capacitors can be prone to decreased reliability.
The solution proposed here to solve these problems is a bi directional buck boost converter combined with half bridge inverters. This configuration enables grounding of the array's negative terminal and passive power decoupling with only film capacitors.
Several aspects of the proposed converter are discussed. First a literature review is presented on the issues to be addressed. The proposed circuit is then presented and examined in detail. This includes theory of operation, component selection, and control systems. An efficiency analysis is also conducted. Simulation results are then presented that show correct functionality. A hardware prototype is built and experiment results also prove the concept. Finally some further developments are mentioned.
As a summary of the research a new topology and control technique were developed. The resultant circuit is a high performance transformerless PV inverter with upwards of 97% efficiency.
ContributorsBreazeale, Lloyd C (Author) / Ayyanar, Raja (Thesis advisor) / Karady, George G. (Committee member) / Tylavsky, Daniel (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2014
Description
This thesis addresses the design and control of three phase inverters. Such inverters are
used to produce three-phase sinusoidal voltages and currents from a DC source. They
are critical for injecting power from renewable energy sources into the grid. This is
especially true since many of these sources of energy are DC sources (e.g. solar
photovoltaic) or need to be stored in DC batteries because they are intermittent (e.g. wind
and solar). Two classes of inverters are examined in this thesis. A control-centric design
procedure is presented for each class. The first class of inverters is simple in that they
consist of three decoupled subsystems. Such inverters are characterized by no mutual
inductance between the three phases. As such, no multivariable coupling is present and
decentralized single-input single-output (SISO) control theory suffices to generate
acceptable control designs. For this class of inverters several families of controllers are
addressed in order to examine command following as well as input disturbance and noise
attenuation specifications. The goal here is to illuminate fundamental tradeoffs. Such
tradeoffs include an improvement in the in-band command following and output
disturbance attenuation versus a deterioration in out-of-band noise attenuation.
A fundamental deficiency associated with such inverters is their large size. This can be
remedied by designing a smaller core. This naturally leads to the second class of inverters
considered in this work. These inverters are characterized by significant mutual
inductances and multivariable coupling. As such, SISO control theory is generally not
adequate and multiple-input multiple-output (MIMO) theory becomes essential for
controlling these inverters.
used to produce three-phase sinusoidal voltages and currents from a DC source. They
are critical for injecting power from renewable energy sources into the grid. This is
especially true since many of these sources of energy are DC sources (e.g. solar
photovoltaic) or need to be stored in DC batteries because they are intermittent (e.g. wind
and solar). Two classes of inverters are examined in this thesis. A control-centric design
procedure is presented for each class. The first class of inverters is simple in that they
consist of three decoupled subsystems. Such inverters are characterized by no mutual
inductance between the three phases. As such, no multivariable coupling is present and
decentralized single-input single-output (SISO) control theory suffices to generate
acceptable control designs. For this class of inverters several families of controllers are
addressed in order to examine command following as well as input disturbance and noise
attenuation specifications. The goal here is to illuminate fundamental tradeoffs. Such
tradeoffs include an improvement in the in-band command following and output
disturbance attenuation versus a deterioration in out-of-band noise attenuation.
A fundamental deficiency associated with such inverters is their large size. This can be
remedied by designing a smaller core. This naturally leads to the second class of inverters
considered in this work. These inverters are characterized by significant mutual
inductances and multivariable coupling. As such, SISO control theory is generally not
adequate and multiple-input multiple-output (MIMO) theory becomes essential for
controlling these inverters.
ContributorsSarkar, Aratrik (Author) / Rodriguez, Armando A. (Thesis advisor) / Si, Jennie (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2015
Description
This thesis investigates different unidirectional topologies for the on-board charger in an electric vehicle and proposes soft-switching solutions in both the AC/DC and DC/DC stage of the converter with a power rating of 3.3 kW. With an overview on different charger topologies and their applicability with respect to the target specification a soft-switching technique to reduce the switching losses of a single phase boost-type PFC is proposed. This work is followed by a modification to the popular soft-switching topology, the dual active bridge (DAB) converter for application requiring unidirectional power flow. The topology named as the semi-dual active bridge (S-DAB) is obtained by replacing the fully active (four switches) bridge on the load side of a DAB by a semi-active (two switches and two diodes) bridge. The operating principles, waveforms in different intervals and expression for power transfer, which differ significantly from the basic DAB topology, are presented in detail. The zero-voltage switching (ZVS) characteristics and requirements are analyzed in detail and compared to those of DAB. A small-signal model of the new configuration is also derived. The analysis and performance of S-DAB are validated through extensive simulation and experimental results from a hardware prototype.
Secondly, a low-loss auxiliary circuit for a power factor correction (PFC) circuit to achieve zero voltage transition is also proposed to improve the efficiency and operating frequency of the converter. The high dynamic energy generated in the switching node during turn-on is diverted by providing a parallel path through an auxiliary inductor and a transistor placed across the main inductor. The paper discusses the operating principles, design, and merits of the proposed scheme with hardware validation on a 3.3 kW/ 500 kHz PFC prototype. Modifications to the proposed zero voltage transition (ZVT) circuit is also investigated by implementing two topological variations. Firstly, an integrated magnetic structure is built combining the main inductor and auxiliary inductor in a single core reducing the total footprint of the circuit board. This improvement also reduces the size of the auxiliary capacitor required in the ZVT operation. The second modification redirects the ZVT energy from the input end to the DC link through additional half-bridge circuit and inductor. The half-bridge operating at constant 50% duty cycle simulates a switching leg of the following DC/DC stage of the converter. A hardware prototype of the above-mentioned PFC and DC/DC stage was developed and the operating principles were verified using the same.
Secondly, a low-loss auxiliary circuit for a power factor correction (PFC) circuit to achieve zero voltage transition is also proposed to improve the efficiency and operating frequency of the converter. The high dynamic energy generated in the switching node during turn-on is diverted by providing a parallel path through an auxiliary inductor and a transistor placed across the main inductor. The paper discusses the operating principles, design, and merits of the proposed scheme with hardware validation on a 3.3 kW/ 500 kHz PFC prototype. Modifications to the proposed zero voltage transition (ZVT) circuit is also investigated by implementing two topological variations. Firstly, an integrated magnetic structure is built combining the main inductor and auxiliary inductor in a single core reducing the total footprint of the circuit board. This improvement also reduces the size of the auxiliary capacitor required in the ZVT operation. The second modification redirects the ZVT energy from the input end to the DC link through additional half-bridge circuit and inductor. The half-bridge operating at constant 50% duty cycle simulates a switching leg of the following DC/DC stage of the converter. A hardware prototype of the above-mentioned PFC and DC/DC stage was developed and the operating principles were verified using the same.
ContributorsKulasekaran, Siddharth (Author) / Ayyanar, Raja (Thesis advisor) / Karady, George G. (Committee member) / Qin, Jiangchao (Committee member) / Lei, Qin (Committee member) / Arizona State University (Publisher)
Created2017