ASU Electronic Theses and Dissertations
This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
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Description
As the complexity of robotic systems and applications grows rapidly, development of high-performance, easy to use, and fully integrated development environments for those systems is inevitable. Model-Based Design (MBD) of dynamic systems using engineering software such as Simulink® from MathWorks®, SciCos from Metalau team and SystemModeler® from Wolfram® is quite popular nowadays. They provide tools for modeling, simulation, verification and in some cases automatic code generation for desktop applications, embedded systems and robots. For real-world implementation of models on the actual hardware, those models should be converted into compilable machine code either manually or automatically. Due to the complexity of robotic systems, manual code translation from model to code is not a feasible optimal solution so we need to move towards automated code generation for such systems. MathWorks® offers code generation facilities called Coder® products for this purpose. However in order to fully exploit the power of model-based design and code generation tools for robotic applications, we need to enhance those software systems by adding and modifying toolboxes, files and other artifacts as well as developing guidelines and procedures. In this thesis, an effort has been made to propose a guideline as well as a Simulink® library, StateFlow® interface API and a C/C++ interface API to complete this toolchain for NAO humanoid robots. Thus the model of the hierarchical control architecture can be easily and properly converted to code and built for implementation.
ContributorsRaji Kermani, Ramtin (Author) / Fainekos, Georgios (Thesis advisor) / Lee, Yann-Hang (Committee member) / Sarjoughian, Hessam S. (Committee member) / Arizona State University (Publisher)
Created2013
Description
In this mixed-methods study, I examined the relationship between professional development based on the Common Core State Standards for Mathematics and teacher knowledge, classroom practice, and student learning. Participants were randomly assigned to experimental and control groups. The 50-hour professional development treatment was administered to the treatment group during one semester, and then a follow-up replication treatment was administered to the control group during the subsequent semester. Results revealed significant differences in teacher knowledge as a result of the treatment using two instruments. The Learning Mathematics for Teaching scales were used to detect changes in mathematical knowledge for teaching, and an online sorting task was used to detect changes in teachers' knowledge of their standards. Results also indicated differences in classroom practice between pairs of matched teachers selected to participate in classroom observations and interviews. No statistical difference was detected between the groups' student assessment scores using the district's benchmark assessment system. This efficacy study contributes to the literature in two ways. First, it provides an evidence base for a professional development model designed to promote effective implementation of the Common Core State Standards for Mathematics. Second, it addresses ways to impact and measure teachers' knowledge of curriculum in addition to their mathematical content knowledge. The treatment was designed to focus on knowledge of curriculum, but it also successfully impacted teachers' specialized content knowledge, knowledge of content and students, and knowledge of content and teaching.
ContributorsRimbey, Kimberly A (Author) / Middleton, James A. (Thesis advisor) / Sloane, Finbarr (Committee member) / Atkinson, Robert K (Committee member) / Arizona State University (Publisher)
Created2013
Description
A tiling is a collection of vertex disjoint subgraphs called tiles. If the tiles are all isomorphic to a graph $H$ then the tiling is an $H$-tiling. If a graph $G$ has an $H$-tiling which covers all of the vertices of $G$ then the $H$-tiling is a perfect $H$-tiling or an $H$-factor. A goal of this study is to extend theorems on sufficient minimum degree conditions for perfect tilings in graphs to directed graphs. Corrádi and Hajnal proved that every graph $G$ on $3k$ vertices with minimum degree $delta(G)ge2k$ has a $K_3$-factor, where $K_s$ is the complete graph on $s$ vertices. The following theorem extends this result to directed graphs: If $D$ is a directed graph on $3k$ vertices with minimum total degree $delta(D)ge4k-1$ then $D$ can be partitioned into $k$ parts each of size $3$ so that all of parts contain a transitive triangle and $k-1$ of the parts also contain a cyclic triangle. The total degree of a vertex $v$ is the sum of $d^-(v)$ the in-degree and $d^+(v)$ the out-degree of $v$. Note that both orientations of $C_3$ are considered: the transitive triangle and the cyclic triangle. The theorem is best possible in that there are digraphs that meet the minimum degree requirement but have no cyclic triangle factor. The possibility of added a connectivity requirement to ensure a cycle triangle factor is also explored. Hajnal and Szemerédi proved that if $G$ is a graph on $sk$ vertices and $delta(G)ge(s-1)k$ then $G$ contains a $K_s$-factor. As a possible extension of this celebrated theorem to directed graphs it is proved that if $D$ is a directed graph on $sk$ vertices with $delta(D)ge2(s-1)k-1$ then $D$ contains $k$ disjoint transitive tournaments on $s$ vertices. We also discuss tiling directed graph with other tournaments. This study also explores minimum total degree conditions for perfect directed cycle tilings and sufficient semi-degree conditions for a directed graph to contain an anti-directed Hamilton cycle. The semi-degree of a vertex $v$ is $min{d^+(v), d^-(v)}$ and an anti-directed Hamilton cycle is a spanning cycle in which no pair of consecutive edges form a directed path.
ContributorsMolla, Theodore (Author) / Kierstead, Henry A (Thesis advisor) / Czygrinow, Andrzej (Committee member) / Fishel, Susanna (Committee member) / Hurlbert, Glenn (Committee member) / Spielberg, Jack (Committee member) / Arizona State University (Publisher)
Created2013
Description
In 1959, Iwasawa proved that the size of the $p$-part of the class groups of a $\mathbb{Z}_p$-extension grows as a power of $p$ with exponent ${\mu}p^m+{\lambda}\,m+\nu$ for $m$ sufficiently large. Broadly, I construct conditions to verify if a given $m$ is indeed sufficiently large. More precisely, let $CG_m^i$ (class group) be the $\epsilon_i$-eigenspace component of the $p$-Sylow subgroup of the class group of the field at the $m$-th level in a $\mathbb{Z}_p$-extension; and let $IACG^i_m$ (Iwasawa analytic class group) be ${\mathbb{Z}_p[[T]]/((1+T)^{p^m}-1,f(T,\omega^{1-i}))}$, where $f$ is the associated Iwasawa power series. It is expected that $CG_m^i$ and $IACG^i_m$ be isomorphic, providing us with a powerful connection between algebraic and analytic techniques; however, as of yet, this isomorphism is unestablished in general. I consider the existence and the properties of an exact sequence $$0\longrightarrow\ker{\longrightarrow}CG_m^i{\longrightarrow}IACG_m^i{\longrightarrow}\textrm{coker}\longrightarrow0.$$ In the case of a $\mathbb{Z}_p$-extension where the Main Conjecture is established, there exists a pseudo-isomorphism between the respective inverse limits of $CG_m^i$ and $IACG_m^i$. I consider conditions for when such a pseudo-isomorphism immediately gives the existence of the desired exact sequence, and I also consider work-around methods that preserve cardinality for otherwise. However, I primarily focus on constructing conditions to verify if a given $m$ is sufficiently large that the kernel and cokernel of the above exact sequence have become well-behaved, providing similarity of growth both in the size and in the structure of $CG_m^i$ and $IACG_m^i$; as well as conditions to determine if any such $m$ exists. The primary motivating idea is that if $IACG_m^i$ is relatively easy to work with, and if the relationship between $CG_m^i$ and $IACG_m^i$ is understood; then $CG_m^i$ becomes easier to work with. Moreover, while the motivating framework is stated concretely in terms of the cyclotomic $\mathbb{Z}_p$-extension of $p$-power roots of unity, all results are generally applicable to arbitrary $\mathbb{Z}_p$-extensions as they are developed in terms of Iwasawa-Theory-inspired, yet abstracted, algebraic results on maps between inverse limits.
ContributorsElledge, Shawn Michael (Author) / Childress, Nancy (Thesis advisor) / Bremner, Andrew (Committee member) / Fishel, Susanna (Committee member) / Jones, John (Committee member) / Paupert, Julien (Committee member) / Arizona State University (Publisher)
Created2013
Description
With increasing transistor volume and reducing feature size, it has become a major design constraint to reduce power consumption also. This has given rise to aggressive architectural changes for on-chip power management and rapid development to energy efficient hardware accelerators. Accordingly, the objective of this research work is to facilitate software developers to leverage these hardware techniques and improve energy efficiency of the system. To achieve this, I propose two solutions for Linux kernel: Optimal use of these architectural enhancements to achieve greater energy efficiency requires accurate modeling of processor power consumption. Though there are many models available in literature to model processor power consumption, there is a lack of such models to capture power consumption at the task-level. Task-level energy models are a requirement for an operating system (OS) to perform real-time power management as OS time multiplexes tasks to enable sharing of hardware resources. I propose a detailed design methodology for constructing an architecture agnostic task-level power model and incorporating it into a modern operating system to build an online task-level power profiler. The profiler is implemented inside the latest Linux kernel and validated for Intel Sandy Bridge processor. It has a negligible overhead of less than 1\% hardware resource consumption. The profiler power prediction was demonstrated for various application benchmarks from SPEC to PARSEC with less than 4\% error. I also demonstrate the importance of the proposed profiler for emerging architectural techniques through use case scenarios, which include heterogeneous computing and fine grained per-core DVFS. Along with architectural enhancement in general purpose processors to improve energy efficiency, hardware accelerators like Coarse Grain reconfigurable architecture (CGRA) are gaining popularity. Unlike vector processors, which rely on data parallelism, CGRA can provide greater flexibility and compiler level control making it more suitable for present SoC environment. To provide streamline development environment for CGRA, I propose a flexible framework in Linux to do design space exploration for CGRA. With accurate and flexible hardware models, fine grained integration with accurate architectural simulator, and Linux memory management and DMA support, a user can carry out limitless experiments on CGRA in full system environment.
ContributorsDesai, Digant Pareshkumar (Author) / Vrudhula, Sarma (Thesis advisor) / Chakrabarti, Chaitali (Committee member) / Wu, Carole-Jean (Committee member) / Arizona State University (Publisher)
Created2013
Description
Researchers have postulated that math academic achievement increases student success in college (Lee, 2012; Silverman & Seidman, 2011; Vigdor, 2013), yet 80% of universities and 98% of community colleges require many of their first-year students to be placed in remedial courses (Bettinger & Long, 2009). Many high school graduates are entering college ill prepared for the rigors of higher education, lacking understanding of basic and important principles (ACT, 2012). The desire to increase academic achievement is a wide held aspiration in education and the idea of adapting instruction to individuals is one approach to accomplish this goal (Lalley & Gentile, 2009a). Frequently, adaptive learning environments rely on a mastery learning approach, it is thought that when students are afforded the opportunity to master the material, deeper and more meaningful learning is likely to occur. Researchers generally agree that the learning environment, the teaching approach, and the students' attributes are all important to understanding the conditions that promote academic achievement (Bandura, 1977; Bloom, 1968; Guskey, 2010; Cassen, Feinstein & Graham, 2008; Changeiywo, Wambugu & Wachanga, 2011; Lee, 2012; Schunk, 1991; Van Dinther, Dochy & Segers, 2011). The present study investigated the role of college students' affective attributes and skills, such as academic competence and academic resilience, in an adaptive mastery-based learning environment on their academic performance, while enrolled in a remedial mathematics course. The results showed that the combined influence of students' affective attributes and academic resilience had a statistically significant effect on students' academic performance. Further, the mastery-based learning environment also had a significant effect on their academic competence and academic performance.
ContributorsFoshee, Cecile Mary (Author) / Atkinson, Robert K (Thesis advisor) / Elliott, Stephen N. (Committee member) / Horan, John (Committee member) / Arizona State University (Publisher)
Created2013
Description
Smart home system (SHS) is a kind of information system aiming at realizing home automation. The SHS can connect with almost any kind of electronic/electric device used in a home so that they can be controlled and monitored centrally. Today's technology also allows the home owners to control and monitor the SHS installed in their homes remotely. This is typically realized by giving the SHS network access ability. Although the SHS's network access ability brings a lot of conveniences to the home owners, it also makes the SHS facing more security threats than ever before. As a result, when designing a SHS, the security threats it might face should be given careful considerations. System security threats can be solved properly by understanding them and knowing the parts in the system that should be protected against them first. This leads to the idea of solving the security threats a SHS might face from the requirements engineering level. Following this idea, this paper proposes a systematic approach to generate the security requirements specifications for the SHS. It can be viewed as the first step toward the complete SHS security requirements engineering process.
ContributorsXu, Rongcao (Author) / Ghazarian, Arbi (Thesis advisor) / Bansal, Ajay (Committee member) / Lindquist, Timothy (Committee member) / Arizona State University (Publisher)
Created2013
Description
Research on combinatorics education is sparse when compared with other fields in mathematics education. This research attempted to contribute to the dearth of literature by examining students' reasoning about enumerative combinatorics problems and how students conceptualize the set of elements being counted in such problems, called the solution set. In particular, the focus was on the stable patterns of reasoning, known as ways of thinking, which students applied in a variety of combinatorial situations and tasks. This study catalogued students' ways of thinking about solution sets as they progressed through an instructional sequence. In addition, the relationships between the catalogued ways of thinking were explored. Further, the study investigated the challenges students experienced as they interacted with the tasks and instructional interventions, and how students' ways of thinking evolved as these challenges were overcome. Finally, it examined the role of instruction in guiding students to develop and extend their ways of thinking. Two pairs of undergraduate students with no formal experience with combinatorics participated in one of the two consecutive teaching experiments conducted in Spring 2012. Many ways of thinking emerged through the grounded theory analysis of the data, but only eight were identified as robust. These robust ways of thinking were classified into three categories: Subsets, Odometer, and Problem Posing. The Subsets category encompasses two ways of thinking, both of which ultimately involve envisioning the solution set as the union of subsets. The three ways of thinking in Odometer category involve holding an item or a set of items constant and systematically varying the other items involved in the counting process. The ways of thinking belonging to Problem Posing category involve spontaneously posing new, related combinatorics problems and finding relationships between the solution sets of the original and the new problem. The evolution of students' ways of thinking in the Problem Posing category was analyzed. This entailed examining the perturbation experienced by students and the resulting accommodation of their thinking. It was found that such perturbation and its resolution was often the result of an instructional intervention. Implications for teaching practice are discussed.
ContributorsHalani, Aviva (Author) / Roh, Kyeong Hah (Thesis advisor) / Fishel, Susanna (Committee member) / Saldanha, Luis (Committee member) / Thompson, Patrick (Committee member) / Zandieh, Michelle (Committee member) / Arizona State University (Publisher)
Created2013
Description
Multicore processors have proliferated in nearly all forms of computing, from servers, desktop, to smartphones. The primary reason for this large adoption of multicore processors is due to its ability to overcome the power-wall by providing higher performance at a lower power consumption rate. With multi-cores, there is increased need for dynamic energy management (DEM), much more than for single-core processors, as DEM for multi-cores is no more a mechanism just to ensure that a processor is kept under specified temperature limits, but also a set of techniques that manage various processor controls like dynamic voltage and frequency scaling (DVFS), task migration, fan speed, etc. to achieve a stated objective. The objectives span a wide range from maximizing throughput, minimizing power consumption, reducing peak temperature, maximizing energy efficiency, maximizing processor reliability, and so on, along with much more wider constraints of temperature, power, timing, and reliability constraints. Thus DEM can be very complex and challenging to achieve. Since often times many DEMs operate together on a single processor, there is a need to unify various DEM techniques. This dissertation address such a need. In this work, a framework for DEM is proposed that provides a unifying processor model that includes processor power, thermal, timing, and reliability models, supports various DEM control mechanisms, many different objective functions along with equally diverse constraint specifications. Using the framework, a range of novel solutions is derived for instances of DEM problems, that include maximizing processor performance, energy efficiency, or minimizing power consumption, peak temperature under constraints of maximum temperature, memory reliability and task deadlines. Finally, a robust closed-loop controller to implement the above solutions on a real processor platform with a very low operational overhead is proposed. Along with the controller design, a model identification methodology for obtaining the required power and thermal models for the controller is also discussed. The controller is architecture independent and hence easily portable across many platforms. The controller has been successfully deployed on Intel Sandy Bridge processor and the use of the controller has increased the energy efficiency of the processor by over 30%
ContributorsHanumaiah, Vinay (Author) / Vrudhula, Sarma (Thesis advisor) / Chatha, Karamvir (Committee member) / Chakrabarti, Chaitali (Committee member) / Rodriguez, Armando (Committee member) / Askin, Ronald (Committee member) / Arizona State University (Publisher)
Created2013
Description
Parallel Monte Carlo applications require the pseudorandom numbers used on each processor to be independent in a probabilistic sense. The TestU01 software package is the standard testing suite for detecting stream dependence and other properties that make certain pseudorandom generators ineffective in parallel (as well as serial) settings. TestU01 employs two basic schemes for testing parallel generated streams. The first applies serial tests to the individual streams and then tests the resulting P-values for uniformity. The second turns all the parallel generated streams into one long vector and then applies serial tests to the resulting concatenated stream. Various forms of stream dependence can be missed by each approach because neither one fully addresses the multivariate nature of the accumulated data when generators are run in parallel. This dissertation identifies these potential faults in the parallel testing methodologies of TestU01 and investigates two different methods to better detect inter-stream dependencies: correlation motivated multivariate tests and vector time series based tests. These methods have been implemented in an extension to TestU01 built in C++ and the unique aspects of this extension are discussed. A variety of different generation scenarios are then examined using the TestU01 suite in concert with the extension. This enhanced software package is found to better detect certain forms of inter-stream dependencies than the original TestU01 suites of tests.
ContributorsIsmay, Chester (Author) / Eubank, Randall (Thesis advisor) / Young, Dennis (Committee member) / Kao, Ming-Hung (Committee member) / Lanchier, Nicolas (Committee member) / Reiser, Mark R. (Committee member) / Arizona State University (Publisher)
Created2013