This collection includes most of the ASU Theses and Dissertations from 2011 to present. ASU Theses and Dissertations are available in downloadable PDF format; however, a small percentage of items are under embargo. Information about the dissertations/theses includes degree information, committee members, an abstract, supporting data or media.
In addition to the electronic theses found in the ASU Digital Repository, ASU Theses and Dissertations can be found in the ASU Library Catalog.
Dissertations and Theses granted by Arizona State University are archived and made available through a joint effort of the ASU Graduate College and the ASU Libraries. For more information or questions about this collection contact or visit the Digital Repository ETD Library Guide or contact the ASU Graduate College at gradformat@asu.edu.
This dissertation examines modeling, design and control challenges associatedwith two classes of power converters: a direct current-direct current (DC-DC) step-down (buck)
regulator and a 3-phase (3-ϕ) 4-wire direct current-alternating current
(DC-AC) inverter. These are widely used for power transfer in a variety of industrial
and personal applications. This motivates the precise quantification…
This dissertation examines modeling, design and control challenges associatedwith two classes of power converters: a direct current-direct current (DC-DC) step-down (buck)
regulator and a 3-phase (3-ϕ) 4-wire direct current-alternating current
(DC-AC) inverter. These are widely used for power transfer in a variety of industrial
and personal applications. This motivates the precise quantification of conditions
under which existing modeling and design methods yield satisfactory designs, and
the study of alternatives when they don’t. This dissertation describes a method
utilizing Fourier components of the input square wave and the inductor-capacitor (LC)
filter transfer function, which doesn’t require the small ripple approximation. Then,
trade-offs associated with the choice of the filter order are analyzed for integrated buck
converters with a constraint on their chip area. Design specifications which would
justify using a fourth or sixth order filter instead of the widely used second order
one are examined. Next, sampled-data (SD) control of a buck converter is analyzed.
Three methods for the digital controller design are studied: analog design followed
by discretization, direct digital design of a discretized plant, and a “lifting” based
method wherein the sampling time is incorporated in the design process by lifting
the continuous-time design plant before doing the controller design. Specifically,
controller performance is quantified by studying the induced-L2 norm of the closed
loop system for a range of switching/sampling frequencies. In the final segment of
this dissertation, the inner-outer control loop, employed in inverters with an
inductor-capacitor-inductor (LCL) output filter, is studied. Closed loop sensitivities for the
loop broken at the error and the control are examined, demonstrating that traditional
methods only address these properties for one loop-breaking point. New controllers
are then provided for improving both sets of properties.
With growing complexity of power grid interconnections, power systems may become increasingly vulnerable to low frequency oscillations (especially inter-area oscillations) and dependent on stabilizing controls using either local signals or wide-area signals to provide adequate damping. In recent years, the ability and potential to use wide-area signals for control purposes…
With growing complexity of power grid interconnections, power systems may become increasingly vulnerable to low frequency oscillations (especially inter-area oscillations) and dependent on stabilizing controls using either local signals or wide-area signals to provide adequate damping. In recent years, the ability and potential to use wide-area signals for control purposes has increased since a significant investment has been made in the U. S. in deploying synchrophasor measurement technology. Fast and reliable communication systems are essential to enable the use of wide-area signals in controls. If wide-area signals find increased applicability in controls the security and reliability of power systems could be vulnerable to disruptions in communication systems. Even though numerous modern techniques have been developed to lower the probability of communication errors, communication networks cannot be designed to be always reliable. Given this background the motivation of this work is to build resiliency in the power grid controls to respond to failures in the communication network when wide-area control signals are used. In addition, this work also deals with the delay uncertainty associated with the wide-area signal transmission. In order to counteract the negative impact of communication failures on control effectiveness, two approaches are proposed and both approaches are motivated by considering the use of a robustly designed supplementary damping control (SDC) framework associated with a static VAr compensator (SVC). When there is no communication failure, the designed controller guarantees enhanced improvement in damping performance. When the wide-area signal in use is lost due to a communication failure, however, the resilient control provides the required damping of the inter-area oscillations by either utilizing another wide-area measurement through a healthy communication route or by simply utilizing an appropriate local control signal. Simulation results prove that with either of the proposed controls included, the system is stabilized regardless of communication failures, and thereby the reliability and sustainability of power systems is improved. The proposed approaches can be extended without loss of generality to the design of any resilient controller in cyber-physical engineering systems.