Matching Items (32)
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Description
Graphene, a one atomic thick planar sheet of carbon atoms, has a zero gap band structure with a linear dispersion relation. This unique property makes graphene a favorite for physicists and engineers, who are trying to understand the mechanism of charge transport in graphene and using it as channel material

Graphene, a one atomic thick planar sheet of carbon atoms, has a zero gap band structure with a linear dispersion relation. This unique property makes graphene a favorite for physicists and engineers, who are trying to understand the mechanism of charge transport in graphene and using it as channel material for field effect transistor (FET) beyond silicon. Therefore, an in-depth exploring of these electrical properties of graphene is urgent, which is the purpose of this dissertation. In this dissertation, the charge transport and quantum capacitance of graphene were studied. Firstly, the transport properties of back-gated graphene transistor covering by high dielectric medium were systematically studied. The gate efficiency increased by up to two orders of magnitude in the presence of a high top dielectric medium, but the mobility did not change significantly. The results strongly suggested that the previously reported top dielectric medium-induced charge transport properties of graphene FETs were possibly due to the increase of gate capacitance, rather than enhancement of carrier mobility. Secondly, a direct measurement of quantum capacitance of graphene was performed. The quantum capacitance displayed a non-zero minimum at the Dirac point and a linear increase on both sides of the minimum with relatively small slopes. The findings - which were not predicted by theory for ideal graphene - suggested that scattering from charged impurities also influences the quantum capacitance. The capacitances in aqueous solutions at different ionic concentrations were also measured, which strongly suggested that the longstanding puzzle about the interfacial capacitance in carbon-based electrodes had a quantum origin. Finally, the transport and quantum capacitance of epitaxial graphene were studied simultaneously, the quantum capacitance of epitaxial graphene was extracted, which was similar to that of exfoliated graphene near the Dirac Point, but exhibited a large sub-linear behavior at high carrier density. The self-consistent theory was found to provide a reasonable description of the transport data of the epitaxial graphene device, but a more complete theory was needed to explain both the transport and quantum capacitance data.
ContributorsXia, Jilin (Author) / Tao, N.J. (Thesis advisor) / Ferry, David (Committee member) / Thornton, Trevor (Committee member) / Tsui, Raymond (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2010
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Description
The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the

The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the process flow or adding additional steps, which in turn, leads to an increase in fabrication costs. Si-MESFETs (silicon-metal-semiconductor-field-effect-transistors) from Arizona State University (ASU) on the other hand, have an inherent high voltage capability and can be added to any silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) CMOS process free of cost. This has been proved at five different commercial foundries on technologies ranging from 0.5 to 0.15 μm. Another critical issue facing CMOS processes on insulated substrates is the scaling of the thin silicon channel. Consequently, the future direction of SOI/SOS CMOS transistors may trend away from partially depleted (PD) transistors and towards fully depleted (FD) devices. FD-CMOS are already being implemented in multiple applications due to their very low power capability. Since the FD-CMOS market only figures to grow, it is appropriate that MESFETs also be developed for these processes. The beginning of this thesis will focus on the device aspects of both PD and FD-MESFETs including their layout structure, DC and RF characteristics, and breakdown voltage. The second half will then shift the focus towards implementing both types of MESFETs in an analog circuit application. Aside from their high breakdown ability, MESFETs also feature depletion mode operation, easy to adjust but well controlled threshold voltages, and fT's up to 45 GHz. Those unique characteristics can allow certain designs that were previously difficult to implement or prohibitively expensive using conventional technologies to now be achieved. One such application which benefits is low dropout regulators (LDO). By utilizing an n-channel MESFET as the pass transistor, a LDO featuring very low dropout voltage, fast transient response, and stable operation can be achieved without an external capacitance. With the focus of this thesis being MESFET based LDOs, the device discussion will be mostly tailored towards optimally designing MESFETs for this particular application.
ContributorsLepkowski, William (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2010
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Description

This creative project is an extension of the work being done as part of Senior Design in<br/>developing the See-Through Car Pillar, a system designed to render the forward car pillars in a car<br/>invisible to the driver so they can have an unobstructed view utilizing displays, sensors, and a<br/>computer. The first

This creative project is an extension of the work being done as part of Senior Design in<br/>developing the See-Through Car Pillar, a system designed to render the forward car pillars in a car<br/>invisible to the driver so they can have an unobstructed view utilizing displays, sensors, and a<br/>computer. The first half of the paper provides the motivation, design and progress of the project, <br/>while the latter half provides a literature survey on current automobile trends, the viability of the<br/>See-Through Car Pillar as a product in the market through case studies, and alternative designs and <br/>technologies that also might address the problem statement.

ContributorsRoy, Delwyn J (Author) / Thornton, Trevor (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2021-05
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Description
In the last few decades, extensive research efforts have been focused on scaling down silicon-based complementary metal-oxide semiconductor (CMOS) technology to enable the continuation of Moore’s law. State-of-art CMOS includes fully depleted silicon-on-insulator (FDSOI) field-effect-transistors (FETs) with ultra-thin silicon channels (6 nm), as well as other three-dimensional (3D) device architectures

In the last few decades, extensive research efforts have been focused on scaling down silicon-based complementary metal-oxide semiconductor (CMOS) technology to enable the continuation of Moore’s law. State-of-art CMOS includes fully depleted silicon-on-insulator (FDSOI) field-effect-transistors (FETs) with ultra-thin silicon channels (6 nm), as well as other three-dimensional (3D) device architectures like Fin-FETs, nanosheet FETs, etc. Significant research efforts have characterized these technologies towards various applications, and at different conditions including a wide range of temperatures from room temperature (300 K) down to cryogenic temperatures. Theoretical efforts have studied ultrascaled devices using Landauer theory to further understand their transport properties and predict their performance in the quasi-ballistic regime.Further scaling of CMOS devices requires the introduction of new semiconducting channel materials, as now established by the research community. Here, two-dimensional (2D) semiconductors have emerged as a promising candidate to replace silicon for next-generation ultrascaled CMOS devices. These emerging 2D semiconductors also have applications beyond CMOS, for example in novel memory, neuromorphic, and spintronic devices. Graphene is a promising candidate for spintronic devices due to its outstanding spin transport properties as evidenced by numerous studies in non-local lateral spin valve (LSV) geometries. The essential components of graphene-based LSV, such as graphene FETs, metal-graphene contacts, and tunneling barriers, were individually investigated as part of this doctoral dissertation. In this work, several contributions were made to these CMOS and beyond CMOS technologies. This includes comprehensive characterization and modeling of FDSOI nanoscale FETs from room temperature down to cryogenic temperatures. Using Landauer theory for nanoscale transistors, FDSOI devices were analyzed and modeled under quasi-ballistic operation. This was extended towards a virtual-source modeling approach that accounts for temperature-dependent quasi-ballistic transport and back-gate biasing effects. Additionally, graphene devices with ultrathin high-k gate dielectrics were investigated towards FETs, non-volatile memory, and spintronic devices. New contributions were made relating to charge trapping effects and their impact on graphene device electrostatics (Dirac voltage shifts) and transport properties (impact on mobility and conductivity). This work also studied contact resistance and tunneling effects using transfer length method (TLM) graphene FET structures and magnetic tunneling junction (MTJ) towards graphene-based LSV.
ContributorsZhou, Guantong (Author) / Sanchez Esqueda, Ivan (Thesis advisor) / Vasileska, Dragica (Committee member) / Tongay, Sefaattin (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2023
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Description
Over the past few years, research into the use of doped diamond in electronics has seen an exponential growth. In the course of finding ways to reduce the contact resistivity, nanocarbon materials have been an interesting focus. In this work, the transfer length method (TLM) was used to investigate Ohmic

Over the past few years, research into the use of doped diamond in electronics has seen an exponential growth. In the course of finding ways to reduce the contact resistivity, nanocarbon materials have been an interesting focus. In this work, the transfer length method (TLM) was used to investigate Ohmic contact properties using the tri-layer stack Ti/Pt/Au on nitrogen-doped n-type conducting nano-carbon (nanoC) layers grown on (100) diamond substrates. The nanocarbon material was characterized using Secondary Ion Mass Spectrometry (SIMS), Scanning electron Microscopy (SEM) X-ray diffraction (XRD), Raman scattering and Hall effect measurements to probe the materials characteristics. Room temperature electrical measurements were taken, and samples were annealed to observe changes in electrical conductivity. Low specific contact resistivity values of 8 x 10^-5 Ωcm^2 were achieved, which was almost two orders of magnitude lower than previously reported values. The results were attributed to the increased nitrogen incorporation, and the presence of electrically active defects which leads to an increase in conduction in the nanocarbon. Further a study of light phosphorus doped layers using similar methods with Ti/Pt/Au contacts again yielded a low contact resistivity of about 9.88 x 10^-2 Ωcm^2 which is an interesting prospect among lightly doped diamond films for applications in devices such as transistors. In addition, for the first time, hafnium was substituted for Ti in the contact stack (Hf/Pt/Au) and studied on nitrogen doped nanocarbon films, which resulted in low contact resistivity values on the order of 10^-2 Ωcm^2. The implications of the results were discussed, and recommendations for improving the experimental process was outlined. Lastly, a method for the selective area growth of nanocarbon was developed and studied and the results provided an insight into how different characterizations can be used to confirm the presence of the nanocrystalline diamond material, the limitations due to the film thickness was explored and ideas for future work was proposed.
ContributorsAmonoo, Evangeline Abena (Author) / Thornton, Trevor (Thesis advisor) / Alford, Terry L (Thesis advisor) / Anwar, Shahriar (Committee member) / Theodore, David (Committee member) / Arizona State University (Publisher)
Created2023
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Description
Wide Bandgap (WBG) semiconductor materials are shaping day-to-day technologyby introducing powerful and more energy responsible devices. These materials have opened the door for building basic semiconductor devices which are superior in terms of handling high voltages, high currents, power, and temperature which is not possible using conventional silicon technology. As the research continues

Wide Bandgap (WBG) semiconductor materials are shaping day-to-day technologyby introducing powerful and more energy responsible devices. These materials have opened the door for building basic semiconductor devices which are superior in terms of handling high voltages, high currents, power, and temperature which is not possible using conventional silicon technology. As the research continues in the field of WBG based devices, there is a potential chance that the power electronics industry can save billions of dollars deploying energy-efficient circuits in high power conversion electronics. Diamond, silicon carbide and gallium nitride are the top three contenders among which diamond can significantly outmatch others in a variety of properties. However, diamond technology is still in its early phase of development and there are challenges involved in many aspects of processing a successful integrated circuit. The work done in this research addresses three major aspects of problems related to diamond technology. In the first part, the applicability of compact modeling and Technology Computer-Aided Design (TCAD) modeling technique for diamond Schottky p-i-n diodes has been demonstrated. The compact model accurately predicts AC, DC and nonlinear behavior of the diode required for fast circuit simulation. Secondly, achieving low resistance ohmic contact onto n-type diamond is one of the major issues that is still an open research problem as it determines the performance of high-power RF circuits and switching losses in power converters circuits. So, another portion of this thesis demonstrates the achievement of very low resistance ohmic contact (~ 10-4 Ω⋅cm2) onto n-type diamond using nano crystalline carbon interface layer. Using the developed TCAD and compact models for low resistance contacts, circuit level predictions show improvements in RF performance. Lastly, an initial study of breakdown characteristics of diamond and cubic boron nitride heterostructure is presented. This study serves as a first step for making future transistors using diamond and cubic boron nitride – a very less explored material system in literature yet promising for extreme circuit applications involving high power and temperature.
ContributorsJHA, VISHAL (Author) / Thornton, Trevor (Thesis advisor) / Goodnick, Stephen (Committee member) / Nemanich, Robert (Committee member) / Alford, Terry (Committee member) / Hoque, Mazhar (Committee member) / Arizona State University (Publisher)
Created2023
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Description
An efficient thermal solver is available in the CMC that allows modeling self-heating in the electrical simulations, which treats phonons as flux and solves the energy balance equation to quantify thermal effects. Using this solver, thermal simulations were performed on GaN-HEMTs in order to test effect of gate architectures on

An efficient thermal solver is available in the CMC that allows modeling self-heating in the electrical simulations, which treats phonons as flux and solves the energy balance equation to quantify thermal effects. Using this solver, thermal simulations were performed on GaN-HEMTs in order to test effect of gate architectures on the DC and RF performance of the device. A Π- gate geometry is found to suppress 19.75% more hot electrons corresponding to a DC power of 2.493 W/mm for Vgs = -0.6V (max transconductance) with respect to the initial T-gate. For the DC performance, the output current, Ids is nearly same for each device configuration over the entire bias range. For the RF performance, the current gain was evaluated over a frequency range 20 GHz to 120 GHz in each device for both thermal (including self-heating) and isothermal (without self-heating). The evaluated cutoff frequency is around 7% lower for the thermal case than the isothermal case. The simulated cutoff frequency closely follows the experimental cutoff frequency. The work was extended to the study of ultra-wide bandgap material (Diamond), where isotope effect causes major deterioration in thermal conductivity. In this case, bulk phonons are modeled as semiclassical particles solving the nonlinear Peierls - Boltzmann transport equation with a stochastic approach. Simulations were performed for 0.001% (ultra-pure), 0.1% and 1.07% isotope concentration (13C) of diamond, showing good agreement with the experimental values. Further investigation was performed on the effect of isotope on the dynamics of individual phonon branches, thermal conductivity and the mean free path, to identify the dominant phonon branch. Acoustic phonons are found to be the principal contributors to thermal conductivity across all isotope concentrations with transverse acoustic (TA2) branch is the dominant branch with a contribution of 40% at room temperature and 37% at 500K. Mean free path computations show the lower bound of device dimensions in order to obtain maximum thermal conductivity. At 300K, the lowest mean free path (which is attributed to Longitudinal Optical phonon) reduces from 24nm to 8 nm for isotope concentration of 0.001% and 1.07% respectively. Similarly, the maximum mean free path (which is attributed to Longitudinal Acoustic phonon) reduces from 4 µm to 3.1 µm, respectively, for the same isotope concentrations. Furthermore, PETSc (Portable, Extensible Toolkit for Scientific Computation) developed by Argonne National Lab, was included in the existing Cellular Monte Carlo device simulator as a Poisson solver to further extend the capability of the simulator. The validity of the solver was tested performing 2D and 3D simulations and the results were compared with the well-established multigrid Poisson solver.
ContributorsAcharjee, Joy (Author) / Saraniti, Marco (Thesis advisor) / Goodnick, Stephen (Committee member) / Thornton, Trevor (Committee member) / Wang, Robert (Committee member) / Arizona State University (Publisher)
Created2024
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Description
In this work, the insight provided by our sophisticated Full Band Monte Carlo simulator is used to analyze the behavior of state-of-art devices like GaN High Electron Mobility Transistors and Hot Electron Transistors. Chapter 1 is dedicated to the description of the simulation tool used to obtain the results shown

In this work, the insight provided by our sophisticated Full Band Monte Carlo simulator is used to analyze the behavior of state-of-art devices like GaN High Electron Mobility Transistors and Hot Electron Transistors. Chapter 1 is dedicated to the description of the simulation tool used to obtain the results shown in this work. Moreover, a separate section is dedicated the set up of a procedure to validate to the tunneling algorithm recently implemented in the simulator. Chapter 2 introduces High Electron Mobility Transistors (HEMTs), state-of-art devices characterized by highly non linear transport phenomena that require the use of advanced simulation methods. The techniques for device modeling are described applied to a recent GaN-HEMT, and they are validated with experimental measurements. The main techniques characterization techniques are also described, including the original contribution provided by this work. Chapter 3 focuses on a popular technique to enhance HEMTs performance: the down-scaling of the device dimensions. In particular, this chapter is dedicated to lateral scaling and the calculation of a limiting cutoff frequency for a device of vanishing length. Finally, Chapter 4 and Chapter 5 describe the modeling of Hot Electron Transistors (HETs). The simulation approach is validated by matching the current characteristics with the experimental one before variations of the layouts are proposed to increase the current gain to values suitable for amplification. The frequency response of these layouts is calculated, and modeled by a small signal circuit. For this purpose, a method to directly calculate the capacitance is developed which provides a graphical picture of the capacitative phenomena that limit the frequency response in devices. In Chapter 5 the properties of the hot electrons are investigated for different injection energies, which are obtained by changing the layout of the emitter barrier. Moreover, the large signal characterization of the HET is shown for different layouts, where the collector barrier was scaled.
ContributorsSoligo, Riccardo (Author) / Saraniti, Marco (Thesis advisor) / Goodnick, Stephen M (Committee member) / Chowdhury, Srabanti (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2016
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Description
Feature representations for raw data is one of the most important component in a machine learning system. Traditionally, features are \textit{hand crafted} by domain experts which can often be a time consuming process. Furthermore, they do not generalize well to unseen data and novel tasks. Recently, there have been many

Feature representations for raw data is one of the most important component in a machine learning system. Traditionally, features are \textit{hand crafted} by domain experts which can often be a time consuming process. Furthermore, they do not generalize well to unseen data and novel tasks. Recently, there have been many efforts to generate data-driven representations using clustering and sparse models. This dissertation focuses on building data-driven unsupervised models for analyzing raw data and developing efficient feature representations.

Simultaneous segmentation and feature extraction approaches for silicon-pores sensor data are considered. Aggregating data into a matrix and performing low rank and sparse matrix decompositions with additional smoothness constraints are proposed to solve this problem. Comparison of several variants of the approaches and results for signal de-noising and translocation/trapping event extraction are presented. Algorithms to improve transform-domain features for ion-channel time-series signals based on matrix completion are presented. The improved features achieve better performance in classification tasks and in reducing the false alarm rates when applied to analyte detection.

Developing representations for multimedia is an important and challenging problem with applications ranging from scene recognition, multi-media retrieval and personal life-logging systems to field robot navigation. In this dissertation, we present a new framework for feature extraction for challenging natural environment sounds. Proposed features outperform traditional spectral features on challenging environmental sound datasets. Several algorithms are proposed that perform supervised tasks such as recognition and tag annotation. Ensemble methods are proposed to improve the tag annotation process.

To facilitate the use of large datasets, fast implementations are developed for sparse coding, the key component in our algorithms. Several strategies to speed-up Orthogonal Matching Pursuit algorithm using CUDA kernel on a GPU are proposed. Implementations are also developed for a large scale image retrieval system. Image-based "exact search" and "visually similar search" using the image patch sparse codes are performed. Results demonstrate large speed-up over CPU implementations and good retrieval performance is also achieved.
ContributorsSattigeri, Prasanna S (Author) / Spanias, Andreas (Thesis advisor) / Thornton, Trevor (Committee member) / Goryll, Michael (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2014
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Description
The Programmable Metallization Cell (PMC) is a novel solid-state resistive switching technology. It has a simple metal-insulator-metal “MIM” structure with one metal being electrochemically active (Cu) and the other one being inert (Pt or W), an insulating film (silica) acts as solid electrolyte for ion transport is sandwiched between these

The Programmable Metallization Cell (PMC) is a novel solid-state resistive switching technology. It has a simple metal-insulator-metal “MIM” structure with one metal being electrochemically active (Cu) and the other one being inert (Pt or W), an insulating film (silica) acts as solid electrolyte for ion transport is sandwiched between these two electrodes. PMC’s resistance can be altered by an external electrical stimulus. The change of resistance is attributed to the formation or dissolution of Cu metal filament(s) within the silica layer which is associated with electrochemical redox reactions and ion transportation. In this dissertation, a comprehensive study of microfabrication method and its impacts on performance of PMC device is demonstrated, gamma-ray total ionizing dose (TID) impacts on device reliability is investigated, and the materials properties of doped/undoped silica switching layers are illuminated by impedance spectroscopy (IS). Due to the inherent CMOS compatibility, Cu-silica PMCs have great potential to be adopted in many emerging technologies, such as non-volatile storage cells and selector cells in ultra-dense 3D crosspoint memories, as well as electronic synapses in brain-inspired neuromorphic computing. Cu-silica PMC device performance for these applications is also assessed in this dissertation.
ContributorsChen, Wenhao (Author) / Kozicki, Michael N (Thesis advisor) / Barnaby, Hugh J (Thesis advisor) / Yu, Shimeng (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2017