Matching Items (42)
Description
The formation of dendrites in materials is usually seen as a failure-inducing defect in devices. Naturally, most research views dendrites as a problem needing a solution while focusing on process control techniques and post-mortem analysis of various stress patterns with the ultimate goal of total suppression of the structures. However, programmable metallization cell (PMC) technology embraces dendrite formation in chalcogenide glasses by utilizing the nascent conductive filaments as its core operative element. Furthermore, exciting More-than-Moore capabilities in the realms of device watermarking and hardware encryption schema are made possible by the random nature of dendritic branch growth. While dendritic structures have been observed and are well-documented in solid state materials, there is still no satisfactory theoretical model that can provide insight and a better understanding of how dendrites form. Ultimately, what is desired is the capability to predict the final structure of the conductive filament in a PMC device so that exciting new applications can be developed with PMC technology.
This thesis details the results of an effort to create a first-principles MATLAB simulation model that uses configurable physical parameters to generate images of dendritic structures. Generated images are compared against real-world samples. While growth has a significant random component, there are several reliable characteristics that form under similar parameter sets that can be monitored such as the relative length of major dendrite arms, common branching angles, and overall growth directionality.
The first simulation model that was constructed takes a Newtonian perspective of the problem and is implemented using the Euler numerical method. This model has several shortcomings stemming majorly from the simplistic treatment of the problem, but is highly performant. The model is then revised to use the Verlet numerical method, which increases the simulation accuracy, but still does not fully resolve the issues with the theoretical background. The final simulation model returns to the Euler method, but is a stochastic model based on Mott-Gurney’s ion hopping theory applied to solids. The results from this model are seen to match real samples the closest of all simulations.
This thesis details the results of an effort to create a first-principles MATLAB simulation model that uses configurable physical parameters to generate images of dendritic structures. Generated images are compared against real-world samples. While growth has a significant random component, there are several reliable characteristics that form under similar parameter sets that can be monitored such as the relative length of major dendrite arms, common branching angles, and overall growth directionality.
The first simulation model that was constructed takes a Newtonian perspective of the problem and is implemented using the Euler numerical method. This model has several shortcomings stemming majorly from the simplistic treatment of the problem, but is highly performant. The model is then revised to use the Verlet numerical method, which increases the simulation accuracy, but still does not fully resolve the issues with the theoretical background. The final simulation model returns to the Euler method, but is a stochastic model based on Mott-Gurney’s ion hopping theory applied to solids. The results from this model are seen to match real samples the closest of all simulations.
ContributorsFoss, Ryan (Author) / Kozicki, Michael N (Thesis advisor) / Barnaby, Hugh (Committee member) / Allee, David R. (Committee member) / Arizona State University (Publisher)
Created2016
Description
This PhD thesis consists of three main themes. The first part focusses on modeling of Silver (Ag)-Chalcogenide glass based resistive memory devices known as the Programmable Metallization Cell (PMC). The proposed models are examined with the Technology Computer Aided Design (TCAD) simulations. In order to find a relationship between electrochemistry and carrier-trap statistics in chalcogenide glass films, an analytical mapping for electron trapping is derived. Then, a physical-based model is proposed in order to explain the dynamic behavior of the photodoping mechanism in lateral PMCs. At the end, in order to extract the time constant of ChG materials, a method which enables us to determine the carriers’ mobility with and without the UV light exposure is proposed. In order to validate these models, the results of TCAD simulations using Silvaco ATLAS are also presented in the study, which show good agreement.
In the second theme of this dissertation, a new model is presented to predict single event transients in 1T-1R memory arrays as an inverter, where the PMC is modeled as a constant resistance while the OFF transistor is model as a diode in parallel to a capacitance. The model divides the output voltage transient response of an inverter into three time segments, where an ionizing particle striking through the drain–body junction of the OFF-state NMOS is represented as a photocurrent pulse. If this current source is large enough, the output voltage can drop to a negative voltage. In this model, the OFF-state NMOS is represented as the parallel combination of an ideal diode and the intrinsic capacitance of the drain–body junction, while a resistance represents an ON-state NMOS. The proposed model is verified by 3-D TCAD mixed-mode device simulations. In order to investigate the flexibility of the model, the effects of important parameters, such as ON-state PMOS resistance, doping concentration of p-region in the diode, and the photocurrent pulse are scrutinized.
The third theme of this dissertation develops various models together with TCAD simulations to model the behavior of different diamond-based devices, including PIN diodes and bipolar junction transistors (BJTs). Diamond is a very attractive material for contemporary power semiconductor devices because of its excellent material properties, such as high breakdown voltage and superior thermal conductivity compared to other materials. Collectively, this research project enhances the development of high power and high temperature electronics using diamond-based semiconductors. During the fabrication process of diamond-based devices, structural defects particularly threading dislocations (TDs), may affect the device electrical properties, and models were developed to account of such defects. Recognition of their behavior helps us understand and predict the performance of diamond-based devices. Here, the electrical conductance through TD sites is shown to be governed by the Poole-Frenkel emission (PFE) for the temperature (T) range of 323 K ˂ T ˂ 423 K. Analytical models were performed to fit with experimental data over the aforementioned temperature range. Next, the Silvaco Atlas tool, a drift-diffusion based TCAD commercial software, was used to model diamond-based BJTs. Here, some field plate methods are proposed in order to decrease the surface electric field. The models used in Atlas are modified to account for both hopping transport in the impurity bands associated with high activation energies for boron doped and phosphorus doped diamond.
In the second theme of this dissertation, a new model is presented to predict single event transients in 1T-1R memory arrays as an inverter, where the PMC is modeled as a constant resistance while the OFF transistor is model as a diode in parallel to a capacitance. The model divides the output voltage transient response of an inverter into three time segments, where an ionizing particle striking through the drain–body junction of the OFF-state NMOS is represented as a photocurrent pulse. If this current source is large enough, the output voltage can drop to a negative voltage. In this model, the OFF-state NMOS is represented as the parallel combination of an ideal diode and the intrinsic capacitance of the drain–body junction, while a resistance represents an ON-state NMOS. The proposed model is verified by 3-D TCAD mixed-mode device simulations. In order to investigate the flexibility of the model, the effects of important parameters, such as ON-state PMOS resistance, doping concentration of p-region in the diode, and the photocurrent pulse are scrutinized.
The third theme of this dissertation develops various models together with TCAD simulations to model the behavior of different diamond-based devices, including PIN diodes and bipolar junction transistors (BJTs). Diamond is a very attractive material for contemporary power semiconductor devices because of its excellent material properties, such as high breakdown voltage and superior thermal conductivity compared to other materials. Collectively, this research project enhances the development of high power and high temperature electronics using diamond-based semiconductors. During the fabrication process of diamond-based devices, structural defects particularly threading dislocations (TDs), may affect the device electrical properties, and models were developed to account of such defects. Recognition of their behavior helps us understand and predict the performance of diamond-based devices. Here, the electrical conductance through TD sites is shown to be governed by the Poole-Frenkel emission (PFE) for the temperature (T) range of 323 K ˂ T ˂ 423 K. Analytical models were performed to fit with experimental data over the aforementioned temperature range. Next, the Silvaco Atlas tool, a drift-diffusion based TCAD commercial software, was used to model diamond-based BJTs. Here, some field plate methods are proposed in order to decrease the surface electric field. The models used in Atlas are modified to account for both hopping transport in the impurity bands associated with high activation energies for boron doped and phosphorus doped diamond.
ContributorsSaremi, Mehdi (Author) / Goodnick, Stephen M (Thesis advisor) / Vasileska, Dragica (Committee member) / Kozicki, Michael N (Committee member) / Yu, Shimeng (Committee member) / Arizona State University (Publisher)
Created2017
Description
The Programmable Metallization Cell (PMC) is a novel solid-state resistive switching technology. It has a simple metal-insulator-metal “MIM” structure with one metal being electrochemically active (Cu) and the other one being inert (Pt or W), an insulating film (silica) acts as solid electrolyte for ion transport is sandwiched between these two electrodes. PMC’s resistance can be altered by an external electrical stimulus. The change of resistance is attributed to the formation or dissolution of Cu metal filament(s) within the silica layer which is associated with electrochemical redox reactions and ion transportation. In this dissertation, a comprehensive study of microfabrication method and its impacts on performance of PMC device is demonstrated, gamma-ray total ionizing dose (TID) impacts on device reliability is investigated, and the materials properties of doped/undoped silica switching layers are illuminated by impedance spectroscopy (IS). Due to the inherent CMOS compatibility, Cu-silica PMCs have great potential to be adopted in many emerging technologies, such as non-volatile storage cells and selector cells in ultra-dense 3D crosspoint memories, as well as electronic synapses in brain-inspired neuromorphic computing. Cu-silica PMC device performance for these applications is also assessed in this dissertation.
ContributorsChen, Wenhao (Author) / Kozicki, Michael N (Thesis advisor) / Barnaby, Hugh J (Thesis advisor) / Yu, Shimeng (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2017
Description
The partially-depleted (PD) silicon Metal Semiconductor Field Effect Transistor (MESFET) is becoming more and more attractive for analog and RF applications due to its high breakdown voltage. Compared to conventional CMOS high voltage transistors, the silicon MESFET can be fabricated in commercial standard Silicon-on-Insulator (SOI) CMOS foundries without any change to the process. The transition frequency of the device is demonstrated to be 45GHz, which makes the MESFET suitable for applications in high power RF power amplifier designs. Also, high breakdown voltage and low turn-on resistance make it the ideal choice for switches in the switching regulator designs. One of the anticipated applications of the MESFET is for the pass device for a low dropout linear regulator. Conventional NMOS and PMOS linear regulators suffer from high dropout voltage, low bandwidth and poor stability issues. In contrast, the N-MESFET pass transistor can provide an ultra-low dropout voltage and high bandwidth without the need for an external compensation capacitor to ensure stability. In this thesis, the design theory and problems of the conventional linear regulators are discussed. N-MESFET low dropout regulators are evaluated and characterized. The error amplifier used a folded cascode architecture with gain boosting. The source follower topology is utilized as the buffer to sink the gate leakage current from the MESFET. A shunt-feedback transistor is added to reduce the output impedance and provide the current adaptively. Measurement results show that the dropout voltage is less than 150 mV for a 1A load current at 1.8V output. Radiation measurements were done for discrete MESFET and fully integrated LDO regulators, which demonstrate their radiation tolerance ability for aerospace applications.
ContributorsChen, Bo (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
The constant scaling of supply voltages in state-of-the-art CMOS processes has led to severe limitations for many analog circuit applications. Some CMOS processes have addressed this issue by adding high voltage MOSFETs to their process. Although it can be a completely viable solution, it usually requires a changing of the process flow or adding additional steps, which in turn, leads to an increase in fabrication costs. Si-MESFETs (silicon-metal-semiconductor-field-effect-transistors) from Arizona State University (ASU) on the other hand, have an inherent high voltage capability and can be added to any silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) CMOS process free of cost. This has been proved at five different commercial foundries on technologies ranging from 0.5 to 0.15 μm. Another critical issue facing CMOS processes on insulated substrates is the scaling of the thin silicon channel. Consequently, the future direction of SOI/SOS CMOS transistors may trend away from partially depleted (PD) transistors and towards fully depleted (FD) devices. FD-CMOS are already being implemented in multiple applications due to their very low power capability. Since the FD-CMOS market only figures to grow, it is appropriate that MESFETs also be developed for these processes. The beginning of this thesis will focus on the device aspects of both PD and FD-MESFETs including their layout structure, DC and RF characteristics, and breakdown voltage. The second half will then shift the focus towards implementing both types of MESFETs in an analog circuit application. Aside from their high breakdown ability, MESFETs also feature depletion mode operation, easy to adjust but well controlled threshold voltages, and fT's up to 45 GHz. Those unique characteristics can allow certain designs that were previously difficult to implement or prohibitively expensive using conventional technologies to now be achieved. One such application which benefits is low dropout regulators (LDO). By utilizing an n-channel MESFET as the pass transistor, a LDO featuring very low dropout voltage, fast transient response, and stable operation can be achieved without an external capacitance. With the focus of this thesis being MESFET based LDOs, the device discussion will be mostly tailored towards optimally designing MESFETs for this particular application.
ContributorsLepkowski, William (Author) / Thornton, Trevor (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Goryll, Michael (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2010
Description
This thesis presents a gas sensor readout IC for amperometric and conductometric electrochemical sensors. The Analog Front-End (AFE) readout circuit enables tracking long term exposure to hazardous gas fumes in diesel and gasoline equipments, which may be correlated to diseases. Thus, the detection and discrimination of gases using microelectronic gas sensor system is required. This thesis describes the research, development, implementation and test of a small and portable based prototype platform for chemical gas sensors to enable a low-power and low noise gas detection system. The AFE reads out the outputs of eight conductometric sensor array and eight amperometric sensor arrays. The IC consists of a low noise potentiostat, and associated 9bit current-steering DAC for sensor stimulus, followed by the first order nested chopped £U£G ADC. The conductometric sensor uses a current driven approach for extracting conductance of the sensor depending on gas concentration. The amperometric sensor uses a potentiostat to apply constant voltage to the sensors and an I/V converter to measure current out of the sensor. The core area for the AFE is 2.65x0.95 mm2. The proposed system achieves 91 dB SNR at 1.32 mW quiescent power consumption per channel. With digital offset storage and nested chopping, the readout chain achieves 500 fÝV input referred offset.
ContributorsKim, Hyun-Tae (Author) / Bakkaloglu, Bertan (Thesis advisor) / Vermeire, Bert (Committee member) / Spanias, Andreas (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2011
Description
Programmable Metallization Cell (PMC) is a resistance-switching device based on migration of nanoscale quantities of cations in a solid electrolyte and formation of a conducting electrodeposit by the reductions of these cations. This dissertation presents electrical characterization results on Cu-SiO2 based PMC devices, which due to the na- ture of materials can be easily integrated into the current Complimentary metal oxide semiconductor (CMOS) process line. Device structures representing individual mem- ory cells based on W bottom electrode and n-type Si bottom electrode were fabricated for characterization. For the W bottom electrode based devices, switching was ob- served for voltages in the range of 500mV and current value as low as 100 nA showing the electrochemical nature and low power potential. The ON state showed a direct de- pendence on the programming current, showing the possibility of multi-bit storage in a single cell. Room temperature retention was demonstrated in excess of 105 seconds and endurance to approximately 107 cycles. Switching was observed for microsecond duration 3 V amplitude pulses. Material characterization results from Raman, X-ray diffraction, Rutherford backscattering and Secondary-ion mass spectroscopy analysis shows the influence of processing conditions on the Cu concentration within the film and also the presence of Cu as free atoms. The results seemed to indicate stress-induced void formation in the SiO2 matrix as the driving mechanism for Cu diffusion into the SiO2 film. Cu/SiO2
Si based PMC devices were characterized and were shown to have inherent isolation characteristics, proving the feasibility of such a structure for a passive array. The inherent isolation property simplifies fabrication by avoiding the need for a separate diode element in an array. The isolation characteristics were studied mainly in terms of the leakage current. The nature of the diode interface was further studied by extracting a barrier potential which shows it can be approximated to a Cu-nSi metal semiconductor Schottky diode.
Si based PMC devices were characterized and were shown to have inherent isolation characteristics, proving the feasibility of such a structure for a passive array. The inherent isolation property simplifies fabrication by avoiding the need for a separate diode element in an array. The isolation characteristics were studied mainly in terms of the leakage current. The nature of the diode interface was further studied by extracting a barrier potential which shows it can be approximated to a Cu-nSi metal semiconductor Schottky diode.
ContributorsPuthenthermadam, Sarath (Author) / Kozicki, Michael N (Thesis advisor) / Diaz, Rodolfo (Committee member) / Schroder, Dieter K. (Committee member) / Alford, Terry (Committee member) / Arizona State University (Publisher)
Created2011
Description
Graphene, a one atomic thick planar sheet of carbon atoms, has a zero gap band structure with a linear dispersion relation. This unique property makes graphene a favorite for physicists and engineers, who are trying to understand the mechanism of charge transport in graphene and using it as channel material for field effect transistor (FET) beyond silicon. Therefore, an in-depth exploring of these electrical properties of graphene is urgent, which is the purpose of this dissertation. In this dissertation, the charge transport and quantum capacitance of graphene were studied. Firstly, the transport properties of back-gated graphene transistor covering by high dielectric medium were systematically studied. The gate efficiency increased by up to two orders of magnitude in the presence of a high top dielectric medium, but the mobility did not change significantly. The results strongly suggested that the previously reported top dielectric medium-induced charge transport properties of graphene FETs were possibly due to the increase of gate capacitance, rather than enhancement of carrier mobility. Secondly, a direct measurement of quantum capacitance of graphene was performed. The quantum capacitance displayed a non-zero minimum at the Dirac point and a linear increase on both sides of the minimum with relatively small slopes. The findings - which were not predicted by theory for ideal graphene - suggested that scattering from charged impurities also influences the quantum capacitance. The capacitances in aqueous solutions at different ionic concentrations were also measured, which strongly suggested that the longstanding puzzle about the interfacial capacitance in carbon-based electrodes had a quantum origin. Finally, the transport and quantum capacitance of epitaxial graphene were studied simultaneously, the quantum capacitance of epitaxial graphene was extracted, which was similar to that of exfoliated graphene near the Dirac Point, but exhibited a large sub-linear behavior at high carrier density. The self-consistent theory was found to provide a reasonable description of the transport data of the epitaxial graphene device, but a more complete theory was needed to explain both the transport and quantum capacitance data.
ContributorsXia, Jilin (Author) / Tao, N.J. (Thesis advisor) / Ferry, David (Committee member) / Thornton, Trevor (Committee member) / Tsui, Raymond (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2010
Description
Electronic devices are gaining an increasing market share in the medical field. Medical devices are becoming more sophisticated, and encompassing more applications. Unlike consumer electronics, medical devices have far more limitations when it comes to area, power and most importantly reliability. The medical devices industry has recently seen the advantages of using Flash memory instead of Read Only Memory (ROM) for firmware storage, and in some cases to replace Electrically Programmable Read Only Memories (EEPROMs) in medical devices for frequent data storage. There are direct advantages to using Flash memory instead of Read Only Memory, most importantly the fact that firmware can be rewritten along the development cycle and in the field. However, Flash technology requires high voltage circuitry that makes it harder to integrate into low power devices. There have been a lot of advances in Non-Volatile Memory (NVM) technologies, and many Flash rivals are starting to gain attention. The purpose of this thesis is to evaluate these new technologies against Flash to determine the feasibility as well as the advantages of each technology. The focus is on embedded memory in a medical device micro-controller and application specific integrated circuits (ASIC). A behavioral model of a Programmable Metallization Cell (PMC) was used to simulate the behavior and determine the advantages of using PMC technology versus flash. When compared to flash test data, PMC based embedded memory showed a reduction in power consumption by many orders of magnitude. Analysis showed that an approximated 20% device longevity increase can be achieved by using embedded PMC technology.
ContributorsHag, Eslam E (Author) / Kozicki, Michael N (Thesis advisor) / Schroder, Dieter K. (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2010
Description
Every engineer is responsible for completing a capstone project as a culmination of accredited university learning to demonstrate technical knowledge and enhance interpersonal skills, like teamwork, communication, time management, and problem solving. This project, with three or four engineers working together in a group, emphasizes not only the importance of technical skills acquired through laboratory procedures and coursework, but the significance of soft skills as one transitions from a university to a professional workplace; it also enhances the understanding of an engineer's obligation to ethically improve society by harnessing technical knowledge to bring about change. The CC2541 Smart SensorTag is a device manufactured by Texas Instruments that focuses on the use of wireless sensors to create low energy applications, or apps; it is equipped with Bluetooth Smart, which enables it to communicate wirelessly with similar devices like smart phones and computers, assisting greatly in app development. The device contains six built-in sensors, which can be utilized to track and log personal data in real-time; these sensors include a gyroscope, accelerometer, humidifier, thermometer, barometer, and magnetometer. By combining the data obtained through the sensors with the ability to communicate wirelessly, the SensorTag can be used to develop apps in multiple fields, including fitness, recreation, health, safety, and more. Team SensorTag chose to focus on health and safety issues to complete its capstone project, creating applications intended for use by senior citizens who live alone or in assisted care homes. Using the SensorTag's ability to track multiple local variables, the team worked to collect data that verified the accuracy and quality of the sensors through repeated experimental trials. Once the sensors were tested, the team developed applications accessible via smart phones or computers to trigger an alarm and send an alert via vibration, e-mail, or Tweet if the SensorTag detects a fall. The fall detection service utilizes the accelerometer and gyroscope sensors with the hope that such a system will prevent severe injuries among the elderly, allow them to function more independently, and improve their quality of life, which is the obligation of engineers to better through their work.
ContributorsMartin, Katherine Julia (Author) / Thornton, Trevor (Thesis director) / Goryll, Michael (Committee member) / Electrical Engineering Program (Contributor) / School of Film, Dance and Theatre (Contributor) / Barrett, The Honors College (Contributor)
Created2015-12