Matching Items (146)
Description
Radio frequency (RF) transceivers require a disproportionately high effort in terms of test development time, test equipment cost, and test time. The relatively high test cost stems from two contributing factors. First, RF transceivers require the measurement of a diverse set of specifications, requiring multiple test set-ups and long test times, which complicates load-board design, debug, and diagnosis. Second, high frequency operation necessitates the use of expensive equipment, resulting in higher per second test time cost compared with mixed-signal or digital circuits. Moreover, in terms of the non-recurring engineering cost, the need to measure complex specfications complicates the test development process and necessitates a long learning process for test engineers. Test time is dominated by changing and settling time for each test set-up. Thus, single set-up test solutions are desirable. Loop-back configuration where the transmitter output is connected to the receiver input are used as the desirable test set- up for RF transceivers, since it eliminates the reliance on expensive instrumentation for RF signal analysis and enables measuring multiple parameters at once. In-phase and Quadrature (IQ) imbalance, non-linearity, DC offset and IQ time skews are some of the most detrimental imperfections in transceiver performance. Measurement of these parameters in the loop-back mode is challenging due to the coupling between the receiver (RX) and transmitter (TX) parameters. Loop-back based solutions are proposed in this work to resolve this issue. A calibration algorithm for a subset of the above mentioned impairments is also presented. Error Vector Magnitude (EVM) is a system-level parameter that is specified for most advanced communication standards. EVM measurement often takes extensive test development efforts, tester resources, and long test times. EVM is analytically related to system impairments, which are typically measured in a production test i environment. Thus, EVM test can be eliminated from the test list if the relations between EVM and system impairments are derived independent of the circuit implementation and manufacturing process. In this work, the focus is on the WLAN standard, and deriving the relations between EVM and three of the most detrimental impairments for QAM/OFDM based systems (IQ imbalance, non-linearity, and noise). Having low cost test techniques for measuring the RF transceivers imperfections and being able to analytically compute EVM from the measured parameters is a complete test solution for RF transceivers. These techniques along with the proposed calibration method can be used in improving the yield by widening the pass/fail boundaries for transceivers imperfections. For all of the proposed methods, simulation and hardware measurements prove that the proposed techniques provide accurate characterization of RF transceivers.
ContributorsNassery, Afsaneh (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2013
Description
There is a pervasive need in the defense industry for conformal, low-profile, efficient and broadband (HF-UHF) antennas. Broadband capabilities enable shared aperture multi-function radiators, while conformal antenna profiles minimize physical damage in army applications, reduce drag and weight penalties in airborne applications and reduce the visual and RF signatures of the communication node. This dissertation is concerned with a new class of antennas called Magneto-Dielectric wire antennas (MDWA) that provide an ideal solution to this ever-present and growing need. Magneto-dielectric structures (μr>1;εr>1) can partially guide electromagnetic waves and radiate them by leaking off the structure or by scattering from any discontinuities, much like a metal antenna of the same shape. They are attractive alternatives to conventional whip and blade antennas because they can be placed conformal to a metallic ground plane without any performance penalty. A two pronged approach is taken to analyze MDWAs. In the first, antenna circuit models are derived for the prototypical dipole and loop elements that include the effects of realistic dispersive magneto-dielectric materials of construction. A material selection law results, showing that: (a) The maximum attainable efficiency is determined by a single magnetic material parameter that we term the hesitivity: Closely related to Snoek's product, it measures the maximum magnetic conductivity of the material. (b) The maximum bandwidth is obtained by placing the highest amount of μ" loss in the frequency range of operation. As a result, high radiation efficiency antennas can be obtained not only from the conventional low loss (low μ") materials but also with highly lossy materials (tan(δm)>>1). The second approach used to analyze MDWAs is through solving the Green function problem of the infinite magneto-dielectric cylinder fed by a current loop. This solution sheds light on the leaky and guided waves supported by the magneto-dielectric structure and leads to useful design rules connecting the permeability of the material to the cross sectional area of the antenna in relation to the desired frequency of operation. The Green function problem of the permeable prolate spheroidal antenna is also solved as a good approximation to a finite cylinder.
ContributorsSebastian, Tom (Author) / Diaz, Rodolfo E (Thesis advisor) / Pan, George (Committee member) / Aberle, James T., 1961- (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
Synchronous buck converters have become the obvious choice of design for high efficiency voltage down-conversion applications and find wide scale usage in today's IC industry. The use of digital control in synchronous buck converters is becoming increasingly popular because of its associated advantages over traditional analog counterparts in terms of design flexibility, reduced use of off-chip components, and better programmability to enable advanced controls. They also demonstrate better immunity to noise, enhances tolerance to the process, voltage and temperature (PVT) variations, low chip area and as a result low cost. It enables processing in digital domain requiring a need of analog-digital interfacing circuit viz. Analog to Digital Converter (ADC) and Digital to Analog Converter (DAC). A Digital to Pulse Width Modulator (DPWM) acts as time domain DAC required in the control loop to modulate the ON time of the Power-MOSFETs. The accuracy and efficiency of the DPWM creates the upper limit to the steady state voltage ripple of the DC - DC converter and efficiency in low load conditions. This thesis discusses the prevalent architectures for DPWM in switched mode DC - DC converters. The design of a Hybrid DPWM is presented. The DPWM is 9-bit accurate and is targeted for a Synchronous Buck Converter with a switching frequency of 1.0 MHz. The design supports low power mode(s) for the buck converter in the Pulse Frequency Modulation (PFM) mode as well as other fail-safe features. The design implementation is digital centric making it robust across PVT variations and portable to lower technology nodes. Key target of the design is to reduce design time. The design is tested across large Process (+/- 3σ), Voltage (1.8V +/- 10%) and Temperature (-55.0 °C to 125 °C) and is in the process of tape-out.
ContributorsKumar, Amit (Author) / Bakkaloglu, Bertan (Thesis advisor) / Song, Hongjiang (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2013
Description
Doppler radar can be used to measure respiration and heart rate without contact and through obstacles. In this work, a Doppler radar architecture at 2.4 GHz and a new signal processing algorithm to estimate the respiration and heart rate are presented. The received signal is dominated by the transceiver noise, LO phase noise and clutter which reduces the signal-to-noise ratio of the desired signal. The proposed architecture and algorithm are used to mitigate these issues and obtain an accurate estimate of the heart and respiration rate. Quadrature low-IF transceiver architecture is adopted to resolve null point problem as well as avoid 1/f noise and DC offset due to mixer-LO coupling. Adaptive clutter cancellation algorithm is used to enhance receiver sensitivity coupled with a novel Pattern Search in Noise Subspace (PSNS) algorithm is used to estimate respiration and heart rate. PSNS is a modified MUSIC algorithm which uses the phase noise to enhance Doppler shift detection. A prototype system was implemented using off-the-shelf TI and RFMD transceiver and tests were conduct with eight individuals. The measured results shows accurate estimate of the cardio pulmonary signals in low-SNR conditions and have been tested up to a distance of 6 meters.
ContributorsKhunti, Hitesh Devshi (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Bliss, Daniel (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2013
Description
This thesis work mainly examined the stability and reliability issues of amorphous Indium Gallium Zinc Oxide (a-IGZO) thin film transistors under bias-illumination stress. Amorphous hydrogenated silicon has been the dominating material used in thin film transistors as a channel layer. However with the advent of modern high performance display technologies, it is required to have devices with better current carrying capability and better reproducibility. This brings the idea of new material for channel layer of these devices. Researchers have tried poly silicon materials, organic materials and amorphous mixed oxide materials as a replacement to conventional amorphous silicon layer. Due to its low price and easy manufacturing process, amorphous mixed oxide thin film transistors have become a viable option to replace the conventional ones in order to achieve high performance display circuits. But with new materials emerging, comes the challenge of reliability and stability issues associated with it. Performance measurement under bias stress and bias-illumination stress have been reported previously. This work proposes novel post processing low temperature long time annealing in optimum ambient in order to annihilate or reduce the defects and vacancies associated with amorphous material which lead to the instability or even the failure of the devices. Thin film transistors of a-IGZO has been tested for standalone illumination stress and bias-illumination stress before and after annealing. HP 4155B semiconductor parameter analyzer has been used to stress the devices and measure the output characteristics and transfer characteristics of the devices. Extra attention has been given about the effect of forming gas annealing on a-IGZO thin film. a-IGZO thin film deposited on silicon substrate has been tested for resistivity, mobility and carrier concentration before and after annealing in various ambient. Elastic Recoil Detection has been performed on the films to measure the amount of hydrogen atoms present in the film. Moreover, the circuit parameters of the thin film transistors has been extracted to verify the physical phenomenon responsible for the instability and failure of the devices. Parameters like channel resistance, carrier mobility, power factor has been extracted and variation of these parameters has been observed before and after the stress.
ContributorsRuhul Hasin, Muhammad (Author) / Alford, Terry L. (Thesis advisor) / Krause, Stephen (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2013
Description
Microwave (MW), thermal, and ultraviolet (UV) annealing were used to explore the response of Ag structures on a Ge-Se chalcogenide glass (ChG) thin film as flexible radiation sensors, and Te-Ti chalcogenide thin films as a material for diffusion barriers in microelectronics devices and processing of metallized Cu. Flexible resistive radiation sensors consisting of Ag electrodes on a Ge20Se80 ChG thin film and polyethylene naphthalate substrate were exposed to UV radiation. The sensors were mounted on PVC tubes of varying radii to induce bending strains and annealed under ambient conditions up to 150 oC. Initial sensor resistance was measured to be ~1012 Ω; after exposure to UV radiation, the resistance was ~104 Ω. Bending strain and low temperature annealing had no significant effect on the resistance of the sensors. Samples of Cu on Te-Ti thin films were annealed in vacuum for up to 30 minutes and were stable up to 500 oC as revealed using Rutherford backscattering spectrometry (RBS) and four-point-probe analysis. X-ray diffractometry (XRD) indicates Cu grain growth up to 500 oC and phase instability of the Te-Ti barrier at 600 oC. MW processing was performed in a 2.45-GHz microwave cavity on Cu/Te-Ti films for up to 30 seconds to induce oxide growth. Using a calibrated pyrometer above the sample, the temperature of the MW process was measured to be below a maximum of 186 oC. Four-point-probe analysis shows an increase in resistance with an increase in MW time. XRD indicates growth of CuO on the sample surface. RBS suggests oxidation throughout the Te-Ti film. Additional samples were exposed to 907 J/cm2 UV radiation in order to ensure other possible electromagnetically induced mechanisms were not active. There were no changes observed using XRD, RBS or four point probing.
ContributorsRoos, Benjamin, 1990- (Author) / Alford, Terry L. (Thesis advisor) / Theodore, David (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
Asymptotic and Numerical methods are popular in applied electromagnetism. In this work, the two methods are applied for collimated antennas and calibration targets, respectively. As an asymptotic method, the diffracted Gaussian beam approach (DGBA) is developed for design and simulation of collimated multi-reflector antenna systems, based upon Huygens principle and independent Gaussian beam expansion, referred to as the frames. To simulate a reflector antenna in hundreds to thousands of wavelength, it requires 1E7 - 1E9 independent Gaussian beams. To this end, high performance parallel computing is implemented, based on Message Passing Interface (MPI). The second part of the dissertation includes the plane wave scattering from a target consisting of doubly periodic array of sharp conducting circular cones by the magnetic field integral equation (MFIE) via Coiflet based Galerkin's procedure in conjunction with the Floquet theorem. Owing to the orthogonally, compact support, continuity and smoothness of the Coiflets, well-conditioned impedance matrices are obtained. Majority of the matrix entries are obtained in the spectral domain by one-point quadrature with high precision. For the oscillatory entries, spatial domain computation is applied, bypassing the slow convergence of the spectral summation of the non-damping propagating modes. The simulation results are compared with the solutions from an RWG-MLFMA based commercial software, FEKO, and excellent agreement is observed.
ContributorsWang, Le, 1975- (Author) / Pan, George (Thesis advisor) / Yu, Hongyu (Committee member) / Aberle, James T., 1961- (Committee member) / Diaz, Rodolfo (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2012
Description
The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive, complex, and lengthy. Rapid prototyping and emulation of analog ICs will be significant in the design and testing of complex analog systems. A new approach, Programmable ANalog Device Array (PANDA) that maps any AMS design problem to a transistor-level programmable hardware, is proposed. This approach enables fast system level validation and a reduction in post-Silicon bugs, minimizing design risk and cost. The unique features of the approach include 1) transistor-level programmability that emulates each transistor behavior in an analog design, achieving very fine granularity of reconfiguration; 2) programmable switches that are treated as a design component during analog transistor emulating, and optimized with the reconfiguration matrix; 3) compensation of AC performance degradation through boosting the bias current. Based on these principles, a digitally controlled PANDA platform is designed at 45nm node that can map AMS modules across 22nm to 90nm technology nodes. A systematic emulation approach to map any analog transistor to 45nm PANDA cell is proposed, which achieves transistor level matching accuracy of less than 5% for ID and less than 10% for Rout and Gm. Circuit level analog metrics of a voltage-controlled oscillator (VCO) emulated by PANDA, match to those of the original designs in 22nm and 90nm nodes with less than a 5% error. Several other 90nm and 22nm analog blocks are successfully emulated by the 45nm PANDA platform, including a folded-cascode operational amplifier and a sample-and-hold module (S/H). Further capabilities of PANDA are demonstrated by the first full-chip silicon of PANDA which is implemented on 65nm process This system consists of a 24×25 cell array, reconfigurable interconnect and configuration memory. The voltage and current reference circuits, op amps and a VCO with a phase interpolation circuit are emulated by PANDA.
ContributorsSuh, Jounghyuk (Author) / Bakkaloglu, Bertan (Thesis advisor) / Cao, Yu (Committee member) / Ozev, Sule (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
In-band full-duplex relays are envisioned as promising solution to increase the throughput of next generation wireless communications. Full-duplex relays, being able to transmit and receive at same carrier frequency, offers increased spectral efficiency compared to half-duplex relays that transmit and receive at different frequencies or times. The practical implementation of full-duplex relays is limited by the strong self-interference caused by the coupling of relay's own transit signals to its desired received signals. Several techniques have been proposed in literature to mitigate the relay self-interference. In this thesis, the performance of in-band full-duplex multiple-input multiple-output (MIMO) relays is considered in the context of simultaneous communications and channel estimation. In particular, adaptive spatial transmit techniques is considered to protect the full-duplex radio's receive array. It is assumed that relay's transmit and receive antenna phase centers are physically distinct. This allows the radio to employ adaptive spatial transmit and receive processing to mitigate self-interference.
The performance of this protection is dependent upon numerous factors, including channel estimation accuracy, which is the focus of this thesis. In particular, the concentration is on estimating the self-interference channel. A novel approach of simultaneous signaling to estimate the self-interference channel in MIMO full-duplex relays is proposed. To achieve this simultaneous communications
and channel estimation, a full-rank pilot signal at a reduced relative power is transmitted simultaneously with a low rank communication waveform. The self-interference mitigation is investigated in the context of eigenvalue spread of spatial relay receive co-variance matrix. Performance is demonstrated by using simulations,
in which orthogonal-frequency division-multiplexing communications and pilot sequences are employed.
The performance of this protection is dependent upon numerous factors, including channel estimation accuracy, which is the focus of this thesis. In particular, the concentration is on estimating the self-interference channel. A novel approach of simultaneous signaling to estimate the self-interference channel in MIMO full-duplex relays is proposed. To achieve this simultaneous communications
and channel estimation, a full-rank pilot signal at a reduced relative power is transmitted simultaneously with a low rank communication waveform. The self-interference mitigation is investigated in the context of eigenvalue spread of spatial relay receive co-variance matrix. Performance is demonstrated by using simulations,
in which orthogonal-frequency division-multiplexing communications and pilot sequences are employed.
ContributorsSekhar, Kishore Kumar (Author) / Bliss, Daniel W (Thesis advisor) / Kitchen, Jennifer (Committee member) / Zhang, Junshan (Committee member) / Arizona State University (Publisher)
Created2014
Description
Isolated DC/DC converters are used to provide electrical isolation between two supply domain systems. A fully integrated isolated DC/DC converter having no board-level components and fabricated using standard integrated circuits (IC) process is highly desirable in order to increase the system reliability and reduce costs. The isolation between the low-voltage side and high-voltage side of the converter is realized by a transformer that transfers energy while blocking the DC loop. The resonant mode power oscillator is used to enable high efficiency power transfer. The on-chip transformer is expected to have high coil inductance, high quality factors and high coupling coefficient to reduce the loss in the oscillation. The performance of a transformer is highly dependent on the vertical structure, horizontal geometry and other indispensable structures that make it compatible with the IC process such as metal fills and patterned ground shield (PGS). With the help of three-dimensional (3-D) electro-magnetic (EM) simulation software, the 3-D transformer model is simulated and the simulation result is got with high accuracy.
In this thesis an on-chip transformer for a fully integrated DC/DC converter using standard IC process is developed. Different types of transformers are modeled and simulated in HFSS. The performances are compared to select the optimum design. The effects of the additional structures including PGS and metal fills are also simulated. The transformer is tested with a network analyzer and the testing results show a good consistency with the simulation results when taking the chip traces, printed circuit board (PCB) traces, bond wires and SMA connectors into account.
In this thesis an on-chip transformer for a fully integrated DC/DC converter using standard IC process is developed. Different types of transformers are modeled and simulated in HFSS. The performances are compared to select the optimum design. The effects of the additional structures including PGS and metal fills are also simulated. The transformer is tested with a network analyzer and the testing results show a good consistency with the simulation results when taking the chip traces, printed circuit board (PCB) traces, bond wires and SMA connectors into account.
ContributorsZhao, Yao (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kiaei, Sayfe (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2014