Matching Items (163)
Description
With the increasing focus on developing environmentally benign electronic packages, lead-free solder alloys have received a great deal of attention. Mishandling of packages, during manufacture, assembly, or by the user may cause failure of solder joint. A fundamental understanding of the behavior of lead-free solders under mechanical shock conditions is lacking. Reliable experimental and numerical analysis of lead-free solder joints in the intermediate strain rate regime need to be investigated. This dissertation mainly focuses on exploring the mechanical shock behavior of lead-free tin-rich solder alloys via multiscale modeling and numerical simulations. First, the macroscopic stress/strain behaviors of three bulk lead-free tin-rich solders were tested over a range of strain rates from 0.001/s to 30/s. Finite element analysis was conducted to determine appropriate specimen geometry that could reach a homogeneous stress/strain field and a relatively high strain rate. A novel self-consistent true stress correction method is developed to compensate the inaccuracy caused by the triaxial stress state at the post-necking stage. Then the material property of micron-scale intermetallic was examined by micro-compression test. The accuracy of this measure is systematically validated by finite element analysis, and empirical adjustments are provided. Moreover, the interfacial property of the solder/intermetallic interface is investigated, and a continuum traction-separation law of this interface is developed from an atomistic-based cohesive element method. The macroscopic stress/strain relation and microstructural properties are combined together to form a multiscale material behavior via a stochastic approach for both solder and intermetallic. As a result, solder is modeled by porous plasticity with random voids, and intermetallic is characterized as brittle material with random vulnerable region. Thereafter, the porous plasticity fracture of the solders and the brittle fracture of the intermetallics are coupled together in one finite element model. Finally, this study yields a multiscale model to understand and predict the mechanical shock behavior of lead-free tin-rich solder joints. Different fracture patterns are observed for various strain rates and/or intermetallic thicknesses. The predictions have a good agreement with the theory and experiments.
ContributorsFei, Huiyang (Author) / Jiang, Hanqing (Thesis advisor) / Chawla, Nikhilesh (Thesis advisor) / Tasooji, Amaneh (Committee member) / Mobasher, Barzin (Committee member) / Rajan, Subramaniam D. (Committee member) / Arizona State University (Publisher)
Created2011
Description
Current sensing ability is one of the most desirable features of contemporary current or voltage mode controlled DC-DC converters. Current sensing can be used for over load protection, multi-stage converter load balancing, current-mode control, multi-phase converter current-sharing, load independent control, power efficiency improvement etc. There are handful existing approaches for current sensing such as external resistor sensing, triode mode current mirroring, observer sensing, Hall-Effect sensors, transformers, DC Resistance (DCR) sensing, Gm-C filter sensing etc. However, each method has one or more issues that prevent them from being successfully applied in DC-DC converter, e.g. low accuracy, discontinuous sensing nature, high sensitivity to switching noise, high cost, requirement of known external power filter components, bulky size, etc. In this dissertation, an offset-independent inductor Built-In Self Test (BIST) architecture is proposed which is able to measure the inductor inductance and DCR. The measured DCR enables the proposed continuous, lossless, average current sensing scheme. A digital Voltage Mode Control (VMC) DC-DC buck converter with the inductor BIST and current sensing architecture is designed, fabricated, and experimentally tested. The average measurement errors for inductance, DCR and current sensing are 2.1%, 3.6%, and 1.5% respectively. For the 3.5mm by 3.5mm die area, inductor BIST and current sensing circuits including related pins only consume 5.2% of the die area. BIST mode draws 40mA current for a maximum time period of 200us upon start-up and the continuous current sensing consumes about 400uA quiescent current. This buck converter utilizes an adaptive compensator. It could update compensator internally so that the overall system has a proper loop response for large range inductance and load current. Next, a digital Average Current Mode Control (ACMC) DC-DC buck converter with the proposed average current sensing circuits is designed and tested. To reduce chip area and power consumption, a 9 bits hybrid Digital Pulse Width Modulator (DPWM) which uses a Mixed-mode DLL (MDLL) is also proposed. The DC-DC converter has a maximum of 12V input, 1-11 V output range, and a maximum of 3W output power. The maximum error of one least significant bit (LSB) delay of the proposed DPWM is less than 1%.
ContributorsLiu, Tao (Author) / Bakkaloglu, Bertan (Thesis advisor) / Ozev, Sule (Committee member) / Vermeire, Bert (Committee member) / Cao, Yu (Committee member) / Arizona State University (Publisher)
Created2011
Description
In this thesis, a Built-in Self Test (BiST) based testing solution is proposed to measure linear and non-linear impairments in the RF Transmitter path using analytical approach. Design issues and challenges with the impairments modeling and extraction in transmitter path are discussed. Transmitter is modeled for I/Q gain & phase mismatch, system non-linearity and DC offset using Matlab. BiST architecture includes a peak detector which includes a self mode mixer and 200 MHz filter. Self Mode mixing operation with filtering removes the high frequency signal contents and allows performing analysis on baseband frequency signals. Transmitter impairments were calculated using spectral analysis of output from the BiST circuitry using an analytical method. Matlab was used to simulate the system with known test impairments and impairment values from simulations were calculated based on system modeling in Mathematica. Simulated data is in good correlation with input test data along with very fast test time and high accuracy. The key contribution of the work is that, system impairments are extracted from transmitter response at baseband frequency using envelope detector hence eliminating the need of expensive high frequency ATE (Automated Test Equipments).
ContributorsGoyal, Nitin (Author) / Ozev, Sule (Thesis advisor) / Duman, Tolga (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
Description
The drive towards device scaling and large output power in millimeter and sub-millimeter wave power amplifiers results in a highly non-linear, out-of-equilibrium charge transport regime. Particle-based Full Band Monte Carlo device simulators allow an accurate description of this carrier dynamics at the nanoscale. This work initially compares GaN high electron mobility transistors (HEMTs) based on the established Ga-face technology and the emerging N-face technology, through a modeling approach that allows a fair comparison, indicating that the N-face devices exhibit improved performance with respect to Ga-face ones due to the natural back-barrier confinement that mitigates short-channel-effects. An investigation is then carried out on the minimum aspect ratio (i.e. gate length to gate-to-channel-distance ratio) that limits short channel effects in ultra-scaled GaN and InP HEMTs, indicating that this value in GaN devices is 15 while in InP devices is 7.5. This difference is believed to be related to the different dielectric properties of the two materials, and the corresponding different electric field distributions. The dielectric effects of the passivation layer in millimeter-wave, high-power GaN HEMTs are also investigated, finding that the effective gate length is increased by fringing capacitances, enhanced by the dielectrics in regions adjacent to the gate for layers thicker than 5 nm, strongly affecting the frequency performance of deep sub-micron devices. Lastly, efficient Full Band Monte Carlo particle-based device simulations of the large-signal performance of mm-wave transistor power amplifiers with high-Q matching networks are reported for the first time. In particular, a CellularMonte Carlo (CMC) code is self-consistently coupled with a Harmonic Balance (HB) frequency domain circuit solver. Due to the iterative nature of the HB algorithm, this simulation approach is possible only due to the computational efficiency of the CMC, which uses pre-computed scattering tables. On the other hand, HB allows the direct simulation of the steady-state behavior of circuits with long transient time. This work provides an accurate and efficient tool for the device early-stage design, which allows a computerbased performance evaluation in lieu of the extremely time-consuming and expensive iterations of prototyping and experimental large-signal characterization.
ContributorsGuerra, Diego (Author) / Saraniti, Marco (Thesis advisor) / Ferry, David K. (Committee member) / Goodnick, Stephen M (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2011
Description
Laminated composites are increasingly being used in various industries including <br/>automotive and aerospace. Under a variety of extreme loading conditions such as low and <br/>high-velocity impacts and crash, laminated composites delaminate. To understand how and<br/>when delamination occurs, two types of laboratory tests are conducted - End-notched <br/>Flexure (ENF) test and Double Cantilever Beam (DCB) test. The ENF test is designed to <br/>find the mode II interlaminar fracture toughness, and the DCB test, the mode I interlaminar <br/>fracture toughness. In this thesis, thermopressed Honeywell Spectra Shield® 5231 <br/>composite specimens made of ultra-high molecular weight polyethylene (UHMWPE), <br/>manufactured under two different pressures (3000 psi and 6000 psi), are tested in the <br/>laboratory to find its delamination properties. The test specimen preparation, experimental <br/>procedures, and data reduction to determine the mode I and mode II interlaminar fracture <br/>properties are discussed. The ENF test results show a 15.8% increase in strain energy <br/>release rate for the 6000 psi specimens when compared to the 3000 psi specimens. <br/>Conducting the DCB tests proved to be challenging due to the low compressive strength <br/>of the material and hence required modifications to the test specimens. An estimate of the <br/>mode I interlaminar fracture toughness was found for only two of the 6000 psi specimens.
ContributorsRyder, Chandler (Author) / Rajan, Subramaniam (Thesis director) / Khaled, Bilal (Committee member) / Neithalath, Narayanan (Committee member) / Mechanical and Aerospace Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2021-05
Description
Sensing and controlling current flow is a fundamental requirement for many electronic systems, including power management (DC-DC converters and LDOs), battery chargers, electric vehicles, solenoid positioning, motor control, and power monitoring. Current Shunt Monitor (CSM) systems have various applications for precise current monitoring of those aforementioned applications. CSMs enable current measurement across an external sense resistor (RS) in series to current flow. Two different types of CSMs designed and characterized in this paper. First design used direct current reading method and the other design used indirect current reading method. Proposed CSM systems can sense power supply current ranging from 1mA to 200mA for the direct current reading topology and from 1mA to 500mA for the indirect current reading topology across a typical board Cu-trace resistance of 1 ohm with less than 10 µV input-referred offset, 0.3 µV/°C offset drift and 0.1% accuracy for both topologies. Proposed systems avoid using a costly zero-temperature coefficient (TC) sense resistor that is normally used in typical CSM systems. Instead, both of the designs used existing Cu-trace on the printed circuit board (PCB) in place of the costly resistor. The systems use chopper stabilization at the front-end amplifier signal path to suppress input-referred offset down to less than 10 µV. Switching current-mode (SI) FIR filtering technique is used at the instrumentation amplifier output to filter out the chopping ripple caused by input offset and flicker noise by averaging half of the phase 1 signal and the other half of the phase 2 signal. In addition, residual offset mainly caused by clock feed-through and charge injection of the chopper switches at the chopping frequency and its multiple frequencies notched out by the since response of the SI-FIR filter. A frequency domain Sigma Delta ADC which is used for the indirect current reading type design enables a digital interface to processor applications with minimally added circuitries to build a simple 1st order Sigma Delta ADC. The CSMs are fabricated on a 0.7µm CMOS process with 3 levels of metal, with maximum Vds tolerance of 8V and operates across a common mode range of 0 to 26V for the direct current reading type and of 0 to 30V for the indirect current reading type achieving less than 10nV/sqrtHz of flicker noise at 100 Hz for both approaches. By using a semi-digital SI-FIR filter, residual chopper offset is suppressed down to 0.5mVpp from a baseline of 8mVpp, which is equivalent to 25dB suppression.
ContributorsYeom, Hyunsoo (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kiaei, Sayfe (Committee member) / Ozev, Sule (Committee member) / Yu, Hongyu (Committee member) / Arizona State University (Publisher)
Created2011
Description
The first part describes Metal Semiconductor Field Effect Transistor (MESFET) based fundamental analog building blocks designed and fabricated in a single poly, 3-layer metal digital CMOS technology utilizing fully depletion mode MESFET devices. DC characteristics were measured by varying the power supply from 2.5V to 5.5V. The measured DC transfer curves of amplifiers show good agreement with the simulated ones with extracted models from the same process. The accuracy of the current mirror showing inverse operation is within ±15% for the current from 0 to 1.5mA with the power supply from 2.5 to 5.5V. The second part presents a low-power image recognition system with a novel MESFET device fabricated on a CMOS substrate. An analog image recognition system with power consumption of 2.4mW/cell and a response time of 6µs is designed, fabricated and characterized. The experimental results verified the accuracy of the extracted SPICE model of SOS MESFETs. The response times of 4µs and 6µs for one by four and one by eight arrays, respectively, are achieved with the line recognition. Each core cell for both arrays consumes only 2.4mW. The last part presents a CMOS low-power transceiver in MICS band is presented. The LNA core has an integrated mixer in a folded configuration. The baseband strip consists of a pseudo differential MOS-C band-pass filter achieving demodulation of 150kHz-offset BFSK signals. The SRO is used in a wakeup RX for the wake-up signal reception. The all digital frequency-locked loop drives a class AB power amplifier in a transmitter. The sensitivity of -85dBm in the wakeup RX is achieved with the power consumption of 320µW and 400µW at the data rates of 100kb/s and 200kb/s from 1.8V, respectively. The sensitivities of -70dBm and -98dBm in the data-link RX are achieved with NF of 40dB and 11dB at the data rate of 100kb/s while consuming only 600µW and 1.5mW at 1.2V and 1.8V, respectively.
ContributorsKim, Sung (Author) / Bakkaloglu, Bertan (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Cao, Yu (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2011
Description
The past two decades have been monumental in the advancement of microchips designed for a diverse range of medical applications and bio-analysis. Owing to the remarkable progress in micro-fabrication technology, complex chemical and electro-mechanical features can now be integrated into chip-scale devices for use in biosensing and physiological measurements. Some of these devices have made enormous contributions in the study of complex biochemical processes occurring at the molecular and cellular levels while others overcame the challenges of replicating various functions of human organs as implant systems. This thesis presents test data and analysis of two such systems. First, an ISFET based pH sensor is characterized for its performance in a continuous pH monitoring application. Many of the basic properties of ISFETs including I-V characteristics, pH sensitivity and more importantly, its long term drift behavior have been investigated. A new theory based on frequent switching of electric field across the gate oxide to decrease the rate of current drift has been successfully implemented with the help of an automated data acquisition and switching system. The system was further tested for a range of duty cycles in order to accurately determine the minimum length of time required to fully reset the drift. Second, a microfluidic based vestibular implant system was tested for its underlying characteristics as a light sensor. A computer controlled tilt platform was then implemented to further test its sensitivity to inclinations and thus it‟s more important role as a tilt sensor. The sensor operates through means of optoelectronics and relies on the signals generated from photodiode arrays as a result of light being incident on them. ISFET results show a significant drop in the overall drift and good linear characteristics. The drift was seen to reset at less than an hour. The photodiodes show ideal I-V comparison between photoconductive and photovoltaic modes of operation with maximum responsivity at 400nm and a shunt resistance of 394 MΩ. Additionally, post-processing of the tilt sensor to incorporate the sensing fluids is outlined. Based on several test and fabrication results, a possible method of sealing the open cavity of the chip using a UV curable epoxy has been discussed.
ContributorsMamun, Samiha (Author) / Christen, Jennifer Blain (Thesis advisor) / Goryll, Michael (Committee member) / Yu, Hongyu (Committee member) / Arizona State University (Publisher)
Created2011
Description
Pulse Density Modulation- (PDM-) based class-D amplifiers can reduce non-linearity and tonal content due to carrier signal in Pulse Width Modulation - (PWM-) based amplifiers. However, their low-voltage analog implementations also require a linear- loop filter and a quantizer. A PDM-based class-D audio amplifier using a frequency-domain quantization is presented in this paper. The digital-intensive frequency domain approach achieves high linearity under low-supply regimes. An analog comparator and a single-bit quantizer are replaced with a Current-Controlled Oscillator- (ICO-) based frequency discriminator. By using the ICO as a phase integrator, a third-order noise shaping is achieved using only two analog integrators. A single-loop, singlebit class-D audio amplifier is presented with an H-bridge switching power stage, which is designed and fabricated on a 0.18 um CMOS process, with 6 layers of metal achieving a total harmonic distortion plus noise (THD+N) of 0.065% and a peak power efficiency of 80% while driving a 4-ohms loudspeaker load. The amplifier can deliver the output power of 280 mW.
ContributorsLee, Junghan (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kiaei, Sayfe (Committee member) / Ozev, Sule (Committee member) / Song, Hongjiang (Committee member) / Arizona State University (Publisher)
Created2011
Description
Early-age cracks in fresh concrete occur mainly due to high rate of surface evaporation and restraint offered by the contracting solid phase. Available test methods that simulate severe drying conditions, however, were not originally designed to focus on evaporation and transport characteristics of the liquid-gas phases in a hydrating cementitious microstructure. Therefore, these tests lack accurate measurement of the drying rate and data interpretation based on the principles of transport properties is limited. A vacuum-based test method capable of simulating early-age cracks in 2-D cement paste is developed which continuously monitors the weight loss and changes to the surface characteristics. 2-D crack evolution is documented using time-lapse photography. Effects of sample size, w/c ratio, initial curing and fiber content are studied. In the subsequent analysis, the cement paste phase is considered as a porous medium and moisture transport is described based on surface mass transfer and internal moisture transport characteristics. Results indicate that drying occurs in two stages: constant drying rate period (stage I), followed by a falling drying rate period (stage II). Vapor diffusion in stage I and unsaturated flow within porous medium in stage II determine the overall rate of evaporation. The mass loss results are analyzed using diffusion-based models. Results show that moisture diffusivity in stage I is higher than its value in stage II by more than one order of magnitude. The drying model is used in conjunction with a shrinkage model to predict the development of capillary pressures. Similar approach is implemented in drying restrained ring specimens to predict 1-D crack width development. An analytical approach relates diffusion, shrinkage, creep, tensile and fracture properties to interpret the experimental data. Evaporation potential is introduced based on the boundary layer concept, mass transfer, and a driving force consisting of the concentration gradient. Effect of wind velocity is reflected on Reynolds number which affects the boundary layer on sample surface. This parameter along with Schmidt and Sherwood numbers are used for prediction of mass transfer coefficient. Concentration gradient is shown to be a strong function of temperature and relative humidity and used to predict the evaporation potential. Results of modeling efforts are compared with a variety of test results reported in the literature. Diffusivity data and results of 1-D and 2-D image analyses indicate significant effects of fibers on controlling early-age cracks. Presented models are capable of predicting evaporation rates and moisture flow through hydrating cement-based materials during early-age drying and shrinkage conditions.
ContributorsBakhshi, Mehdi (Author) / Mobasher, Barzin (Thesis advisor) / Rajan, Subramaniam D. (Committee member) / Zapata, Claudia E. (Committee member) / Arizona State University (Publisher)
Created2011