Matching Items (234)
Description
As the 3rd generation solar cell, quantum dot solar cells are expected to outperform the first 2 generations with higher efficiency and lower manufacture cost. Currently the main problems for QD cells are the low conversion efficiency and stability. This work is trying to improve the reliability as well as the device performance by inserting an interlayer between the metal cathode and the active layer. Titanium oxide and a novel nitrogen doped titanium oxide were compared and TiOxNy capped device shown a superior performance and stability to TiOx capped one. A unique light anneal effect on the interfacial layer was discovered first time and proved to be the trigger of the enhancement of both device reliability and efficiency. The efficiency was improved by 300% and the device can retain 73.1% of the efficiency with TiOxNy when normal device completely failed after kept for long time. Photoluminescence indicted an increased charge disassociation rate at TiOxNy interface. External quantum efficiency measurement also inferred a significant performance enhancement in TiOxNy capped device, which resulted in a higher photocurrent. X-ray photoelectron spectrometry was performed to explain the impact of light doping on optical band gap. Atomic force microscopy illustrated the effect of light anneal on quantum dot polymer surface. The particle size is increased and the surface composition is changed after irradiation. The mechanism for performance improvement via a TiOx based interlayer was discussed based on a trap filling model. Then Tunneling AFM was performed to further confirm the reliability of interlayer capped organic photovoltaic devices. As a powerful tool based on SPM technique, tunneling AFM was able to explain the reason for low efficiency in non-capped inverted organic photovoltaic devices. The local injection properties as well as the correspondent topography were compared in organic solar cells with or without TiOx interlayer. The current-voltage characteristics were also tested at a single interested point. A severe short-circuit was discovered in non capped devices and a slight reverse bias leakage current was also revealed in TiOx capped device though tunneling AFM results. The failure reason for low stability in normal devices was also discussed comparing to capped devices.
ContributorsYu, Jialin (Author) / Jabbour, Ghassan E. (Thesis advisor) / Alford, Terry L. (Thesis advisor) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2011
Description
Semiconductor nanowires are featured by their unique one-dimensional structure which makes them promising for small scale electronic and photonic device applications. Among them, III-V material nanowires are particularly outstanding due to their good electronic properties. In bulk, these materials reveal electron mobility much higher than conventional silicon based devices, for example at room temperature, InAs field effect transistor (FET) has electron mobility of 40,000 cm2/Vs more than 10 times of Si FET. This makes such materials promising for high speed nanowire FETs. With small bandgap, such as 0.354 eV for InAs and 1.52 eV for GaAs, it does not need high voltage to turn on such devices which leads to low power consumption devices. Another feature of direct bandgap allows their applications of optoelectronic devices such as avalanche photodiodes. However, there are challenges to face up. Due to their large surface to volume ratio, nanowire devices typically are strongly affected by the surface states. Although nanowires can be grown into single crystal structure, people observe crystal defects along the wires which can significantly affect the performance of devices. In this work, FETs made of two types of III-V nanowire, GaAs and InAs, are demonstrated. These nanowires are grown by catalyst-free MOCVD growth method. Vertically nanowires are transferred onto patterned substrates for coordinate calibration. Then electrodes are defined by e-beam lithography followed by deposition of contact metals. Prior to metal deposition, however, the substrates are dipped in ammonium hydroxide solution to remove native oxide layer formed on nanowire surface. Current vs. source-drain voltage with different gate bias are measured at room temperature. GaAs nanowire FETs show photo response while InAs nanowire FETs do not show that. Surface passivation is performed on GaAs FETs by using ammonium surfide solution. The best results on current increase is observed with around 20-30 minutes chemical treatment time. Gate response measurements are performed at room temperature, from which field effect mobility as high as 1490 cm2/Vs is extracted for InAs FETs. One major contributor for this is stacking faults defect existing along nanowires. For InAs FETs, thermal excitations observed from temperature dependent results which leads us to investigate potential barriers.
ContributorsLiang, Hanshuang (Author) / Yu, Hongbin (Thesis advisor) / Ferry, David (Committee member) / Tracy, Clarence (Committee member) / Arizona State University (Publisher)
Created2011
Description
A workload-aware low-power neuromorphic controller for dynamic power and thermal management in VLSI systems is presented. The neuromorphic controller predicts future workload and temperature values based on the past values and CPU performance counters and preemptively regulates supply voltage and frequency. System-level measurements from stateof-the-art commercial microprocessors are used to get workload, temperature and CPU performance counter values. The controller is designed and simulated using circuit-design and synthesis tools. At device-level, on-chip planar inductors suffer from low inductance occupying large chip area. On-chip inductors with integrated magnetic materials are designed, simulated and fabricated to explore performance-efficiency trade offs and explore potential applications such as resonant clocking and on-chip voltage regulation. A system level study is conducted to evaluate the effect of on-chip voltage regulator employing magnetic inductors as the output filter. It is concluded that neuromorphic power controller is beneficial for fine-grained per-core power management in conjunction with on-chip voltage regulators utilizing scaled magnetic inductors.
ContributorsSinha, Saurabh (Author) / Cao, Yu (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Yu, Hongbin (Committee member) / Christen, Jennifer B. (Committee member) / Arizona State University (Publisher)
Created2011
Description
The theme for this work is the development of fast numerical algorithms for sparse optimization as well as their applications in medical imaging and source localization using sensor array processing. Due to the recently proposed theory of Compressive Sensing (CS), the $\ell_1$ minimization problem attracts more attention for its ability to exploit sparsity. Traditional interior point methods encounter difficulties in computation for solving the CS applications. In the first part of this work, a fast algorithm based on the augmented Lagrangian method for solving the large-scale TV-$\ell_1$ regularized inverse problem is proposed. Specifically, by taking advantage of the separable structure, the original problem can be approximated via the sum of a series of simple functions with closed form solutions. A preconditioner for solving the block Toeplitz with Toeplitz block (BTTB) linear system is proposed to accelerate the computation. An in-depth discussion on the rate of convergence and the optimal parameter selection criteria is given. Numerical experiments are used to test the performance and the robustness of the proposed algorithm to a wide range of parameter values. Applications of the algorithm in magnetic resonance (MR) imaging and a comparison with other existing methods are included. The second part of this work is the application of the TV-$\ell_1$ model in source localization using sensor arrays. The array output is reformulated into a sparse waveform via an over-complete basis and study the $\ell_p$-norm properties in detecting the sparsity. An algorithm is proposed for minimizing a non-convex problem. According to the results of numerical experiments, the proposed algorithm with the aid of the $\ell_p$-norm can resolve closely distributed sources with higher accuracy than other existing methods.
ContributorsShen, Wei (Author) / Mittlemann, Hans D (Thesis advisor) / Renaut, Rosemary A. (Committee member) / Jackiewicz, Zdzislaw (Committee member) / Gelb, Anne (Committee member) / Ringhofer, Christian (Committee member) / Arizona State University (Publisher)
Created2011
Description
CMOS technology is expected to enter the 10nm regime for future integrated circuits (IC). Such aggressive scaling leads to vastly increased variability, posing a grand challenge to robust IC design. Variations in CMOS are often divided into two types: intrinsic variations and process-induced variations. Intrinsic variations are limited by fundamental physics. They are inherent to CMOS structure, considered as one of the ultimate barriers to the continual scaling of CMOS devices. In this work the three primary intrinsic variations sources are studied, including random dopant fluctuation (RDF), line-edge roughness (LER) and oxide thickness fluctuation (OTF). The research is focused on the modeling and simulation of those variations and their scaling trends. Besides the three variations, a time dependent variation source, Random Telegraph Noise (RTN) is also studied. Different from the other three variations, RTN does not contribute much to the total variation amount, but aggregate the worst case of Vth variations in CMOS. In this work a TCAD based simulation study on RTN is presented, and a new SPICE based simulation method for RTN is proposed for time domain circuit analysis. Process-induced variations arise from the imperfection in silicon fabrication, and vary from foundries to foundries. In this work the layout dependent Vth shift due to Rapid-Thermal Annealing (RTA) are investigated. In this work, we develop joint thermal/TCAD simulation and compact modeling tools to analyze performance variability under various layout pattern densities and RTA conditions. Moreover, we propose a suite of compact models that bridge the underlying RTA process with device parameter change for efficient design optimization.
ContributorsYe, Yun, Ph.D (Author) / Cao, Yu (Thesis advisor) / Yu, Hongbin (Committee member) / Song, Hongjiang (Committee member) / Clark, Lawrence (Committee member) / Arizona State University (Publisher)
Created2011
Description
The first part describes Metal Semiconductor Field Effect Transistor (MESFET) based fundamental analog building blocks designed and fabricated in a single poly, 3-layer metal digital CMOS technology utilizing fully depletion mode MESFET devices. DC characteristics were measured by varying the power supply from 2.5V to 5.5V. The measured DC transfer curves of amplifiers show good agreement with the simulated ones with extracted models from the same process. The accuracy of the current mirror showing inverse operation is within ±15% for the current from 0 to 1.5mA with the power supply from 2.5 to 5.5V. The second part presents a low-power image recognition system with a novel MESFET device fabricated on a CMOS substrate. An analog image recognition system with power consumption of 2.4mW/cell and a response time of 6µs is designed, fabricated and characterized. The experimental results verified the accuracy of the extracted SPICE model of SOS MESFETs. The response times of 4µs and 6µs for one by four and one by eight arrays, respectively, are achieved with the line recognition. Each core cell for both arrays consumes only 2.4mW. The last part presents a CMOS low-power transceiver in MICS band is presented. The LNA core has an integrated mixer in a folded configuration. The baseband strip consists of a pseudo differential MOS-C band-pass filter achieving demodulation of 150kHz-offset BFSK signals. The SRO is used in a wakeup RX for the wake-up signal reception. The all digital frequency-locked loop drives a class AB power amplifier in a transmitter. The sensitivity of -85dBm in the wakeup RX is achieved with the power consumption of 320µW and 400µW at the data rates of 100kb/s and 200kb/s from 1.8V, respectively. The sensitivities of -70dBm and -98dBm in the data-link RX are achieved with NF of 40dB and 11dB at the data rate of 100kb/s while consuming only 600µW and 1.5mW at 1.2V and 1.8V, respectively.
ContributorsKim, Sung (Author) / Bakkaloglu, Bertan (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Cao, Yu (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2011
Description
Semiconductor nanowires (NWs) are one dimensional materials and have size quantization effect when the diameter is sufficiently small. They can serve as optical wave guides along the length direction and contain optically active gain at the same time. Due to these unique properties, NWs are now very promising and extensively studied for nanoscale optoelectronic applications. A systematic and comprehensive optical and microstructural study of several important infrared semiconductor NWs is presented in this thesis, which includes InAs, PbS, InGaAs, erbium chloride silicate and erbium silicate. Micro-photoluminescence (PL) and transmission electron microscope (TEM) were utilized in conjunction to characterize the optical and microstructure of these wires. The focus of this thesis is on optical study of semiconductor NWs in the mid-infrared wavelengths. First, differently structured InAs NWs grown using various methods were characterized and compared. Three main PL peaks which are below, near and above InAs bandgap, respectively, were observed. The octadecylthiol self-assembled monolayer was employed to passivate the surface of InAs NWs to eliminate or reduce the effects of the surface states. The band-edge emission from wurtzite-structured NWs was completely recovered after passivatoin. The passivated NWs showed very good stability in air and under heat. In the second part, mid-infrared optical study was conducted on PbS wires of subwavelength diameter and lasing was demonstrated under optical pumping. The PbS wires were grown on Si substrate using chemical vapor deposition and have a rock-salt cubic structure. Single-mode lasing at the wavelength of ~3000-4000 nm was obtained from single as-grown PbS wire up to the temperature of 115 K. PL characterization was also utilized to demonstrate the highest crystallinity of the vertical arrays of InP and InGaAs/InP composition-graded heterostructure NWs made by a top-down fabrication method. TEM-related measurements were performed to study the crystal structures and elemental compositions of the Er-compound core-shell NWs. The core-shell NWs consist of an orthorhombic-structured erbium chloride silicate shell and a cubic-structured silicon core. These NWs provide unique Si-compatible materials with emission at 1530 nm for optical communications and solid state lasers.
ContributorsSun, Minghua (Author) / Ning, Cun-Zheng (Thesis advisor) / Yu, Hongbin (Committee member) / Carpenter, Ray W. (Committee member) / Johnson, Shane (Committee member) / Arizona State University (Publisher)
Created2011
Description
The past two decades have been monumental in the advancement of microchips designed for a diverse range of medical applications and bio-analysis. Owing to the remarkable progress in micro-fabrication technology, complex chemical and electro-mechanical features can now be integrated into chip-scale devices for use in biosensing and physiological measurements. Some of these devices have made enormous contributions in the study of complex biochemical processes occurring at the molecular and cellular levels while others overcame the challenges of replicating various functions of human organs as implant systems. This thesis presents test data and analysis of two such systems. First, an ISFET based pH sensor is characterized for its performance in a continuous pH monitoring application. Many of the basic properties of ISFETs including I-V characteristics, pH sensitivity and more importantly, its long term drift behavior have been investigated. A new theory based on frequent switching of electric field across the gate oxide to decrease the rate of current drift has been successfully implemented with the help of an automated data acquisition and switching system. The system was further tested for a range of duty cycles in order to accurately determine the minimum length of time required to fully reset the drift. Second, a microfluidic based vestibular implant system was tested for its underlying characteristics as a light sensor. A computer controlled tilt platform was then implemented to further test its sensitivity to inclinations and thus it‟s more important role as a tilt sensor. The sensor operates through means of optoelectronics and relies on the signals generated from photodiode arrays as a result of light being incident on them. ISFET results show a significant drop in the overall drift and good linear characteristics. The drift was seen to reset at less than an hour. The photodiodes show ideal I-V comparison between photoconductive and photovoltaic modes of operation with maximum responsivity at 400nm and a shunt resistance of 394 MΩ. Additionally, post-processing of the tilt sensor to incorporate the sensing fluids is outlined. Based on several test and fabrication results, a possible method of sealing the open cavity of the chip using a UV curable epoxy has been discussed.
ContributorsMamun, Samiha (Author) / Christen, Jennifer Blain (Thesis advisor) / Goryll, Michael (Committee member) / Yu, Hongyu (Committee member) / Arizona State University (Publisher)
Created2011
Description
Semiconductor devices are generally analyzed with relatively simple equations or with detailed computer simulations. Most text-books use these simple equations and show device diagrams that are frequently very simplified and occasionally incorrect. For example, the carrier densities near the pinch-off point in MOSFETs and JFETs and the minority carrier density in the base near the reverse-biased base-collector junction are frequently assumed to be zero or near zero. Also the channel thickness at the pinch-off point is often shown to approach zero. None of these assumptions can be correct. The research in thesis addresses these points. I simulated the carrier densities, potentials, electric fields etc. of MOSFETs, BJTs and JFETs at and near the pinch-off regions to determine exactly what happens there. I also simulated the behavior of the quasi-Fermi levels. For MOSFETs, the channel thickness expands slightly before the pinch-off point and then spreads out quickly in a triangular shape and the space-charge region under the channel actually shrinks as the potential increases from source to drain. For BJTs, with collector-base junction reverse biased, most minority carriers diffuse through the base from emitter to collector very fast, but the minority carrier concentration at the collector-base space-charge region is not zero. For JFETs, the boundaries of the space-charge region are difficult to determine, the channel does not disappear after pinch off, the shape of channel is always tapered, and the carrier concentration in the channel decreases progressively. After simulating traditional sized devices, I also simulated typical nano-scaled devices and show that they behave similarly to large devices. These simulation results provide a more complete understanding of device physics and device operation in those regions usually not addressed in semiconductor device physics books.
ContributorsYang, Xuan (Author) / Schroder, Dieter K. (Thesis advisor) / Vasileska, Dragica (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2011
Description
Obtaining local electrochemical (EC) information is extremely important for understanding basic surface reactions, and for many applications. Scanning electrochemical microscopy (SECM) can obtain local EC information by scanning a microelectrode across the surface. Although powerful, SECM is slow, the scanning microelectrode may perturb reaction and the measured signal decreases with the size of microelectrode. This thesis demonstrates a new imaging technique based on a principle that is completely different from the conventional EC detection technologies. The technique, referred to as plasmonic-based electrochemical imaging (PECI), images local EC current (both faradaic and non-faradaic) without using a scanning microelectrode. Because PECI response is an optical signal originated from surface plasmon resonance (SPR), PECI is fast and non-invasive and its signal is proportional to incident light intensity, thus does not decrease with the area of interest. A complete theory is developed in this thesis work to describe the relationship between EC current and PECI signal. EC current imaging at various fixed potentials and local cyclic voltammetry methods are developed and demonstrated with real samples. Fast imaging rate (up to 100,000 frames per second) with 0.2×3µm spatial resolution and 0.3 pA detection limit have been achieved. Several PECI applications have been developed to demonstrate the unique strengths of the new imaging technology. For example, trace particles in fingerprint is detected by PECI, a capability that cannot be achieved with the conventional EC technologies. Another example is PECI imaging of EC reaction and interfacial impedance of graphene of different thicknesses. In addition, local square wave voltammetry capability is demonstrated and applied to study local catalytic current of platinum nanoparticle microarray. This thesis also describes a related but different research project that develops a new method to measure surface charge densities of SPR sensor chips, and micro- and nano-particles. A third project of this thesis is to develop a method to expand the conventional SPR detection and imaging technology by including a waveguide mode. This innovation creates a sensitive detection of bulk index of refraction, which overcomes the limitation that the conventional SPR can probe only changes near the sensor surface within ~200 nm.
ContributorsShan, Xiaonan (Author) / Tao, Nongjian (Thesis advisor) / Chae, Junseok (Committee member) / Christen, Jennifer Blain (Committee member) / Hayes, Mark (Committee member) / Arizona State University (Publisher)
Created2011