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Description
A low temperature amorphous oxide thin film transistor (TFT) backplane technology for flexible organic light emitting diode (OLED) displays has been developed to create 4.1-in. diagonal backplanes. The critical steps in the evolution of the backplane process include the qualification and optimization of the low temperature (200 °C) metal oxide

A low temperature amorphous oxide thin film transistor (TFT) backplane technology for flexible organic light emitting diode (OLED) displays has been developed to create 4.1-in. diagonal backplanes. The critical steps in the evolution of the backplane process include the qualification and optimization of the low temperature (200 °C) metal oxide process, the stability of the devices under forward and reverse bias stress, the transfer of the process to flexible plastic substrates, and the fabrication of white organic light emitting diode (OLED) displays. Mixed oxide semiconductor thin film transistors (TFTs) on flexible plastic substrates typically suffer from performance and stability issues related to the maximum processing temperature limitation of the polymer. A novel device architecture based upon a dual active layer enables significant improvements in both the performance and stability. Devices are directly fabricated below 200 ºC on a polyethylene naphthalate (PEN) substrate using mixed metal oxides of either zinc indium oxide (ZIO) or indium gallium zinc oxide (IGZO) as the active semiconductor. The dual active layer architecture allows for adjustment in the saturation mobility and threshold voltage stability without the requirement of high temperature annealing, which is not compatible with flexible colorless plastic substrates like PEN. The device performance and stability is strongly dependent upon the composition of the mixed metal oxide; this dependency provides a simple route to improving the threshold voltage stability and drive performance. By switching from a single to a dual active layer, the saturation mobility increases from 1.2 cm2/V-s to 18.0 cm2/V-s, while the rate of the threshold voltage shift decreases by an order of magnitude. This approach could assist in enabling the production of devices on flexible substrates using amorphous oxide semiconductors.
ContributorsMarrs, Michael (Author) / Raupp, Gregory B (Thesis advisor) / Vogt, Bryan D (Thesis advisor) / Allee, David R. (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Temporary bonding-debonding of flexible plastic substrates to rigid carriers may facilitate effective substrate handling by automated tools for manufacture of flexible microelectronics. The primary challenges in implementing practical temporary bond-debond technology originate from the stress that is developed during high temperature processing predominately through thermal-mechanical property mismatches between carrier, adhesive

Temporary bonding-debonding of flexible plastic substrates to rigid carriers may facilitate effective substrate handling by automated tools for manufacture of flexible microelectronics. The primary challenges in implementing practical temporary bond-debond technology originate from the stress that is developed during high temperature processing predominately through thermal-mechanical property mismatches between carrier, adhesive and substrate. These stresses are relaxed through bowing of the bonded system (substrate-adhesive-carrier), which causes wafer handling problems, or through delamination of substrate from rigid carrier. Another challenge inherent to flexible plastic substrates and linked to stress is their dimensional instability, which may manifest itself in irreversible deformation upon heating and cooling cycles. Dimensional stability is critical to ensure precise registration of different layers during photolithography. The global objective of this work is to determine comprehensive experimental characterization and develop underlying fundamental engineering concept that could enable widespread adoption and scale-up of temporary bonding processing protocols for flexible microelectronics manufacturing. A series of carriers with different coefficient of thermal expansion (CTE), modulus and thickness were investigated to correlate the thermo-mechanical properties of carrier with deformation behavior of bonded systems. The observed magnitude of system bow scaled with properties of carriers according to well-established Stoney's equation. In addition, rheology of adhesive impacted the deformation of bonded system. In particular, distortion-bowing behavior correlated directly with the relative loss factor of adhesive and flexible plastic substrate. Higher loss factor of adhesive compared to that of substrate allowed the stress to be relaxed with less bow, but led to significantly greater dimensional distortion. Conversely, lower loss factor of adhesive allowed less distortion but led to larger wafer bow. A finite element model using ANSYS was developed to predict the trend in bow-distortion of bonded systems as a function of the viscoelastic properties of adhesive. Inclusion of the viscoelasticity of flexible plastic substrate itself was critical to achieving good agreement between simulation and experiment. Simulation results showed that there is a limited range within which tuning the rheology of adhesive can control the stress-distortion. Therefore, this model can aid in design of new adhesive formulations compatible with different processing requirements of various flexible microelectronics applications.
ContributorsHaq, Jesmin (Author) / Raupp, Gregory B (Thesis advisor) / Vogt, Bryan D (Thesis advisor) / Dai, Lenore (Committee member) / Loy, Douglas (Committee member) / Li, Jian (Committee member) / Arizona State University (Publisher)
Created2011
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Description
A low temperature amorphous oxide thin film transistor (TFT) and amorphous silicon PIN diode backplane technology for large area flexible digital x-ray detectors has been developed to create 7.9-in. diagonal backplanes. The critical steps in the evolution of the backplane process include the qualification and optimization of the low temperature

A low temperature amorphous oxide thin film transistor (TFT) and amorphous silicon PIN diode backplane technology for large area flexible digital x-ray detectors has been developed to create 7.9-in. diagonal backplanes. The critical steps in the evolution of the backplane process include the qualification and optimization of the low temperature (200 °C) metal oxide TFT and a-Si PIN photodiode process, the stability of the devices under forward and reverse bias stress, the transfer of the process to flexible plastic substrates, and the fabrication and assembly of the flexible detectors.

Mixed oxide semiconductor TFTs on flexible plastic substrates suffer from performance and stability issues related to the maximum processing temperature limitation of the polymer. A novel device architecture based upon a dual active layer improves both the performance and stability. Devices are directly fabricated below 200 ºC on a polyethylene naphthalate (PEN) substrate using mixed metal oxides of either zinc indium oxide (ZIO) or indium gallium zinc oxide (IGZO) as the active semiconductor. The dual active layer architecture allows for adjustment to the saturation mobility and threshold voltage stability without the requirement of high temperature annealing, which is not compatible with flexible plastic substrates like PEN. The device performance and stability is strongly dependent upon the composition of the mixed metal oxide; this dependency provides a simple route to improving the threshold voltage stability and drive performance. By switching from a single to a dual active layer, the saturation mobility increases from 1.2 cm2/V-s to 18.0 cm2/V-s, while the rate of the threshold voltage shift decreases by an order of magnitude. This approach could assist in enabling the production of devices on flexible substrates using amorphous oxide semiconductors.

Low temperature (200°C) processed amorphous silicon photodiodes were developed successfully by balancing the tradeoffs between low temperature and low stress (less than -70 MPa compressive) and device performance. Devices with a dark current of less than 1.0 pA/mm2 and a quantum efficiency of 68% have been demonstrated. Alternative processing techniques, such as pixelating the PIN diode and using organic photodiodes have also been explored for applications where extreme flexibility is desired.
ContributorsMarrs, Michael (Author) / Raupp, Gregory B (Thesis advisor) / Allee, David R. (Committee member) / Dai, Lenore L (Committee member) / Forzani, Erica S (Committee member) / Bawolek, Edward J (Committee member) / Arizona State University (Publisher)
Created2016
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Description
The rheological properties at liquid-liquid interfaces are important in many industrial processes such as manufacturing foods, pharmaceuticals, cosmetics, and petroleum products. This dissertation focuses on the study of linear viscoelastic properties at liquid-liquid interfaces by tracking the thermal motion of particles confined at the interfaces. The technique of interfacial microrheology

The rheological properties at liquid-liquid interfaces are important in many industrial processes such as manufacturing foods, pharmaceuticals, cosmetics, and petroleum products. This dissertation focuses on the study of linear viscoelastic properties at liquid-liquid interfaces by tracking the thermal motion of particles confined at the interfaces. The technique of interfacial microrheology is first developed using one- and two-particle tracking, respectively. In one-particle interfacial microrheology, the rheological response at the interface is measured from the motion of individual particles. One-particle interfacial microrheology at polydimethylsiloxane (PDMS) oil-water interfaces depends strongly on the surface chemistry of different tracer particles. In contrast, by tracking the correlated motion of particle pairs, two-particle interfacial microrheology significantly minimizes the effects from tracer particle surface chemistry and particle size. Two-particle interfacial microrheology is further applied to study the linear viscoelastic properties of immiscible polymer-polymer interfaces. The interfacial loss and storage moduli at PDMS-polyethylene glycol (PEG) interfaces are measured over a wide frequency range. The zero-shear interfacial viscosity, estimated from the Cross model, falls between the bulk viscosities of two individual polymers. Surprisingly, the interfacial relaxation time is observed to be an order of magnitude larger than that of the PDMS bulk polymers. To explore the fundamental basis of interfacial nanorheology, molecular dynamics (MD) simulations are employed to investigate the nanoparticle dynamics. The diffusion of single nanoparticles in pure water and low-viscosity PDMS oils is reasonably consistent with the prediction by the Stokes-Einstein equation. To demonstrate the potential of nanorheology based on the motion of nanoparticles, the shear moduli and viscosities of the bulk phases and interfaces are calculated from single-nanoparticle tracking. Finally, the competitive influences of nanoparticles and surfactants on other interfacial properties, such as interfacial thickness and interfacial tension are also studied by MD simulations.
ContributorsSong, Yanmei (Author) / Dai, Lenore L (Thesis advisor) / Jiang, Hanqing (Committee member) / Lin, Jerry Y S (Committee member) / Raupp, Gregory B (Committee member) / Sierks, Michael R (Committee member) / Arizona State University (Publisher)
Created2011