Matching Items (294)
Description
Dietary self-monitoring has been shown to be a predictor of weight loss success and is a prevalent part of behavioral weight control programs. As more weight loss applications have become available on smartphones, this feasibility study investigated whether the use of a smartphone application, or a smartphone memo feature would improve dietary self-monitoring over the traditional paper-and-pencil method. The study also looked at whether the difference in methods would affect weight loss. Forty-seven adults (BMI 25 to 40 kg/m2) completed an 8-week study focused on tracking the difference in adherence to a self-monitoring protocol and subsequent weight loss. Participants owning iPhones (n=17) used the 'Lose It' application (AP) for diet and exercise tracking and were compared to smartphone participants who recorded dietary intake using a memo (ME) feature (n=15) on their phone and participants using the traditional paper-and-pencil (PA) method (n=15). There was no significant difference in completion rates between groups with an overall completion rate of 85.5%. The overall mean adherence to self-monitoring for the 8-week period was better in the AP group than the PA group (p = .024). No significant difference was found between the AP group and ME group (p = .148), or the ME group and the PA group (p = .457). Weight loss for the 8 week study was significant for all groups (p = .028). There was no significant difference in weight loss between groups. Number of days recorded regardless of group assignment showed a weak correlation to weight loss success (p = .068). Smartphone owners seeking to lose weight should be encouraged by the potential success associated with dietary tracking using a smartphone app as opposed to the traditional paper-and-pencil method.
ContributorsCunningham, Barbara (Author) / Wharton, Christopher (Christopher Mack), 1977- (Thesis advisor) / Johnston, Carol (Committee member) / Hall, Richard (Committee member) / Arizona State University (Publisher)
Created2012
Description
Process variations have become increasingly important for scaled technologies starting at 45nm. The increased variations are primarily due to random dopant fluctuations, line-edge roughness and oxide thickness fluctuation. These variations greatly impact all aspects of circuit performance and pose a grand challenge to future robust IC design. To improve robustness, efficient methodology is required that considers effect of variations in the design flow. Analyzing timing variability of complex circuits with HSPICE simulations is very time consuming. This thesis proposes an analytical model to predict variability in CMOS circuits that is quick and accurate. There are several analytical models to estimate nominal delay performance but very little work has been done to accurately model delay variability. The proposed model is comprehensive and estimates nominal delay and variability as a function of transistor width, load capacitance and transition time. First, models are developed for library gates and the accuracy of the models is verified with HSPICE simulations for 45nm and 32nm technology nodes. The difference between predicted and simulated σ/μ for the library gates is less than 1%. Next, the accuracy of the model for nominal delay is verified for larger circuits including ISCAS'85 benchmark circuits. The model predicted results are within 4% error of HSPICE simulated results and take a small fraction of the time, for 45nm technology. Delay variability is analyzed for various paths and it is observed that non-critical paths can become critical because of Vth variation. Variability on shortest paths show that rate of hold violations increase enormously with increasing Vth variation.
ContributorsGummalla, Samatha (Author) / Chakrabarti, Chaitali (Thesis advisor) / Cao, Yu (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
Description
Nut consumption, specifically almonds, have been shown to help maintain weight and influence disease risk factors in adult populations. Limited studies have been conducted examining the effect of a small dose of almonds on energy intake and body weight. The objective of this study was to determine the influence of pre-meal almond consumption on energy intake and weight in overweight and obese adults. In this study included 21, overweight or obese, participants who were considered healthy or had a controlled disease state. This 8-week parallel arm study, participants were randomized to consume an isocaloric amount of almonds, (1 oz) serving, or two (2 oz) cheese stick serving, 30 minutes before the dinner meal, 5 times per week. Anthropometric measurements including weight, waist circumference, and body fat percentage were recorded at baseline, week 1, 4, and 8. Measurement of energy intake was self-reported for two consecutive days at week 1, 4 and 8 using the ASA24 automated dietary program. The energy intake after 8 weeks of almond consumption was not significantly different when compared to the control group (p=0.965). In addition, body weight was not significantly reduced after 8 weeks of the almond intervention (p=0.562). Other parameters measured in this 8-week trial did not differ between the intervention and the control group. These data presented are underpowered and therefore inconclusive on the effects that 1 oz of almonds, in the diet, 5 per week has on energy intake and bodyweight.
ContributorsMcBride, Lindsey (Author) / Johnston, Carol (Thesis advisor) / Swan, Pamela (Committee member) / Mayol-Kreiser, Sandra (Committee member) / Arizona State University (Publisher)
Created2011
Description
ABSTRACT Epidemiological studies have suggested a link between nut consumption and weight. The possible effects of regular nut consumption as a method of weight loss has shown minimal results with 2-3 servings of nut products per day. This 8 week study sought to investigate the effect of more modest nut consumption (1 oz./day, 5 days/week) on dietary compensation in healthy overweight individuals. Overweight and obese participants (n = 28) were recruited from the local community and were randomly assigned to either almond (NUT) or control (CON) group in this randomized, parallel-arm study. Subjects were instructed to eat their respective foods 30 minutes before the dinner meal. 24 hour diet recalls were completed pre-trial and at study weeks 1, 4 and 8. Self-reported satiety data were completed at study weeks 1, 4, and 8. Attrition was unexpectedly high, with 13 participants completing 24 dietary recall data through study week 8. High attrition limited statistical analyses. Results suggested a lack of effect for time or interaction for satiety data (within groups p = 0.997, between groups p = 0.367). Homogeneity of of inter-correlations could not be tested for 24-hour recall data as there were fewer than 2 nonsingular cell covariance matrices. In conclusion, this study was unable to prove or disprove the effectiveness of almonds to induce dietary compensation.
ContributorsJahns, Marshall (Author) / Johnston, Carol (Thesis advisor) / Hall, Richard (Committee member) / Wharton, Christopher (Christopher Mack), 1977- (Committee member) / Arizona State University (Publisher)
Created2011
Description
Current sensing ability is one of the most desirable features of contemporary current or voltage mode controlled DC-DC converters. Current sensing can be used for over load protection, multi-stage converter load balancing, current-mode control, multi-phase converter current-sharing, load independent control, power efficiency improvement etc. There are handful existing approaches for current sensing such as external resistor sensing, triode mode current mirroring, observer sensing, Hall-Effect sensors, transformers, DC Resistance (DCR) sensing, Gm-C filter sensing etc. However, each method has one or more issues that prevent them from being successfully applied in DC-DC converter, e.g. low accuracy, discontinuous sensing nature, high sensitivity to switching noise, high cost, requirement of known external power filter components, bulky size, etc. In this dissertation, an offset-independent inductor Built-In Self Test (BIST) architecture is proposed which is able to measure the inductor inductance and DCR. The measured DCR enables the proposed continuous, lossless, average current sensing scheme. A digital Voltage Mode Control (VMC) DC-DC buck converter with the inductor BIST and current sensing architecture is designed, fabricated, and experimentally tested. The average measurement errors for inductance, DCR and current sensing are 2.1%, 3.6%, and 1.5% respectively. For the 3.5mm by 3.5mm die area, inductor BIST and current sensing circuits including related pins only consume 5.2% of the die area. BIST mode draws 40mA current for a maximum time period of 200us upon start-up and the continuous current sensing consumes about 400uA quiescent current. This buck converter utilizes an adaptive compensator. It could update compensator internally so that the overall system has a proper loop response for large range inductance and load current. Next, a digital Average Current Mode Control (ACMC) DC-DC buck converter with the proposed average current sensing circuits is designed and tested. To reduce chip area and power consumption, a 9 bits hybrid Digital Pulse Width Modulator (DPWM) which uses a Mixed-mode DLL (MDLL) is also proposed. The DC-DC converter has a maximum of 12V input, 1-11 V output range, and a maximum of 3W output power. The maximum error of one least significant bit (LSB) delay of the proposed DPWM is less than 1%.
ContributorsLiu, Tao (Author) / Bakkaloglu, Bertan (Thesis advisor) / Ozev, Sule (Committee member) / Vermeire, Bert (Committee member) / Cao, Yu (Committee member) / Arizona State University (Publisher)
Created2011
Description
A workload-aware low-power neuromorphic controller for dynamic power and thermal management in VLSI systems is presented. The neuromorphic controller predicts future workload and temperature values based on the past values and CPU performance counters and preemptively regulates supply voltage and frequency. System-level measurements from stateof-the-art commercial microprocessors are used to get workload, temperature and CPU performance counter values. The controller is designed and simulated using circuit-design and synthesis tools. At device-level, on-chip planar inductors suffer from low inductance occupying large chip area. On-chip inductors with integrated magnetic materials are designed, simulated and fabricated to explore performance-efficiency trade offs and explore potential applications such as resonant clocking and on-chip voltage regulation. A system level study is conducted to evaluate the effect of on-chip voltage regulator employing magnetic inductors as the output filter. It is concluded that neuromorphic power controller is beneficial for fine-grained per-core power management in conjunction with on-chip voltage regulators utilizing scaled magnetic inductors.
ContributorsSinha, Saurabh (Author) / Cao, Yu (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Yu, Hongbin (Committee member) / Christen, Jennifer B. (Committee member) / Arizona State University (Publisher)
Created2011
Description
ABSTRACT This study evaluated the LoseIt Smart Phone app by Fit Now Inc. for nutritional quality among users during an 8 week behavioral modification weight loss protocol. All participants owned smart phones and were cluster randomized to either a control group using paper and pencil record keeping, a memo group using a memo function on their smart phones, or the LoseIt app group which was composed of the participants who owned iPhones. Thirty one participants completed the study protocol: 10 participants from the LoseIt app group, 10 participants from the memo group, and 11 participants from the paper and pencil group. Food records were analyzed using Food Processor by ESHA and the nutritional quality was scored using the Healthy Eating Index - 2005 (HEI-2005). Scores were compared using One-Way ANOVA with no significant changes in any category across all groups. Non-parametric statistics were then used to determine changes between combined memo and paper and pencil groups and the LoseIt app group as the memo and paper and pencil group received live counseling at biweekly intervals and the LoseIt group did not. No significant difference was found in HEI scores across all categories, however a trend was noted for total HEI score with higher scores among the memo and paper and pencil group participants p=0.091. Conclusion, no significant difference was detected between users of the smart phone app LoseIt and memo and paper and pencil groups. More research is needed to determine the impact of in-person counseling versus user feedback provided with the LoseIt smart phone app.
ContributorsCowan, David Kevin (Author) / Johnston, Carol (Thesis advisor) / Wharton, Christopher (Christopher Mack), 1977- (Committee member) / Mayol-Kreiser, Sandra (Committee member) / Arizona State University (Publisher)
Created2011
Description
The theme for this work is the development of fast numerical algorithms for sparse optimization as well as their applications in medical imaging and source localization using sensor array processing. Due to the recently proposed theory of Compressive Sensing (CS), the $\ell_1$ minimization problem attracts more attention for its ability to exploit sparsity. Traditional interior point methods encounter difficulties in computation for solving the CS applications. In the first part of this work, a fast algorithm based on the augmented Lagrangian method for solving the large-scale TV-$\ell_1$ regularized inverse problem is proposed. Specifically, by taking advantage of the separable structure, the original problem can be approximated via the sum of a series of simple functions with closed form solutions. A preconditioner for solving the block Toeplitz with Toeplitz block (BTTB) linear system is proposed to accelerate the computation. An in-depth discussion on the rate of convergence and the optimal parameter selection criteria is given. Numerical experiments are used to test the performance and the robustness of the proposed algorithm to a wide range of parameter values. Applications of the algorithm in magnetic resonance (MR) imaging and a comparison with other existing methods are included. The second part of this work is the application of the TV-$\ell_1$ model in source localization using sensor arrays. The array output is reformulated into a sparse waveform via an over-complete basis and study the $\ell_p$-norm properties in detecting the sparsity. An algorithm is proposed for minimizing a non-convex problem. According to the results of numerical experiments, the proposed algorithm with the aid of the $\ell_p$-norm can resolve closely distributed sources with higher accuracy than other existing methods.
ContributorsShen, Wei (Author) / Mittlemann, Hans D (Thesis advisor) / Renaut, Rosemary A. (Committee member) / Jackiewicz, Zdzislaw (Committee member) / Gelb, Anne (Committee member) / Ringhofer, Christian (Committee member) / Arizona State University (Publisher)
Created2011
Description
CMOS technology is expected to enter the 10nm regime for future integrated circuits (IC). Such aggressive scaling leads to vastly increased variability, posing a grand challenge to robust IC design. Variations in CMOS are often divided into two types: intrinsic variations and process-induced variations. Intrinsic variations are limited by fundamental physics. They are inherent to CMOS structure, considered as one of the ultimate barriers to the continual scaling of CMOS devices. In this work the three primary intrinsic variations sources are studied, including random dopant fluctuation (RDF), line-edge roughness (LER) and oxide thickness fluctuation (OTF). The research is focused on the modeling and simulation of those variations and their scaling trends. Besides the three variations, a time dependent variation source, Random Telegraph Noise (RTN) is also studied. Different from the other three variations, RTN does not contribute much to the total variation amount, but aggregate the worst case of Vth variations in CMOS. In this work a TCAD based simulation study on RTN is presented, and a new SPICE based simulation method for RTN is proposed for time domain circuit analysis. Process-induced variations arise from the imperfection in silicon fabrication, and vary from foundries to foundries. In this work the layout dependent Vth shift due to Rapid-Thermal Annealing (RTA) are investigated. In this work, we develop joint thermal/TCAD simulation and compact modeling tools to analyze performance variability under various layout pattern densities and RTA conditions. Moreover, we propose a suite of compact models that bridge the underlying RTA process with device parameter change for efficient design optimization.
ContributorsYe, Yun, Ph.D (Author) / Cao, Yu (Thesis advisor) / Yu, Hongbin (Committee member) / Song, Hongjiang (Committee member) / Clark, Lawrence (Committee member) / Arizona State University (Publisher)
Created2011
Description
Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are important reliability issues impacting analog circuit performance and lifetime. Compact reliability models and efficient simulation methods are essential for circuit level reliability prediction. This work proposes a set of compact models of NBTI and CHC effects for analog and mixed-signal circuit, and a direct prediction method which is different from conventional simulation methods. This method is applied in circuit benchmarks and evaluated. This work helps with improving efficiency and accuracy of circuit aging prediction.
ContributorsZheng, Rui (Author) / Cao, Yu (Thesis advisor) / Yu, Hongyu (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011