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Polar Hydration is a company whose mission is to combat the risk of dehydration in cold climates and inspire the adventurer with all of us. Through ASU’s Founders Lab and a partnership with NASA, we set out to take NASA patented technology and develop a business plan through gauging public interest via surveys and interviews, and implementing a marketing strategy based on those results. Our product consists of a freeze-resistant hydration pack which uses insulation and electronics to actively heat its water contents and prevent freezing. With outdoor activities, the colder the weather the higher the risk of dehydration. This is due to the intake of colder dryer air as well as it being harder to recognize that you are losing liquids through sweat as it is in warmer climates. In winter sports such as skiing and snowboarding as well as colder conditions for hiking and hunting, this can become a huge problem as water is not readily available. That’s why, at Polar Hydration, we took NASA patented technology to design our freeze-resistant hydration pack. It’s designed like most other hydration packs, consisting of a backpack with a plastic bladder holding water and straw to drink from, but with additional layers of insulation and electronics to prevent water from freezing. With this, we will combat dehydration and inspire the adventurer within all of us.
Recent advancements in machine learning methods have allowed companies to develop advanced computer vision aided production lines that take advantage of the raw and labeled data captured by high-definition cameras mounted at vantage points in their factory floor. We experiment with two different methods of developing one such system to automatically track key components on a production line. By tracking the state of these key components using object detection we can accurately determine and report production line metrics like part arrival and start/stop times for key factory processes. We began by collecting and labeling raw image data from the cameras overlooking the factory floor. Using that data we trained two dedicated object detection models. Our training utilized transfer learning to start from a Faster R-CNN ResNet model trained on Microsoft’s COCO dataset. The first model we developed is a binary classifier that detects the state of a single object while the second model is a multiclass classifier that detects the state of two distinct objects on the factory floor. Both models achieved over 95% classification and localization accuracy on our test datasets. Having two additional classes did not affect the classification or localization accuracy of the multiclass model compared to the binary model.
Partnering with a local Great Hearts Academy, we decided to look into why kids tend to not enjoy learning math. Prior to this project, we reflected on our individual experiences with math. One of us found it to be easy and thoroughly enjoyed it throughout school, while the other struggled to understand math and never enjoyed learning the subject. We wanted to look into why that could be. Was it just our teacher? Was it our curriculum? Or was it something deeper? In this project, we explore existing research behind teaching math, as well as interview teachers and students to get their perspective. Our findings showed us that self efficacy and math abilities go hand in hand. We also learned that a growth mindset is essential as students develop problem solving skills. Finally, using our findings, we suggested ways in which teachers and students can make learning math more enjoyable.
In this thesis, I discuss the development of a novel physical design flow introducing standard-cell neurons for ASIC design. Standard-cell neurons are implemented on silicon as a circuit that realizes a threshold function. Each cell contains flash transistors, the threshold voltages of which correspond to the weights of the threshold function. Since the threshold voltages are programmed after fabrication, any sequential logic containing a standard-cell neuron is a logical black box upon delivery to the foundry. Additionally, previous research has shown significant reductions in delay, power, and area with the utilization of these flash transistor (FTL) cells. This paper aims to reinforce this prior research by demonstrating the first automatically synthesized, placed, and routed secure RISC-V core.