This thesis proposes hardware and software security enhancements to the robotic explorer of a capstone team, in collaboration with the NASA Psyche Mission Student Collaborations program. The NASA Psyche Mission, launching in 2022 and reaching the metallic asteroid of the same name in 2026, will explore from orbit what is hypothesized to be remnant core material of an early planet, potentially providing key insights to planet formation. Following this initial mission, it is possible there would be scientists and engineers interested in proposing a mission to land an explorer on the surface of Psyche to further document various properties of the asteroid. As a proposal for a second mission, an interdisciplinary engineering and science capstone team at Arizona State University designed and constructed a robotic explorer for the hypothesized surfaces of Psyche, capable of semi-autonomously navigating simulated surfaces to collect scientific data from onboard sensors. A critical component of this explorer is the command and data handling subsystem, and as such, the security of this system, though outside the scope of the capstone project, remains a crucial consideration. This thesis proposes the pairing of Trusted Platform Module (TPM) technology for increased hardware security and the implementation of SELinux (Security Enhanced Linux) for increased software security for Earth-based testing as well as space-ready missions.
Radiation hardening of electronic devices is generally necessary when designing for the space environment. Non-volatile memory technologies are of particular concern when designing for the mitigation of radiation effects. Among other radiation effects, single-event upsets can create bit flips in non-volatile memories, leading to data corruption. In this paper, a Verilog implementation of a Reed-Solomon error-correcting code is considered for its ability to mitigate the effects of single-event upsets on non-volatile memories. This implementation is compared with the simpler procedure of using triple modular redundancy.