Matching Items (643)
Description
A fully automated logic design methodology for radiation hardened by design (RHBD) high speed logic using fine grained triple modular redundancy (TMR) is presented. The hardening techniques used in the cell library are described and evaluated, with a focus on both layout techniques that mitigate total ionizing dose (TID) and latchup issues and flip-flop designs that mitigate single event transient (SET) and single event upset (SEU) issues. The base TMR self-correcting master-slave flip-flop is described and compared to more traditional hardening techniques. Additional refinements are presented, including testability features that disable the self-correction to allow detection of manufacturing defects. The circuit approach is validated for hardness using both heavy ion and proton broad beam testing. For synthesis and auto place and route, the methodology and circuits leverage commercial logic design automation tools. These tools are glued together with custom CAD tools designed to enable easy conversion of standard single redundant hardware description language (HDL) files into hardened TMR circuitry. The flow allows hardening of any synthesizable logic at clock frequencies comparable to unhardened designs and supports standard low-power techniques, e.g. clock gating and supply voltage scaling.
ContributorsHindman, Nathan (Author) / Clark, Lawrence T (Thesis advisor) / Holbert, Keith E. (Committee member) / Barnaby, Hugh (Committee member) / Allee, David (Committee member) / Arizona State University (Publisher)
Created2012
Description
Analysing and measuring of biological or biochemical processes are of utmost importance for medical, biological and biotechnological applications. Point of care diagnostic system, composing of biosensors, have promising applications for providing cheap, accurate and portable diagnosis. Owing to these expanding medical applications and advances made by semiconductor industry biosensors have seen a tremendous growth in the past few decades. Also emergence of microfluidics and non-invasive biosensing applications are other marker propellers. Analyzing biological signals using transducers is difficult due to the challenges in interfacing an electronic system to the biological environment. Detection limit, detection time, dynamic range, specificity to the analyte, sensitivity and reliability of these devices are some of the challenges in developing and integrating these devices. Significant amount of research in the field of biosensors has been focused on improving the design, fabrication process and their integration with microfluidics to address these challenges. This work presents new techniques, design and systems to improve the interface between the electronic system and the biological environment. This dissertation uses CMOS circuit design to improve the reliability of these devices. Also this work addresses the challenges in designing the electronic system used for processing the output of the transducer, which converts biological signal into electronic signal.
ContributorsShah, Sahil S (Author) / Christen, Jennifer B (Thesis advisor) / Allee, David (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2014
Description
Due to diminishing availability of 3He, which is the critical component of neutron detecting proportional counters, large area flexible arrays are being considered as a potential replacement for neutron detection. A large area flexible array, utilizing semiconductors for both charged particle detection and pixel readout, ensures a large detection surface area in a light weight rugged form. Such a neutron detector could be suitable for deployment at ports of entry. The specific approach used in this research, uses a neutron converter layer which captures incident thermal neutrons, and then emits ionizing charged particles. These ionizing particles cause electron-hole pair generation within a single pixel's integrated sensing diode. The resulting charge is then amplified via a low-noise amplifier. This document begins by discussing the current state of the art in neutron detection and the associated challenges. Then, for the purpose of resolving some of these issues, recent design and modeling efforts towards developing an improved neutron detection system are described. Also presented is a low-noise active pixel sensor (APS) design capable of being implemented in low temperature indium gallium zinc oxide (InGaZnO) or amorphous silicon (a-Si:H) thin film transistor process compatible with plastic substrates. The low gain and limited scalability of this design are improved upon by implementing a new multi-stage self-resetting APS. For each APS design, successful radiation measurements are also presented using PiN diodes for charged particle detection. Next, detection array readout methodologies are modeled and analyzed, and use of a matched filter readout circuit is described as well. Finally, this document discusses detection diode integration with the designed TFT-based APSs.
ContributorsKunnen, George (Author) / Allee, David (Thesis advisor) / Garrity, Douglas (Committee member) / Gnade, Bruce (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2014
Description
This work explores how flexible electronics and display technology can be applied to develop new biomedical devices for medical, biological, and life science applications. It demonstrates how new biomedical devices can be manufactured by only modifying or personalizing the upper layers of a conventional thin film transistor (TFT) display process. This personalization was applied first to develop and demonstrate the world's largest flexible digital x-ray detector for medical and industrial imaging, and the world's first flexible ISFET pH biosensor using TFT technology. These new, flexible, digital x-ray detectors are more durable than conventional glass substrate x-ray detectors, and also can conform to the surface of the object being imaged. The new flexible ISFET pH biosensors are >10X less expensive to manufacture than comparable CMOS-based ISFETs and provide a sensing area that is orders of magnitude larger than CMOS-based ISFETs. This allows for easier integration with area intensive chemical and biological recognition material as well as allow for a larger number of unique recognition sites for low cost multiple disease and pathogen detection.
The flexible x-ray detector technology was then extended to demonstrate the viability of a new technique to seamlessly combine multiple smaller flexible x-ray detectors into a single very large, ultimately human sized, composite x-ray detector for new medical imaging applications such as single-exposure, low-dose, full-body digital radiography. Also explored, is a new approach to increase the sensitivity of digital x-ray detectors by selectively disabling rows in the active matrix array that are not part of the imaged region. It was then shown how high-resolution, flexible, organic light-emitting diode display (OLED) technology can be used to selectively stimulate and/or silence small groups of neurons on the cortical surface or within the deep brain as a potential new tool to diagnose and treat, as well as understand, neurological diseases and conditions. This work also explored the viability of a new miniaturized high sensitivity fluorescence measurement-based lab-on-a-chip optical biosensor using OLED display and a-Si:H PiN photodiode active matrix array technology for point-of-care diagnosis of multiple disease or pathogen biomarkers in a low cost disposable configuration.
The flexible x-ray detector technology was then extended to demonstrate the viability of a new technique to seamlessly combine multiple smaller flexible x-ray detectors into a single very large, ultimately human sized, composite x-ray detector for new medical imaging applications such as single-exposure, low-dose, full-body digital radiography. Also explored, is a new approach to increase the sensitivity of digital x-ray detectors by selectively disabling rows in the active matrix array that are not part of the imaged region. It was then shown how high-resolution, flexible, organic light-emitting diode display (OLED) technology can be used to selectively stimulate and/or silence small groups of neurons on the cortical surface or within the deep brain as a potential new tool to diagnose and treat, as well as understand, neurological diseases and conditions. This work also explored the viability of a new miniaturized high sensitivity fluorescence measurement-based lab-on-a-chip optical biosensor using OLED display and a-Si:H PiN photodiode active matrix array technology for point-of-care diagnosis of multiple disease or pathogen biomarkers in a low cost disposable configuration.
ContributorsSmith, Joseph T. (Author) / Allee, David (Thesis advisor) / Goryll, Michael (Committee member) / Kozicki, Michael (Committee member) / Blain Christen, Jennifer (Committee member) / Couture, Aaron (Committee member) / Arizona State University (Publisher)
Created2014
Description
The space environment comprises cosmic ray particles, heavy ions and high energy electrons and protons. Microelectronic circuits used in space applications such as satellites and space stations are prone to upsets induced by these particles. With transistor dimensions shrinking due to continued scaling, terrestrial integrated circuits are also increasingly susceptible to radiation upsets. Hence radiation hardening is a requirement for microelectronic circuits used in both space and terrestrial applications.
This work begins by exploring the different radiation hardened flip-flops that have been proposed in the literature and classifies them based on the different hardening techniques.
A reduced power delay element for the temporal hardening of sequential digital circuits is presented. The delay element single event transient tolerance is demonstrated by simulations using it in a radiation hardened by design master slave flip-flop (FF). Using the proposed delay element saves up to 25% total FF power at 50% activity factor. The delay element is used in the implementation of an 8-bit, 8051 designed in the TSMC 130 nm bulk CMOS.
A single impinging ionizing radiation particle is increasingly likely to upset multiple circuit nodes and produce logic transients that contribute to the soft error rate in most modern scaled process technologies. The design of flip-flops is made more difficult with increasing multi-node charge collection, which requires that charge storage and other sensitive nodes be separated so that one impinging radiation particle does not affect redundant nodes simultaneously. We describe a correct-by-construction design methodology to determine a-priori which hardened FF nodes must be separated, as well as a general interleaving scheme to achieve this separation. We apply the methodology to radiation hardened flip-flops and demonstrate optimal circuit physical organization for protection against multi-node charge collection.
Finally, the methodology is utilized to provide critical node separation for a new hardened flip-flop design that reduces the power and area by 31% and 35% respectively compared to a temporal FF with similar hardness. The hardness is verified and compared to other published designs via the proposed systematic simulation approach that comprehends multiple node charge collection and tests resiliency to upsets at all internal and input nodes. Comparison of the hardness, as measured by estimated upset cross-section, is made to other published designs. Additionally, the importance of specific circuit design aspects to achieving hardness is shown.
This work begins by exploring the different radiation hardened flip-flops that have been proposed in the literature and classifies them based on the different hardening techniques.
A reduced power delay element for the temporal hardening of sequential digital circuits is presented. The delay element single event transient tolerance is demonstrated by simulations using it in a radiation hardened by design master slave flip-flop (FF). Using the proposed delay element saves up to 25% total FF power at 50% activity factor. The delay element is used in the implementation of an 8-bit, 8051 designed in the TSMC 130 nm bulk CMOS.
A single impinging ionizing radiation particle is increasingly likely to upset multiple circuit nodes and produce logic transients that contribute to the soft error rate in most modern scaled process technologies. The design of flip-flops is made more difficult with increasing multi-node charge collection, which requires that charge storage and other sensitive nodes be separated so that one impinging radiation particle does not affect redundant nodes simultaneously. We describe a correct-by-construction design methodology to determine a-priori which hardened FF nodes must be separated, as well as a general interleaving scheme to achieve this separation. We apply the methodology to radiation hardened flip-flops and demonstrate optimal circuit physical organization for protection against multi-node charge collection.
Finally, the methodology is utilized to provide critical node separation for a new hardened flip-flop design that reduces the power and area by 31% and 35% respectively compared to a temporal FF with similar hardness. The hardness is verified and compared to other published designs via the proposed systematic simulation approach that comprehends multiple node charge collection and tests resiliency to upsets at all internal and input nodes. Comparison of the hardness, as measured by estimated upset cross-section, is made to other published designs. Additionally, the importance of specific circuit design aspects to achieving hardness is shown.
ContributorsShambhulingaiah, Sandeep (Author) / Clark, Lawrence (Thesis advisor) / Holbert, Keith E. (Committee member) / Seo, Jae sun (Committee member) / Allee, David (Committee member) / Arizona State University (Publisher)
Created2015
Description
The geometric growth in the integrated circuit technology due to transistor scaling also with system-on-chip design strategy, the complexity of the integrated circuit has increased manifold. Short time to market with high reliability and performance is one of the most competitive challenges. Both custom and ASIC design methodologies have evolved over the time to cope with this but the high manual labor in custom and statistic design in ASIC are still causes of concern. This work proposes a new circuit design strategy that focuses mostly on arrayed structures like TLB, RF, Cache, IPCAM etc. that reduces the manual effort to a great extent and also makes the design regular, repetitive still achieving high performance. The method proposes making the complete design custom schematic but using the standard cells. This requires adding some custom cells to the already exhaustive library to optimize the design for performance. Once schematic is finalized, the designer places these standard cells in a spreadsheet, placing closely the cells in the critical paths. A Perl script then generates Cadence Encounter compatible placement file. The design is then routed in Encounter. Since designer is the best judge of the circuit architecture, placement by the designer will allow achieve most optimal design. Several designs like IPCAM, issue logic, TLB, RF and Cache designs were carried out and the performance were compared against the fully custom and ASIC flow. The TLB, RF and Cache were the part of the HEMES microprocessor.
ContributorsMaurya, Satendra Kumar (Author) / Clark, Lawrence T (Thesis advisor) / Holbert, Keith E. (Committee member) / Vrudhula, Sarma (Committee member) / Allee, David (Committee member) / Arizona State University (Publisher)
Created2012
Description
The current trend of interconnected devices, or the internet of things (IOT) has led to the popularization of single board computers (SBC). This is primarily due to their form-factor and low price. This has led to unique networks of devices that can have unstable network connections and minimal processing power. Many parallel program- ming libraries are intended for use in high performance computing (HPC) clusters. Unlike the IOT environment described, HPC clusters will in general look to obtain very consistent network speeds and topologies. There are a significant number of software choices that make up what is referred to as the HPC stack or parallel processing stack. My thesis focused on building an HPC stack that would run on the SCB computer name the Raspberry Pi. The intention in making this Raspberry Pi cluster is to research performance of MPI implementations in an IOT environment, which had an impact on the design choices of the cluster. This thesis is a compilation of my research efforts in creating this cluster as well as an evaluation of the software that was chosen to create the parallel processing stack.
ContributorsO'Meara, Braedon Richard (Author) / Meuth, Ryan (Thesis director) / Dasgupta, Partha (Committee member) / Computer Science and Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2018-05
Description
This thesis discusses three recent optimization problems that seek to reduce disease spread on arbitrary graphs by deleting edges, and it discusses three approximation algorithms developed for these problems. Important definitions are presented including the Linear Threshold and Triggering Set models and the set function properties of submodularity and monotonicity. Also, important results regarding the Linear Threshold model and computation of the influence function are presented along with proof sketches. The three main problems are formally presented, and NP-hardness results along with proof sketches are presented where applicable. The first problem seeks to reduce spread of infection over the Linear Threshold process by making use of an efficient tree data structure. The second problem seeks to reduce the spread of infection over the Linear Threshold process while preserving the PageRank distribution of the input graph. The third problem seeks to minimize the spectral radius of the input graph. The algorithms designed for these problems are described in writing and with pseudocode, and their approximation bounds are stated along with time complexities. Discussion of these algorithms considers how these algorithms could see real-world use. Challenges and the ways in which these algorithms do or do not overcome them are noted. Two related works, one which presents an edge-deletion disease spread reduction problem over a deterministic threshold process and the other which considers a graph modification problem aimed at minimizing worst-case disease spread, are compared with the three main works to provide interesting perspectives. Furthermore, a new problem is proposed that could avoid some issues faced by the three main problems described, and directions for future work are suggested.
ContributorsStanton, Andrew Warren (Author) / Richa, Andrea (Thesis director) / Czygrinow, Andrzej (Committee member) / Computer Science and Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2018-05
Description
In the last few years, billion-dollar companies like Yahoo and Equifax have had data breaches causing millions of people’s personal information to be leaked online. Other billion-dollar companies like Google and Facebook have gotten in trouble for abusing people’s personal information for financial gain as well. In this new age of technology where everything is being digitalized and stored online, people all over the world are concerned about what is happening to their personal information and how they can trust it is being kept safe. This paper describes, first, the importance of protecting user data, second, one easy tool that companies and developers can use to help ensure that their user’s information (credit card information specifically) is kept safe, how to implement that tool, and finally, future work and research that needs to be done. The solution I propose is a software tool that will keep credit card data secured. It is only a small step towards achieving a completely secure data anonymized system, but when implemented correctly, it can reduce the risk of credit card data from being exposed to the public. The software tool is a script that can scan every viable file in any given system, server, or other file-structured Linux system and detect if there any visible credit card numbers that should be hidden.
ContributorsPappas, Alexander (Author) / Zhao, Ming (Thesis director) / Kuznetsov, Eugene (Committee member) / Computer Science and Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2020-05
Description
Political polarization is the coalescence of political parties -- and the individuals of which parties are composed -- around opposing ends of the ideological spectrum. Political parties in the United States have always been divided, however, in recent years this division has only intensified. Recently, polarization has also wound its way to the Supreme Court and the nomination processes of justices to the Court. This paper examines how prevalent polarization in the Supreme Court nomination process has become by looking specifically at the failed nomination of Judge Merrick Garland and the confirmations of now-Justices Neil Gorsuch and Brett Kavanaugh. This is accomplished by comparing the ideologies and qualifications of the three most recent nominees to those of previous nominees, as well as analysing the ideological composition of the Senate at the times of the individual nominations.
ContributorsJoss, Jacob (Author) / Hoekstra, Valerie (Thesis director) / Critchlow, Donald (Committee member) / Computer Science and Engineering Program (Contributor) / School of Politics and Global Studies (Contributor) / Barrett, The Honors College (Contributor)
Created2020-05