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- Genre: Doctoral Dissertation
- Creators: Shen, Wei
Description
One of the challenges in future semiconductor device design is excessive rise of power dissipation and device temperatures. With the introduction of new geometrically confined device structures like SOI, FinFET, nanowires and continuous incorporation of new materials with poor thermal conductivities in the device active region, the device thermal problem is expected to become more challenging in coming years. This work examines the degradation in the ON-current due to self-heating effects in 10 nm channel length silicon nanowire transistors. As part of this dissertation, a 3D electrothermal device simulator is developed that self-consistently solves electron Boltzmann transport equation with 3D energy balance equations for both the acoustic and the optical phonons. This device simulator predicts temperature variations and other physical and electrical parameters across the device for different bias and boundary conditions. The simulation results show insignificant current degradation for nanowire self-heating because of pronounced velocity overshoot effect. In addition, this work explores the role of various placement of the source and drain contacts on the magnitude of self-heating effect in nanowire transistors. This work also investigates the simultaneous influence of self-heating and random charge effects on the magnitude of the ON current for both positively and negatively charged single charges. This research suggests that the self-heating effects affect the ON-current in two ways: (1) by lowering the barrier at the source end of the channel, thus allowing more carriers to go through, and (2) via the screening effect of the Coulomb potential. To examine the effect of temperature dependent thermal conductivity of thin silicon films in nanowire transistors, Selberherr's thermal conductivity model is used in the device simulator. The simulations results show larger current degradation because of self-heating due to decreased thermal conductivity . Crystallographic direction dependent thermal conductivity is also included in the device simulations. Larger degradation is observed in the current along the [100] direction when compared to the [110] direction which is in agreement with the values for the thermal conductivity tensor provided by Zlatan Aksamija.
ContributorsHossain, Arif (Author) / Vasileska, Dragica (Thesis advisor) / Ahmed, Shaikh (Committee member) / Bakkaloglu, Bertan (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
The theme for this work is the development of fast numerical algorithms for sparse optimization as well as their applications in medical imaging and source localization using sensor array processing. Due to the recently proposed theory of Compressive Sensing (CS), the $\ell_1$ minimization problem attracts more attention for its ability to exploit sparsity. Traditional interior point methods encounter difficulties in computation for solving the CS applications. In the first part of this work, a fast algorithm based on the augmented Lagrangian method for solving the large-scale TV-$\ell_1$ regularized inverse problem is proposed. Specifically, by taking advantage of the separable structure, the original problem can be approximated via the sum of a series of simple functions with closed form solutions. A preconditioner for solving the block Toeplitz with Toeplitz block (BTTB) linear system is proposed to accelerate the computation. An in-depth discussion on the rate of convergence and the optimal parameter selection criteria is given. Numerical experiments are used to test the performance and the robustness of the proposed algorithm to a wide range of parameter values. Applications of the algorithm in magnetic resonance (MR) imaging and a comparison with other existing methods are included. The second part of this work is the application of the TV-$\ell_1$ model in source localization using sensor arrays. The array output is reformulated into a sparse waveform via an over-complete basis and study the $\ell_p$-norm properties in detecting the sparsity. An algorithm is proposed for minimizing a non-convex problem. According to the results of numerical experiments, the proposed algorithm with the aid of the $\ell_p$-norm can resolve closely distributed sources with higher accuracy than other existing methods.
ContributorsShen, Wei (Author) / Mittlemann, Hans D (Thesis advisor) / Renaut, Rosemary A. (Committee member) / Jackiewicz, Zdzislaw (Committee member) / Gelb, Anne (Committee member) / Ringhofer, Christian (Committee member) / Arizona State University (Publisher)
Created2011
Description
In very small electronic devices the alternate capture and emission of carriers at an individual defect site located at the interface of Si:SiO2 of a MOSFET generates discrete switching in the device conductance referred to as a random telegraph signal (RTS) or random telegraph noise (RTN). In this research work, the integration of random defects positioned across the channel at the Si:SiO2 interface from source end to the drain end in the presence of different random dopant distributions are used to conduct Ensemble Monte-Carlo ( EMC ) based numerical simulation of key device performance metrics for 45 nm gate length MOSFET device. The two main performance parameters that affect RTS based reliability measurements are percentage change in threshold voltage and percentage change in drain current fluctuation in the saturation region. It has been observed as a result of the simulation that changes in both and values moderately decrease as the defect position is gradually moved from source end to the drain end of the channel. Precise analytical device physics based model needs to be developed to explain and assess the EMC simulation based higher VT fluctuations as experienced for trap positions at the source side. A new analytical model has been developed that simultaneously takes account of dopant number variations in the channel and depletion region underneath and carrier mobility fluctuations resulting from fluctuations in surface potential barriers. Comparisons of this new analytical model along with existing analytical models are shown to correlate with 3D EMC simulation based model for assessment of VT fluctuations percentage induced by a single interface trap. With scaling of devices beyond 32 nm node, halo doping at the source and drain are routinely incorporated to combat the threshold voltage roll-off that takes place with effective channel length reduction. As a final study on this regard, 3D EMC simulation method based computations of threshold voltage fluctuations have been performed for varying source and drain halo pocket length to illustrate the threshold voltage fluctuations related reliability problems that have been aggravated by trap positions near the source at the interface compared to conventional 45 nm MOSFET.
ContributorsAshraf, Nabil Shovon (Author) / Vasileska, Dragica (Thesis advisor) / Schroder, Dieter (Committee member) / Goodnick, Stephen (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2011
Description
As existing solar cell technologies come closer to their theoretical efficiency, new concepts that overcome the Shockley-Queisser limit and exceed 50% efficiency need to be explored. New materials systems are often investigated to achieve this, but the use of existing solar cell materials in advanced concept approaches is compelling for multiple theoretical and practical reasons. In order to include advanced concept approaches into existing materials, nanostructures are used as they alter the physical properties of these materials. To explore advanced nanostructured concepts with existing materials such as III-V alloys, silicon and/or silicon/germanium and associated alloys, fundamental aspects of using these materials in advanced concept nanostructured solar cells must be understood. Chief among these is the determination and predication of optimum electronic band structures, including effects such as strain on the band structure, and the material's opto-electronic properties. Nanostructures have a large impact on band structure and electronic properties through quantum confinement. An additional large effect is the change in band structure due to elastic strain caused by lattice mismatch between the barrier and nanostructured (usually self-assembled QDs) materials. To develop a material model for advanced concept solar cells, the band structure is calculated for single as well as vertical array of quantum dots with the realistic effects such as strain, associated with the epitaxial growth of these materials. The results show significant effect of strain in band structure. More importantly, the band diagram of a vertical array of QDs with different spacer layer thickness show significant change in band offsets, especially for heavy and light hole valence bands when the spacer layer thickness is reduced. These results, ultimately, have significance to develop a material model for advance concept solar cells that use the QD nanostructures as absorbing medium. The band structure calculations serve as the basis for multiple other calculations. Chief among these is that the model allows the design of a practical QD advanced concept solar cell, which meets key design criteria such as a negligible valence band offset between the QD/barrier materials and close to optimum band gaps, resulting in the predication of optimum material combinations.
ContributorsDahal, Som Nath (Author) / Honsberg, Christiana (Thesis advisor) / Goodnick, Stephen (Committee member) / Roedel, Ronald (Committee member) / Ponce, Fernando (Committee member) / Arizona State University (Publisher)
Created2011
Description
A primary motivation of research in photovoltaic technology is to obtain higher efficiency photovoltaic devices at reduced cost of production so that solar electricity can be cost competitive. The majority of photovoltaic technologies are based on p-n junction, with efficiency potential being much lower than the thermodynamic limits of individual technologies and thereby providing substantial scope for further improvements in efficiency. The thesis explores photovoltaic devices using new physical processes that rely on thin layers and are capable of attaining the thermodynamic limit of photovoltaic technology. Silicon heterostructure is one of the candidate technologies in which thin films induce a minority carrier collecting junction in silicon and the devices can achieve efficiency close to the thermodynamic limits of silicon technology. The thesis proposes and experimentally establishes a new theory explaining the operation of silicon heterostructure solar cells. The theory will assist in identifying the optimum properties of thin film materials for silicon heterostructure and help in design and characterization of the devices, along with aiding in developing new devices based on this technology. The efficiency potential of silicon heterostructure is constrained by the thermodynamic limit (31%) of single junction solar cell and is considerably lower than the limit of photovoltaic conversion (~ 80 %). A further improvement in photovoltaic conversion efficiency is possible by implementing a multiple quasi-fermi level system (MQFL). A MQFL allows the absorption of sub band gap photons with current being extracted at a higher band-gap, thereby allowing to overcome the efficiency limit of single junction devices. A MQFL can be realized either by thin epitaxial layers of alternating higher and lower band gap material with nearly lattice matched (quantum well) or highly lattice mismatched (quantum dot) structure. The thesis identifies the material combination for quantum well structure and calculates the absorption coefficient of a MQFl based on quantum well. GaAsSb (barrier)/InAs(dot) was identified as a candidate material for MQFL using quantum dot. The thesis explains the growth mechanism of GaAsSb and the optimization of GaAsSb and GaAs heterointerface.
ContributorsGhosha, Kuṇāla (Author) / Bowden, Stuart (Thesis advisor) / Honsberg, Christiana (Thesis advisor) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
High electron mobility transistors (HEMTs) based on Group III-nitride heterostructures have been characterized by advanced electron microscopy methods including off-axis electron holography, nanoscale chemical analysis, and electrical measurements, as well as other techniques. The dissertation was organized primarily into three topical areas: (1) characterization of near-gate defects in electrically stressed AlGaN/GaN HEMTs, (2) microstructural and chemical analysis of the gate/buffer interface of AlN/GaN HEMTs, and (3) studies of the impact of laser-liftoff processing on AlGaN/GaN HEMTs. The electrical performance of stressed AlGaN/GaN HEMTs was measured and the devices binned accordingly. Source- and drain-side degraded, undegraded, and unstressed devices were then prepared via focused-ion-beam milling for examination. Defects in the near-gate region were identified and their correlation to electrical measurements analyzed. Increased gate leakage after electrical stressing is typically attributed to "V"-shaped defects at the gate edge. However, strong evidence was found for gate metal diffusion into the barrier layer as another contributing factor. AlN/GaN HEMTs grown on sapphire substrates were found to have high electrical performance which is attributed to the AlN barrier layer, and robust ohmic and gate contact processes. TEM analysis identified oxidation at the gate metal/AlN buffer layer interface. This thin a-oxide gate insulator was further characterized by energy-dispersive x-ray spectroscopy and energy-filtered TEM. Attributed to this previously unidentified layer, high reverse gate bias up to −30 V was demonstrated and drain-induced gate leakage was suppressed to values of less than 10−6 A/mm. In addition, extrinsic gm and ft * LG were improved to the highest reported values for AlN/GaN HEMTs fabricated on sapphire substrates. Laser-liftoff (LLO) processing was used to separate the active layers from sapphire substrates for several GaN-based HEMT devices, including AlGaN/GaN and InAlN/GaN heterostructures. Warpage of the LLO samples resulted from relaxation of the as-grown strain and strain arising from dielectric and metal depositions, and this strain was quantified by both Newton's rings and Raman spectroscopy methods. TEM analysis demonstrated that the LLO processing produced no detrimental effects on the quality of the epitaxial layers. TEM micrographs showed no evidence of either damage to the ~2 μm GaN epilayer generated threading defects.
ContributorsJohnson, Michael R. (Author) / Mccartney, Martha R (Thesis advisor) / Smith, David J. (Committee member) / Goodnick, Stephen (Committee member) / Shumway, John (Committee member) / Chen, Tingyong (Committee member) / Arizona State University (Publisher)
Created2012
Description
ABSTRACT An Ensemble Monte Carlo (EMC) computer code has been developed to simulate, semi-classically, spin-dependent electron transport in quasi two-dimensional (2D) III-V semiconductors. The code accounts for both three-dimensional (3D) and quasi-2D transport, utilizing either 3D or 2D scattering mechanisms, as appropriate. Phonon, alloy, interface roughness, and impurity scattering mechanisms are included, accounting for the Pauli Exclusion Principle via a rejection algorithm. The 2D carrier states are calculated via a self-consistent 1D Schrödinger-3D-Poisson solution in which the charge distribution of the 2D carriers in the quantization direction is taken as the spatial distribution of the squared envelope functions within the Hartree approximation. The wavefunctions, subband energies, and 2D scattering rates are updated periodically by solving a series of 1D Schrödinger wave equations (SWE) over the real-space domain of the device at fixed time intervals. The electrostatic potential is updated by periodically solving the 3D Poisson equation. Spin-polarized transport is modeled via a spin density-matrix formalism that accounts for D'yakanov-Perel (DP) scattering. Also, the code allows for the easy inclusion of additional scattering mechanisms and structural modifications to devices. As an application of the simulator, the current voltage characteristics of an InGaAs/InAlAs HEMT are simulated, corresponding to nanoscale III-V HEMTs currently being fabricated by Intel Corporation. The comparative effects of various scattering parameters, material properties and structural attributes are investigated and compared with experiments where reasonable agreement is obtained. The spatial evolution of spin-polarized carriers in prototypical Spin Field Effect Transistor (SpinFET) devices is then simulated. Studies of the spin coherence times in quasi-2D structures is first investigated and compared to experimental results. It is found that the simulated spin coherence times for GaAs structures are in reasonable agreement with experiment. The SpinFET structure studied is a scaled-down version of the InGaAs/InAlAs HEMT discussed in this work, in which spin-polarized carriers are injected at the source, and the coherence length is studied as a function of gate voltage via the Rashba effect.
ContributorsTierney, Brian David (Author) / Goodnick, Stephen (Thesis advisor) / Ferry, David (Committee member) / Akis, Richard (Committee member) / Saraniti, Marco (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2011
Description本文对中国制药企业并购溢价影响因素进行了研究，提出了对制药企业并购非常重要的两个新的影响因素：可生产药品批文和在研新药批文。本文以2011年1月—2019年12月间我国制药行业上市公司并购事件为样本，对在研新药和可生产药品批文的价值从四个维度度量：是否有在研新药和可生产药品批文；在研新药数量及可生产药品批文数量；根据创新药和仿制药两个类别进行细分；标的企业所拥有的在研新药和可生产药品批文的市场价值。论文发现药品批文对企业并购溢价的影响不是很显著。进一步的，本文探究了药品批文对主并企业的对被并购公司的估值的影响。实证结果表明，我国制药企业在并购估值时确实会考虑到在研新药和可生产药品批文的价值。本文还发现对于可生产药品来说，相对创新药，被并购公司持有的仿制药批文影响更显著。而对于在研新药来说，主并企业更看重在研的创新药，在研仿制药对并购估值的影响不大。最后，本文选取了两个代表性案例进一步分析和探讨药品批文对企业并购的影响。
ContributorsYe, Tao (Author) / Shen, Wei (Thesis advisor) / Chang, Chun (Thesis advisor) / Jiang, Zhan (Committee member) / Gu, Bin (Committee member) / Arizona State University (Publisher)
Created2022
Description汽车行业属于国家支柱型产业，创造了高额的产值，增加了就业岗位。随着汽车生产行业竞争日趋激烈的趋势影响，汽车经销商在未来会出现明显的分化，并且逐步向头部集中。基于这样的行业背景，本项研究开展汽车经销商整体经营和盈利能力等方面的详细深入分析，即系统整合汽车经销商业务运营层面和财务层面数据，结合统计研究方法，对经销商盈利能力进行系统且详实归因分析，从而试别驱动盈利能力的关键业务要素。其研究成果能够完善对行业发展规律和经营模式系统性理解，从而进一步指导该领域的相关业务实践，提高经销商整体经营业绩。本课题通过四个阶段来开展经销商整体经营与盈利归因的相关研究。首先，本课题梳理了中国汽车消费行业发展的历史，同时阐述样本期内（2018-2020年）国内宏观经济和汽车消费市场的特征进行，并介绍X品牌汽车经销商的地理分布、资质和业绩评级体系、自身经营特征以及汽车生产商对经销商扶持政策等方面。在第二阶段，本课题聚焦研究假设、模型与方法，通过对X品牌汽车经销商的业务结构和运营管理开展分析，并逐步识别影响经销商盈利的关键指标变量，并提出研究假设和相关模型（即时间序列模型和面板回归模型）。在第三阶段，本课题首先开展经销商相关信息整体性统计分析，获得关键业务指标在样本期内动态特征，并结合时间序列回归模型探讨各项业务指标对经销商整体盈利能力的影响程度。在第四阶段，本课题采用（个体）固定效应的面板回归模型来研究不同组别（控制）条件下经销商盈利能力的影响因素以及其盈利能力对这些因素的敏感程度，从而更深入和全面地揭示影响经销商盈利能力的潜在因素。
基于上述四阶段的研究结果，本研究进一步就提升经销商盈利能力展开讨论，并提出相应对策。本课题相关结论仅从X品牌汽车经销商经营和财务数据进行定性和定量分析获得，但衷心希望本研究的成果能够对汽车经销商改善经营业务方面能起到实践上的借鉴和指导意义。
ContributorsPan, Guangxiong (Author) / Shen, Wei (Thesis advisor) / Wu, Fei (Thesis advisor) / Zhu, Qigui (Committee member) / Arizona State University (Publisher)
Created2022
Description
Interdigitated back contact (IBC) solar cells have achieved the highest single junction silicon wafer-based solar cell power conversion efficiencies reported to date. This thesis is about the fabrication of a high-efficiency silicon heterojunction IBC solar cell for potential use as the bottom cell for a 3-terminal lattice-matched dilute-nitride Ga (In)NP(As)/Si monolithic tandem solar cell. An effective fabrication process has been developed and the process challenges related to open circuit voltage (Voc), series resistance (Rs), and fill factor (FF) are experimentally analyzed. While wet etching, the sample lost the initial passivation, and by changing the etchant solution and passivation process, the voltage at maximum power recovered to an initial value of over 710 mV before metallization. The factors reducing the series resistance loss in IBC cells were also studied. One of these factors was the Indium Tin Oxide (ITO) sputtering parameters, which impact the conductivity of the ITO layer and transport across the a-Si:H/ITO interface. For the standard recipe, the chamber pressure was 3.5 mTorr with no oxygen partial pressure, and the thickness of the ITO layer in contact with the a-Si:H layers, was optimized to 150 nm. The patterning method for the metal contacts and final annealing also change the contact resistance of the base and emitter stack layers. The final annealing step is necessary to recover the sputtering damage; however, the higher the annealing time the higher the final IBC series resistance. The best efficiency achieved was 19.3% (Jsc = 37 mA/cm2, Voc = 691 mV, FF = 71.7%) on 200 µm thick 1-15 Ω-cm n-type CZ C-Si with a designated area of 4 cm2.
ContributorsMoeini Rizi, Mansoure (Author) / Goodnick, Stephen (Thesis advisor) / Honsberg, Christina (Committee member) / Goryll, Michael (Committee member) / Smith, David (Committee member) / Bowden, Stuart (Committee member) / Arizona State University (Publisher)
Created2022