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- Creators: Song, Hongjiang
- Creators: Tepedelenlioğlu, Cihan
Description
LTE-Advanced networks employ random access based on preambles
transmitted according to multi-channel slotted Aloha principles. The
random access is controlled through a limit W on the number of
transmission attempts and a timeout period for uniform backoff after a
collision. We model the LTE-Advanced random access system by formulating
the equilibrium condition for the ratio of the number of requests
successful within the permitted number of transmission attempts to those
successful in one attempt. We prove that for W≤8 there is only one
equilibrium operating point and for W≥9 there are three operating
points if the request load ρ is between load boundaries ρ1
and ρ2. We analytically identify these load boundaries as well as
the corresponding system operating points. We analyze the throughput and
delay of successful requests at the operating points and validate the
analytical results through simulations. Further, we generalize the
results using a steady-state equilibrium based approach and develop
models for single-channel and multi-channel systems, incorporating the
barring probability PB. Ultimately, we identify the de-correlating
effect of parameters O, PB, and Tomax and introduce the
Poissonization effect due to the backlogged requests in a slot. We
investigate the impact of Poissonization on different traffic and
conclude this thesis.
transmitted according to multi-channel slotted Aloha principles. The
random access is controlled through a limit W on the number of
transmission attempts and a timeout period for uniform backoff after a
collision. We model the LTE-Advanced random access system by formulating
the equilibrium condition for the ratio of the number of requests
successful within the permitted number of transmission attempts to those
successful in one attempt. We prove that for W≤8 there is only one
equilibrium operating point and for W≥9 there are three operating
points if the request load ρ is between load boundaries ρ1
and ρ2. We analytically identify these load boundaries as well as
the corresponding system operating points. We analyze the throughput and
delay of successful requests at the operating points and validate the
analytical results through simulations. Further, we generalize the
results using a steady-state equilibrium based approach and develop
models for single-channel and multi-channel systems, incorporating the
barring probability PB. Ultimately, we identify the de-correlating
effect of parameters O, PB, and Tomax and introduce the
Poissonization effect due to the backlogged requests in a slot. We
investigate the impact of Poissonization on different traffic and
conclude this thesis.
ContributorsTyagi, Revak (Author) / Reisslein, Martin (Thesis advisor) / Tepedelenlioğlu, Cihan (Committee member) / McGarry, Michael (Committee member) / Zhang, Yanchao (Committee member) / Arizona State University (Publisher)
Created2014
Description
As wireless communication enters smartphone era, more complicated communication technologies are being used to transmit higher data rate. Power amplifier (PA) has to work in back-off region, while this inevitably reduces battery life for cellphones. Various techniques have been reported to increase PA efficiency, such as envelope elimination and restoration (EER) and envelope tracking (ET). However, state of the art ET supply modulators failed to address high efficiency, high slew rate, and accurate tracking concurrently.
In this dissertation, a linear-switch mode hybrid ET supply modulator utilizing adaptive biasing and gain enhanced current mirror operational transconductance amplifier (OTA) with class-AB output stage in parallel with a switching regulator is presented. In comparison to a conventional OTA design with similar quiescent current consumption, proposed approach improves positive and negative slew rate from 50 V/µs to 93.4 V/µs and -87 V/µs to -152.5 V/µs respectively, dc gain from 45 dB to 67 dB while consuming same amount of quiescent current. The proposed hybrid supply modulator achieves 83% peak efficiency, power added efficiency (PAE) of 42.3% at 26.2 dBm for a 10 MHz 7.24 dB peak-to-average power ratio (PAPR) LTE signal and improves PAE by 8% at 6 dB back off from 26.2 dBm power amplifier (PA) output power with respect to fixed supply. With a 10 MHz 7.24 dB PAPR QPSK LTE signal the ET PA system achieves adjacent channel leakage ratio (ACLR) of -37.7 dBc and error vector magnitude (EVM) of 4.5% at 26.2 dBm PA output power, while with a 10 MHz 8.15 dB PAPR 64QAM LTE signal the ET PA system achieves ACLR of -35.6 dBc and EVM of 6% at 26 dBm PA output power without digital pre-distortion (DPD). The proposed supply modulator core circuit occupies 1.1 mm2 die area, and is fabricated in a 0.18 µm CMOS technology.
In this dissertation, a linear-switch mode hybrid ET supply modulator utilizing adaptive biasing and gain enhanced current mirror operational transconductance amplifier (OTA) with class-AB output stage in parallel with a switching regulator is presented. In comparison to a conventional OTA design with similar quiescent current consumption, proposed approach improves positive and negative slew rate from 50 V/µs to 93.4 V/µs and -87 V/µs to -152.5 V/µs respectively, dc gain from 45 dB to 67 dB while consuming same amount of quiescent current. The proposed hybrid supply modulator achieves 83% peak efficiency, power added efficiency (PAE) of 42.3% at 26.2 dBm for a 10 MHz 7.24 dB peak-to-average power ratio (PAPR) LTE signal and improves PAE by 8% at 6 dB back off from 26.2 dBm power amplifier (PA) output power with respect to fixed supply. With a 10 MHz 7.24 dB PAPR QPSK LTE signal the ET PA system achieves adjacent channel leakage ratio (ACLR) of -37.7 dBc and error vector magnitude (EVM) of 4.5% at 26.2 dBm PA output power, while with a 10 MHz 8.15 dB PAPR 64QAM LTE signal the ET PA system achieves ACLR of -35.6 dBc and EVM of 6% at 26 dBm PA output power without digital pre-distortion (DPD). The proposed supply modulator core circuit occupies 1.1 mm2 die area, and is fabricated in a 0.18 µm CMOS technology.
ContributorsJing, Yue (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kiaei, Sayfe (Committee member) / Kitchen, Jennifer (Committee member) / Song, Hongjiang (Committee member) / Arizona State University (Publisher)
Created2017