Matching Items (8)
Filtering by

Clear all filters

152025-Thumbnail Image.png
Description
At present, almost 70% of the electric energy in the United States is produced utilizing fossil fuels. Combustion of fossil fuels contributes CO2 to the atmosphere, potentially exacerbating the impact on global warming. To make the electric power system (EPS) more sustainable for the future, there has been an emphasis

At present, almost 70% of the electric energy in the United States is produced utilizing fossil fuels. Combustion of fossil fuels contributes CO2 to the atmosphere, potentially exacerbating the impact on global warming. To make the electric power system (EPS) more sustainable for the future, there has been an emphasis on scaling up generation of electric energy from wind and solar resources. These resources are renewable in nature and have pollution free operation. Various states in the US have set up different goals for achieving certain amount of electrical energy to be produced from renewable resources. The Southwestern region of the United States receives significant solar radiation throughout the year. High solar radiation makes concentrated solar power and solar PV the most suitable means of renewable energy production in this region. However, the majority of the projects that are presently being developed are either residential or utility owned solar PV plants. This research explores the impact of significant PV penetration on the steady state voltage profile of the electric power transmission system. This study also identifies the impact of PV penetration on the dynamic response of the transmission system such as rotor angle stability, frequency response and voltage response after a contingency. The light load case of spring 2010 and the peak load case of summer 2018 have been considered for analyzing the impact of PV. If the impact is found to be detrimental to the normal operation of the EPS, mitigation measures have been devised and presented in the thesis. Commercially available software tools/packages such as PSLF, PSS/E, DSA Tools have been used to analyze the power network and validate the results.
ContributorsPrakash, Nitin (Author) / Heydt, Gerald T. (Thesis advisor) / Vittal, Vijay (Thesis advisor) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2013
151566-Thumbnail Image.png
Description
The past few decades have seen a consistent growth of distributed PV sources. Distributed PV, like other DG sources, can be located at or near load centers and provide benefits which traditional generation may lack. However, distribution systems were not designed to accommodate such power generation sources as these sources

The past few decades have seen a consistent growth of distributed PV sources. Distributed PV, like other DG sources, can be located at or near load centers and provide benefits which traditional generation may lack. However, distribution systems were not designed to accommodate such power generation sources as these sources might lead to operational as well as power quality issues. A high penetration of distributed PV resources may lead to bi-directional power flow resulting in voltage swells, increased losses and overloading of conductors. Voltage unbalance is a concern in distribution systems and the effect of single-phase residential PV systems on voltage unbalance needs to be explored. Furthermore, the islanding of DGs presents a technical hurdle towards the seamless integration of DG sources with the electricity grid. The work done in this thesis explores two important aspects of grid inte-gration of distributed PV generation, namely, the impact on power quality and anti-islanding. A test distribution system, representing a realistic distribution feeder in Arizona is modeled to study both the aforementioned aspects. The im-pact of distributed PV on voltage profile, voltage unbalance and distribution sys-tem primary losses are studied using CYMDIST. Furthermore, a PSCAD model of the inverter with anti-island controls is developed and the efficacy of the anti-islanding techniques is studied. Based on the simulations, generalized conclusions are drawn and the problems/benefits are elucidated.
ContributorsMitra, Parag (Author) / Heydt, Gerald T (Thesis advisor) / Vittal, Vijay (Thesis advisor) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2013
152331-Thumbnail Image.png
Description
Digital to analog converters (DACs) find widespread use in communications equipment. Most commercially available DAC's which are intended to be used in transmitter applications come in a dual configuration for carrying the in phase (I) and quadrature (Q) data and feature on chip digital mixing. Digital mixing offers many benefits

Digital to analog converters (DACs) find widespread use in communications equipment. Most commercially available DAC's which are intended to be used in transmitter applications come in a dual configuration for carrying the in phase (I) and quadrature (Q) data and feature on chip digital mixing. Digital mixing offers many benefits concerning I and Q matching but has one major drawback; the update rate of the DAC must be higher than the intermediate frequency (IF) which is most commonly a factor of 4. This drawback motivates the need for interpolation so that a low update rate can be used for components preceding the DACs. In this thesis the design of an interpolating DAC integrated circuit (IC) to be used in a transmitter application for generating a 100MHz IF is presented. Many of the transistor level implementations are provided. The tradeoffs in the design are analyzed and various options are discussed. This thesis provides a basic foundation for designing an IC of this nature and will give the reader insight into potential areas of further research. At the time of this writing the chip is in fabrication therefore this document does not contain test results.
ContributorsNixon, Cliff (Author) / Bakkaloglu, Bertan (Thesis advisor) / Arizona State University (Publisher)
Created2013
153496-Thumbnail Image.png
Description
An important operating aspect of all transmission systems is power system stability

and satisfactory dynamic performance. The integration of renewable resources in general, and photovoltaic resources in particular into the grid has created new engineering issues. A particularly problematic operating scenario occurs when conventional generation is operated at a low level

An important operating aspect of all transmission systems is power system stability

and satisfactory dynamic performance. The integration of renewable resources in general, and photovoltaic resources in particular into the grid has created new engineering issues. A particularly problematic operating scenario occurs when conventional generation is operated at a low level but photovoltaic solar generation is at a high level. Significant solar photovoltaic penetration as a renewable resource is becoming a reality in some electric power systems. In this thesis, special attention is given to photovoltaic generation in an actual electric power system: increased solar penetration has resulted in significant strides towards meeting renewable portfolio standards. The impact of solar generation integration on power system dynamics is studied and evaluated.

This thesis presents the impact of high solar penetration resulting in potentially

problematic low system damping operating conditions. This is the case because the power system damping provided by conventional generation may be insufficient due to reduced system inertia and change in power flow patterns affecting synchronizing and damping capability in the AC system. This typically occurs because conventional generators are rescheduled or shut down to allow for the increased solar production. This problematic case may occur at any time of the year but during the springtime months of March-May, when the system load is low and the ambient temperature is relatively low, there is the potential that over voltages may occur in the high voltage transmission system. Also, reduced damping in system response to disturbances may occur. An actual case study is considered in which real operating system data are used. Solutions to low damping cases are discussed and a solution based on the retuning of a conventional power system stabilizer is given in the thesis.
ContributorsPethe, Anushree Sanjeev (Author) / Vittal, Vijay (Thesis advisor) / Heydt, Gerald T (Thesis advisor) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2015
153036-Thumbnail Image.png
Description
High speed current-steering DACs with high linearity are needed in today's applications such as wired and wireless communications, instrumentation, radar, and other direct digital synthesis (DDS) applications. However, a trade-off exists between the speed and resolution of Nyquist rate current-steering DACs. As the resolution increases, more transistor area

High speed current-steering DACs with high linearity are needed in today's applications such as wired and wireless communications, instrumentation, radar, and other direct digital synthesis (DDS) applications. However, a trade-off exists between the speed and resolution of Nyquist rate current-steering DACs. As the resolution increases, more transistor area is required to meet matching requirements for optimal linearity and thus, the overall speed of the DAC is limited.

In this thesis work, a 12-bit current-steering DAC was designed with current sources scaled below the required matching size to decrease the area and increase the overall speed of the DAC. By scaling the current sources, however, errors due to random mismatch between current sources will arise and additional calibration hardware is necessary to ensure 12-bit linearity. This work presents how to implement a self-calibration DAC that works to fix amplitude errors while maintaining a lower overall area. Additionally, the DAC designed in this thesis investigates the implementation feasibility of a data-interleaved architecture. Data interleaving can increase the total bandwidth of the DACs by 2 with an increase in SQNR by an additional 3 dB.

The final results show that the calibration method can effectively improve the linearity of the DAC. The DAC is able to run up to 400 MSPS frequencies with a 75 dB SFDR performance and above 87 dB SFDR performance at update rates of 200 MSPS.
ContributorsJankunas, Benjamin (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2014
153113-Thumbnail Image.png
Description
As residential photovoltaic (PV) systems become more and more common and widespread, their system architectures are being developed to maximize power extraction while keeping the cost of associated electronics to a minimum. An architecture that has become popular in recent years is the "DC optimizer" architecture, wherein one DC-DC

As residential photovoltaic (PV) systems become more and more common and widespread, their system architectures are being developed to maximize power extraction while keeping the cost of associated electronics to a minimum. An architecture that has become popular in recent years is the "DC optimizer" architecture, wherein one DC-DC converter is connected to the output of each PV module. The DC optimizer architecture has the advantage of performing maximum power-point tracking (MPPT) at the module level, without the high cost of using an inverter on each module (the "microinverter" architecture). This work details the design of a proposed DC optimizer. The design incorporates a series-input parallel-output topology to implement MPPT at the sub-module level. This topology has some advantages over the more common series-output DC optimizer, including relaxed requirements for the system's inverter. An autonomous control scheme is proposed for the series-connected converters, so that no external control signals are needed for the system to operate, other than sunlight. The DC optimizer in this work is designed with an emphasis on efficiency, and to that end it uses GaN FETs and an active clamp technique to reduce switching and conduction losses. As with any parallel-output converter, phase interleaving is essential to minimize output RMS current losses. This work proposes a novel phase-locked loop (PLL) technique to achieve interleaving among the series-input converters.
ContributorsLuster, Daniel (Author) / Ayyanar, Raja (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2014
151039-Thumbnail Image.png
Description
With the rapid expansion of the photovoltaic industry over the last decade, there has been a huge demand in the PV installations in the residential sector. This thesis focuses on the analysis and implementation of a dc-dc boost converter at photovoltaic sub-module level. The thesis also analyses the various topologies

With the rapid expansion of the photovoltaic industry over the last decade, there has been a huge demand in the PV installations in the residential sector. This thesis focuses on the analysis and implementation of a dc-dc boost converter at photovoltaic sub-module level. The thesis also analyses the various topologies like switched capacitors and extended duty ratio which can be practically implemented in the photovoltaic panels. The results obtained in this work have concentrated on the use of novel strategies to substitute the use of central dc-dc converter used in PV module string connection. The implementation of distributed MPPT at the PV sub-module level is also an integral part of this thesis. Using extensive PLECS simulations, this thesis came to the conclusion that with the design of a proper compensation at the dc interconnection of a series or parallel PV Module Integrated Converter string, the central dc-dc converter can be substituted. The dc-ac interconnection voltage remains regulated at all irradiance level even without a dc-dc central converter at the string end. The foundation work for the hardware implementation has also been carried out. Design of parameters for future hardware implementation has also been presented in detail in this thesis.
ContributorsSen, Sourav (Author) / Ayyanar, Raja (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2012
154249-Thumbnail Image.png
Description
The photovoltaic systems used to convert solar energy to electricity pose a multitude of design and implementation challenges, including energy conversion efficiency, partial shading effects, and power converter efficiency. Using power converters for Distributed Maximum Power Point Tracking (DMPPT) is a well-known architecture to significantly reduce power loss associated with

The photovoltaic systems used to convert solar energy to electricity pose a multitude of design and implementation challenges, including energy conversion efficiency, partial shading effects, and power converter efficiency. Using power converters for Distributed Maximum Power Point Tracking (DMPPT) is a well-known architecture to significantly reduce power loss associated with mismatched panels. Sub-panel-level DMPPT is shown to have up to 14.5% more annual energy yield than panel-level DMPPT, and requires an efficient medium power converter.

This research aims at implementing a highly efficient power management system at sub-panel level with focus on system cost and form-factor. Smaller form-factor motivates increased converter switching frequencies to significantly reduce the size of converter passives and substantially improve transient performance. But, currently available power MOSFETs put a constraint on the highest possible switching frequency due to increased switching losses. The solution is Gallium Nitride based power devices, which deliver figure of merit (FOM) performance at least an order of magnitude higher than existing silicon MOSFETs. Low power loss, high power density, low cost and small die sizes are few of the qualities that make e-GaN superior to its Si counterpart. With careful design, e-GaN can enable a 20-30% improvement in power stage efficiency compared to converters using Si MOSFETs.

The main objective of this research is to develop a highly integrated, high efficiency, 20MHz, hybrid GaN-CMOS DC-DC MPPT converter for a 12V/5A sub-panel. Hard and soft switching boost converter topologies are investigated within this research, and an innovative CMOS gate drive technique for efficiently driving an e-GaN power stage is presented in this work. The converter controller also employs a fast converging analog MPPT control technique.
ContributorsKrishnan Achary, Kiran Kumar (Author) / Kitchen, Jennifer (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2015