Matching Items (7)
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- All Subjects: MEMS
- Creators: Ozev, Sule
- Creators: Buneo, Christopher
- Member of: ASU Electronic Theses and Dissertations
Description
Micro Electro Mechanical Systems (MEMS) is one of the fastest growing field in silicon industry. Low cost production is key for any company to improve their market share. MEMS testing is challenging since input to test a MEMS device require physical stimulus like acceleration, pressure etc. Also, MEMS device vary with process and requires calibration to make them reliable. This increases test cost and testing time. This challenge can be overcome by combining electrical stimulus based testing along with statistical analysis on MEMS response for electrical stimulus and also limited physical stimulus response data. This thesis proposes electrical stimulus based built in self test(BIST) which can be used to get MEMS data and later this data can be used for statistical analysis. A capacitive MEMS accelerometer is considered to test this BIST approach. This BIST circuit overhead is less and utilizes most of the standard readout circuit. This thesis discusses accelerometer response for electrical stimulus and BIST architecture. As a part of this BIST circuit, a second order sigma delta modulator has been designed. This modulator has a sampling frequency of 1MHz and bandwidth of 6KHz. SNDR of 60dB is achieved with 1Vpp differential input signal and 3.3V supply
ContributorsKundur, Vinay (Author) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
Advances in implantable MEMS technology has made possible adaptive micro-robotic implants that can track and record from single neurons in the brain. Development of autonomous neural interfaces opens up exciting possibilities of micro-robots performing standard electrophysiological techniques that would previously take researchers several hundred hours to train and achieve the desired skill level. It would result in more reliable and adaptive neural interfaces that could record optimal neural activity 24/7 with high fidelity signals, high yield and increased throughput. The main contribution here is validating adaptive strategies to overcome challenges in autonomous navigation of microelectrodes inside the brain. The following issues pose significant challenges as brain tissue is both functionally and structurally dynamic: a) time varying mechanical properties of the brain tissue-microelectrode interface due to the hyperelastic, viscoelastic nature of brain tissue b) non-stationarities in the neural signal caused by mechanical and physiological events in the interface and c) the lack of visual feedback of microelectrode position in brain tissue. A closed loop control algorithm is proposed here for autonomous navigation of microelectrodes in brain tissue while optimizing the signal-to-noise ratio of multi-unit neural recordings. The algorithm incorporates a quantitative understanding of constitutive mechanical properties of soft viscoelastic tissue like the brain and is guided by models that predict stresses developed in brain tissue during movement of the microelectrode. An optimal movement strategy is developed that achieves precise positioning of microelectrodes in the brain by minimizing the stresses developed in the surrounding tissue during navigation and maximizing the speed of movement. Results of testing the closed-loop control paradigm in short-term rodent experiments validated that it was possible to achieve a consistently high quality SNR throughout the duration of the experiment. At the systems level, new generation of MEMS actuators for movable microelectrode array are characterized and the MEMS device operation parameters are optimized for improved performance and reliability. Further, recommendations for packaging to minimize the form factor of the implant; design of device mounting and implantation techniques of MEMS microelectrode array to enhance the longevity of the implant are also included in a top-down approach to achieve a reliable brain interface.
ContributorsAnand, Sindhu (Author) / Muthuswamy, Jitendran (Thesis advisor) / Tillery, Stephen H (Committee member) / Buneo, Christopher (Committee member) / Abbas, James (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2013
Description
Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased efficiency, but at the cost of distortion. Class AB amplifiers have low efficiency, but high linearity. By modulating the supply voltage of a Class AB amplifier to make a Class H amplifier, the efficiency can increase while still maintaining the Class AB level of linearity. A 92dB Power Supply Rejection Ratio (PSRR) Class AB amplifier and a Class H amplifier were designed in a 0.24um process for portable audio applications. Using a multiphase buck converter increased the efficiency of the Class H amplifier while still maintaining a fast response time to respond to audio frequencies. The Class H amplifier had an efficiency above the Class AB amplifier by 5-7% from 5-30mW of output power without affecting the total harmonic distortion (THD) at the design specifications. The Class H amplifier design met all design specifications and showed performance comparable to the designed Class AB amplifier across 1kHz-20kHz and 0.01mW-30mW. The Class H design was able to output 30mW into 16Ohms without any increase in THD. This design shows that Class H amplifiers merit more research into their potential for increasing efficiency of audio amplifiers and that even simple designs can give significant increases in efficiency without compromising linearity.
ContributorsPeterson, Cory (Author) / Bakkaloglu, Bertan (Thesis advisor) / Barnaby, Hugh (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
Class D Amplifiers are widely used in portable systems such as mobile phones to achieve high efficiency. The demands of portable electronics for low power consumption to extend battery life and reduce heat dissipation mandate efficient, high-performance audio amplifiers. The high efficiency of Class D amplifiers (CDAs) makes them particularly attractive for portable applications. The Digital class D amplifier is an interesting solution to increase the efficiency of embedded systems. However, this solution is not good enough in terms of PWM stage linearity and power supply rejection. An efficient control is needed to correct the error sources in order to get a high fidelity sound quality in the whole audio range of frequencies. A fundamental analysis on various error sources due to non idealities in the power stage have been discussed here with key focus on Power supply perturbations driving the Power stage of a Class D Audio Amplifier. Two types of closed loop Digital Class D architecture for PSRR improvement have been proposed and modeled. Double sided uniform sampling modulation has been used. One of the architecture uses feedback around the power stage and the second architecture uses feedback into digital domain. Simulation & experimental results confirm that the closed loop PSRR & PS-IMD improve by around 30-40 dB and 25 dB respectively.
ContributorsChakraborty, Bijeta (Author) / Bakkaloglu, Bertan (Thesis advisor) / Garrity, Douglas (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2012
Description
Long-term monitoring of deep brain structures using microelectrode implants is critical for the success of emerging clinical applications including cortical neural prostheses, deep brain stimulation and other neurobiology studies such as progression of disease states, learning and memory, brain mapping etc. However, current microelectrode technologies are not capable enough of reaching those clinical milestones given their inconsistency in performance and reliability in long-term studies. In all the aforementioned applications, it is important to understand the limitations & demands posed by technology as well as biological processes. Recent advances in implantable Micro Electro Mechanical Systems (MEMS) technology have tremendous potential and opens a plethora of opportunities for long term studies which were not possible before. The overall goal of the project is to develop large scale autonomous, movable, micro-scale interfaces which can seek and monitor/stimulate large ensembles of precisely targeted neurons and neuronal networks that can be applied for brain mapping in behaving animals. However, there are serious technical (fabrication) challenges related to packaging and interconnects, examples of which include: lack of current industry standards in chip-scale packaging techniques for silicon chips with movable microstructures, incompatible micro-bonding techniques to elongate current micro-electrode length to reach deep brain structures, inability to achieve hermetic isolation of implantable devices from biological tissue and fluids (i.e. cerebrospinal fluid (CSF), blood, etc.). The specific aims are to: 1) optimize & automate chip scale packaging of MEMS devices with unique requirements not amenable to conventional industry standards with respect to bonding, process temperature and pressure in order to achieve scalability 2) develop a novel micro-bonding technique to extend the length of current polysilicon micro-electrodes to reach and monitor deep brain structures 3) design & develop high throughput packaging mechanism for constructing a dense array of movable microelectrodes. Using a combination of unique micro-bonding technique which involves conductive thermosetting epoxy’s with hermetically sealed support structures and a highly optimized, semi-automated, 90-minute flip-chip packaging process, I have now extended the repertoire of previously reported movable microelectrode arrays to bond conventional stainless steel and Pt/Ir microelectrode arrays of desired lengths to steerable polysilicon shafts. I tested scalable prototypes in rigorous bench top tests including Impedance measurements, accelerated aging and non-destructive testing to assess electrical and mechanical stability of micro-bonds under long-term implantation. I propose a 3D printed packaging method allows a wide variety of electrode configurations to be realized such as a rectangular or circular array configuration or other arbitrary geometries optimal for specific regions of the brain with inter-electrode distance as low as 25 um with an unprecedented capability of seeking and recording/stimulating targeted single neurons in deep brain structures up to 10 mm deep (with 6 μm displacement resolution). The advantage of this computer controlled moveable deep brain electrodes facilitates potential capabilities of moving past glial sheath surrounding microelectrodes to restore neural connection, counter the variabilities in signal amplitudes, and enable simultaneous recording/stimulation at precisely targeted layers of brain.
ContributorsPalaniswamy, Sivakumar (Author) / Muthuswamy, Jitendran (Thesis advisor) / Buneo, Christopher (Committee member) / Abbas, James (Committee member) / Arizona State University (Publisher)
Created2016
Description
Testing and calibration constitute a significant part of the overall manufacturing cost of microelectromechanical system (MEMS) devices. Developing a low-cost testing and calibration scheme applicable at the user side that ensures the continuous reliability and accuracy is a crucial need. The main purpose of testing is to eliminate defective devices and to verify the qualifications of a product is met. The calibration process for capacitive MEMS devices, for the most part, entails the determination of the mechanical sensitivity. In this work, a physical-stimulus-free built-in-self-test (BIST) integrated circuit (IC) design characterizing the sensitivity of capacitive MEMS accelerometers is presented. The BIST circuity can extract the amplitude and phase response of the acceleration sensor's mechanics under electrical excitation within 0.55% of error with respect to its mechanical sensitivity under the physical stimulus. Sensitivity characterization is performed using a low computation complexity multivariate linear regression model. The BIST circuitry maximizes the use of existing analog and mixed-signal readout signal chain and the host processor core, without the need for computationally expensive Fast Fourier Transform (FFT)-based approaches. The BIST IC is designed and fabricated using the 0.18-µm CMOS technology. The sensor analog front-end and BIST circuitry are integrated with a three-axis, low-g capacitive MEMS accelerometer in a single hermetically sealed package. The BIST circuitry occupies 0.3 mm2 with a total readout IC area of 1.0 mm2 and consumes 8.9 mW during self-test operation.
ContributorsOzel, Muhlis Kenan (Author) / Bakkaloglu, Bertan (Thesis advisor) / Ozev, Sule (Thesis advisor) / Kiaei, Sayfe (Committee member) / Ogras, Umit Y. (Committee member) / Arizona State University (Publisher)
Created2017
Description
Micro Electro Mechanical Systems (MEMS) based accelerometers are one of the most commonly used sensors out there. They are used in devices such as, airbags, smartphones, airplanes, and many more. Although they are very accurate, they degrade with time or get offset due to some damage. To fix this, they must be calibrated again using physical calibration technique, which is an expensive process to conduct. However, these sensors can also be calibrated infield by applying an on-chip electrical stimulus to the sensor. Electrical stimulus-based calibration could bring the cost of testing and calibration significantly down as compared to factory testing. In this thesis, simulations are presented to formulate a statistical prediction model based on an electrical stimulus. Results from two different approaches of electrical calibration have been discussed. A prediction model with a root mean square error of 1% has been presented in this work. Experiments were conducted on commercially available accelerometers to test the techniques used for simulations.
ContributorsBassi, Ishaan (Author) / Ozev, Sule (Thesis advisor) / Christen, Jennifer Blain (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2020