Matching Items (3)
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- All Subjects: Microelectromechanical Systems
- Genre: Masters Thesis
- Creators: Bakkaloglu, Bertan
Description
Micro Electro Mechanical Systems (MEMS) is one of the fastest growing field in silicon industry. Low cost production is key for any company to improve their market share. MEMS testing is challenging since input to test a MEMS device require physical stimulus like acceleration, pressure etc. Also, MEMS device vary with process and requires calibration to make them reliable. This increases test cost and testing time. This challenge can be overcome by combining electrical stimulus based testing along with statistical analysis on MEMS response for electrical stimulus and also limited physical stimulus response data. This thesis proposes electrical stimulus based built in self test(BIST) which can be used to get MEMS data and later this data can be used for statistical analysis. A capacitive MEMS accelerometer is considered to test this BIST approach. This BIST circuit overhead is less and utilizes most of the standard readout circuit. This thesis discusses accelerometer response for electrical stimulus and BIST architecture. As a part of this BIST circuit, a second order sigma delta modulator has been designed. This modulator has a sampling frequency of 1MHz and bandwidth of 6KHz. SNDR of 60dB is achieved with 1Vpp differential input signal and 3.3V supply
ContributorsKundur, Vinay (Author) / Bakkaloglu, Bertan (Committee member) / Ozev, Sule (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
The applications which use MEMS accelerometer have been on rise and many new fields which are using the MEMS devices have been on rise. The industry is trying to reduce the cost of production of these MEMS devices. These devices are manufactured using micromachining and the interface circuitry is manufactured using CMOS and the final product is integrated on to a single chip. Amount spent on testing of the MEMS devices make up a considerable share of the total final cost of the device. In order to save the cost and time spent on testing, researchers have been trying to develop different methodologies. At present, MEMS devices are tested using mechanical stimuli to measure the device parameters and for calibration the device. This testing is necessary since the MEMS process is not a very well controlled process unlike CMOS. This is done using an ATE and the cost of using ATE (automatic testing equipment) contribute to 30-40% of the devices final cost. This thesis proposes an architecture which can use an Electrical Signal to stimulate the MEMS device and use the data from the MEMS response in approximating the calibration coefficients efficiently. As a proof of concept, we have designed a BIST (Built-in self-test) circuit for MEMS accelerometer. The BIST has an electrical stimulus generator, Capacitance-to-voltage converter, ∑ ∆ ADC. This thesis explains in detail the design of the Electrical stimulus generator. We have also designed a technique to correlate the parameters obtained from electrical stimuli to those obtained by mechanical stimuli. This method is cost effective since the additional circuitry needed to implement BIST is less since the technique utilizes most of the existing standard readout circuitry already present.
ContributorsJangala Naga, Naveen Sai (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2014
Description
Readout Integrated Circuits(ROICs) are important components of infrared(IR) imag
ing systems. Performance of ROICs affect the quality of images obtained from IR
imaging systems. Contemporary infrared imaging applications demand ROICs that
can support large dynamic range, high frame rate, high output data rate, at low
cost, size and power. Some of these applications are military surveillance, remote
sensing in space and earth science missions and medical diagnosis. This work focuses
on developing a ROIC unit cell prototype for National Aeronautics and Space Ad
ministration(NASA), Jet Propulsion Laboratory’s(JPL’s) space applications. These
space applications also demand high sensitivity, longer integration times(large well
capacity), wide operating temperature range, wide input current range and immunity
to radiation events such as Single Event Latchup(SEL).
This work proposes a digital ROIC(DROIC) unit cell prototype of 30ux30u size,
to be used mainly with NASA JPL’s High Operating Temperature Barrier Infrared
Detectors(HOT BIRDs). Current state of the art DROICs achieve a dynamic range
of 16 bits using advanced 65-90nm CMOS processes which adds a lot of cost overhead.
The DROIC pixel proposed in this work uses a low cost 180nm CMOS process and
supports a dynamic range of 20 bits operating at a low frame rate of 100 frames per
second(fps), and a dynamic range of 12 bits operating at a high frame rate of 5kfps.
The total electron well capacity of this DROIC pixel is 1.27 billion electrons, enabling
integration times as long as 10ms, to achieve better dynamic range. The DROIC unit
cell uses an in-pixel 12-bit coarse ADC and an external 8-bit DAC based fine ADC.
The proposed DROIC uses layout techniques that make it immune to radiation up to
300krad(Si) of total ionizing dose(TID) and single event latch-up(SEL). It also has a
wide input current range from 10pA to 1uA and supports detectors operating from
Short-wave infrared (SWIR) to longwave infrared (LWIR) regions.
ing systems. Performance of ROICs affect the quality of images obtained from IR
imaging systems. Contemporary infrared imaging applications demand ROICs that
can support large dynamic range, high frame rate, high output data rate, at low
cost, size and power. Some of these applications are military surveillance, remote
sensing in space and earth science missions and medical diagnosis. This work focuses
on developing a ROIC unit cell prototype for National Aeronautics and Space Ad
ministration(NASA), Jet Propulsion Laboratory’s(JPL’s) space applications. These
space applications also demand high sensitivity, longer integration times(large well
capacity), wide operating temperature range, wide input current range and immunity
to radiation events such as Single Event Latchup(SEL).
This work proposes a digital ROIC(DROIC) unit cell prototype of 30ux30u size,
to be used mainly with NASA JPL’s High Operating Temperature Barrier Infrared
Detectors(HOT BIRDs). Current state of the art DROICs achieve a dynamic range
of 16 bits using advanced 65-90nm CMOS processes which adds a lot of cost overhead.
The DROIC pixel proposed in this work uses a low cost 180nm CMOS process and
supports a dynamic range of 20 bits operating at a low frame rate of 100 frames per
second(fps), and a dynamic range of 12 bits operating at a high frame rate of 5kfps.
The total electron well capacity of this DROIC pixel is 1.27 billion electrons, enabling
integration times as long as 10ms, to achieve better dynamic range. The DROIC unit
cell uses an in-pixel 12-bit coarse ADC and an external 8-bit DAC based fine ADC.
The proposed DROIC uses layout techniques that make it immune to radiation up to
300krad(Si) of total ionizing dose(TID) and single event latch-up(SEL). It also has a
wide input current range from 10pA to 1uA and supports detectors operating from
Short-wave infrared (SWIR) to longwave infrared (LWIR) regions.
ContributorsPraveen, Subramanya Chilukuri (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kitchen, Jennifer (Committee member) / Long, Yu (Committee member) / Arizona State University (Publisher)
Created2019