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Semiconductor device scaling has kept up with Moore's law for the past decades and they have been scaling by a factor of half every one and half years. Every new generation of device technology opens up new opportunities and challenges and especially so for analog design. High speed and low

Semiconductor device scaling has kept up with Moore's law for the past decades and they have been scaling by a factor of half every one and half years. Every new generation of device technology opens up new opportunities and challenges and especially so for analog design. High speed and low gain is characteristic of these processes and hence a tradeoff that can enable to get back gain by trading speed is crucial. This thesis proposes a solution that increases the speed of sampling of a circuit by a factor of three while reducing the specifications on analog blocks and keeping the power nearly constant. The techniques are based on the switched capacitor technique called Correlated Level Shifting. A triple channel Cyclic ADC has been implemented, with each channel working at a sampling frequency of 3.33MS/s and a resolution of 14 bits. The specifications are compared with that based on a traditional architecture to show the superiority of the proposed technique.
ContributorsSivakumar, Balasubramanian (Author) / Farahani, Bahar Jalali (Thesis advisor) / Garrity, Douglas (Committee member) / Bakkaloglu, Bertan (Committee member) / Aberle, James T., 1961- (Committee member) / Arizona State University (Publisher)
Created2012
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Two nested capacitors can produce work if the electric fields are not aligned, and the purpose of this research was to explore the possibility of using that generation instead of DC motors. The work the capacitors produce is determined by the strength of the fields and materials that is composed

Two nested capacitors can produce work if the electric fields are not aligned, and the purpose of this research was to explore the possibility of using that generation instead of DC motors. The work the capacitors produce is determined by the strength of the fields and materials that is composed of. The power density of the object is then determined by the volume. As the electric field increases in strength, the power increases, so to create a very strong internal field. The nested capacitors use a dielectric to prevent breakdown from the strength of the field. Additionally, as the nested capacitors decrease in size, their power density increases rapidly \u2014 becoming close to a dc motor's power density around the 500mm^2 size. When the result was simulated, it was discovered that the electric field was not contained to the dielectric and would result in sparking. Several other concerns would need to be addressed for this to become a viable solution.
ContributorsFryda, George Andrew (Author) / Singh, Anoop (Thesis director) / Yu, Hongbin (Committee member) / Mechanical and Aerospace Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2018-05