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Coronary computed tomography angiography (CTA) has a high negative predictive value for ruling out coronary artery disease with non-invasive evaluation of the coronary arteries. My work has attempted to provide metrics that could increase the positive predictive value of coronary CTA through the use of dual energy CTA imaging. After

Coronary computed tomography angiography (CTA) has a high negative predictive value for ruling out coronary artery disease with non-invasive evaluation of the coronary arteries. My work has attempted to provide metrics that could increase the positive predictive value of coronary CTA through the use of dual energy CTA imaging. After developing an algorithm for obtaining calcium scores from a CTA exam, a dual energy CTA exam was performed on patients at dose levels equivalent to levels for single energy CTA with a calcium scoring exam. Calcium Agatston scores obtained from the dual energy CTA exam were within ±11% of scores obtained with conventional calcium scoring exams. In the presence of highly attenuating coronary calcium plaques, the virtual non-calcium images obtained with dual energy CTA were able to successfully measure percent coronary stenosis within 5% of known stenosis values, which is not possible with single energy CTA images due to the presence of the calcium blooming artifact. After fabricating an anthropomorphic beating heart phantom with coronary plaques, characterization of soft plaque vulnerability to rupture or erosion was demonstrated with measurements of the distance from soft plaque to aortic ostium, percent stenosis, and percent lipid volume in soft plaque. A classification model was developed, with training data from the beating heart phantom and plaques, which utilized support vector machines to classify coronary soft plaque pixels as lipid or fibrous. Lipid versus fibrous classification with single energy CTA images exhibited a 17% error while dual energy CTA images in the classification model developed here only exhibited a 4% error. Combining the calcium blooming correction and the percent lipid volume methods developed in this work will provide physicians with metrics for increasing the positive predictive value of coronary CTA as well as expanding the use of coronary CTA to patients with highly attenuating calcium plaques.
ContributorsBoltz, Thomas (Author) / Frakes, David (Thesis advisor) / Towe, Bruce (Committee member) / Kodibagkar, Vikram (Committee member) / Pavlicek, William (Committee member) / Bouman, Charles (Committee member) / Arizona State University (Publisher)
Created2013
Description
Multicore processors have proliferated in nearly all forms of computing, from servers, desktop, to smartphones. The primary reason for this large adoption of multicore processors is due to its ability to overcome the power-wall by providing higher performance at a lower power consumption rate. With multi-cores, there is increased need

Multicore processors have proliferated in nearly all forms of computing, from servers, desktop, to smartphones. The primary reason for this large adoption of multicore processors is due to its ability to overcome the power-wall by providing higher performance at a lower power consumption rate. With multi-cores, there is increased need for dynamic energy management (DEM), much more than for single-core processors, as DEM for multi-cores is no more a mechanism just to ensure that a processor is kept under specified temperature limits, but also a set of techniques that manage various processor controls like dynamic voltage and frequency scaling (DVFS), task migration, fan speed, etc. to achieve a stated objective. The objectives span a wide range from maximizing throughput, minimizing power consumption, reducing peak temperature, maximizing energy efficiency, maximizing processor reliability, and so on, along with much more wider constraints of temperature, power, timing, and reliability constraints. Thus DEM can be very complex and challenging to achieve. Since often times many DEMs operate together on a single processor, there is a need to unify various DEM techniques. This dissertation address such a need. In this work, a framework for DEM is proposed that provides a unifying processor model that includes processor power, thermal, timing, and reliability models, supports various DEM control mechanisms, many different objective functions along with equally diverse constraint specifications. Using the framework, a range of novel solutions is derived for instances of DEM problems, that include maximizing processor performance, energy efficiency, or minimizing power consumption, peak temperature under constraints of maximum temperature, memory reliability and task deadlines. Finally, a robust closed-loop controller to implement the above solutions on a real processor platform with a very low operational overhead is proposed. Along with the controller design, a model identification methodology for obtaining the required power and thermal models for the controller is also discussed. The controller is architecture independent and hence easily portable across many platforms. The controller has been successfully deployed on Intel Sandy Bridge processor and the use of the controller has increased the energy efficiency of the processor by over 30%
ContributorsHanumaiah, Vinay (Author) / Vrudhula, Sarma (Thesis advisor) / Chatha, Karamvir (Committee member) / Chakrabarti, Chaitali (Committee member) / Rodriguez, Armando (Committee member) / Askin, Ronald (Committee member) / Arizona State University (Publisher)
Created2013
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Description
With increasing transistor volume and reducing feature size, it has become a major design constraint to reduce power consumption also. This has given rise to aggressive architectural changes for on-chip power management and rapid development to energy efficient hardware accelerators. Accordingly, the objective of this research work is to facilitate

With increasing transistor volume and reducing feature size, it has become a major design constraint to reduce power consumption also. This has given rise to aggressive architectural changes for on-chip power management and rapid development to energy efficient hardware accelerators. Accordingly, the objective of this research work is to facilitate software developers to leverage these hardware techniques and improve energy efficiency of the system. To achieve this, I propose two solutions for Linux kernel: Optimal use of these architectural enhancements to achieve greater energy efficiency requires accurate modeling of processor power consumption. Though there are many models available in literature to model processor power consumption, there is a lack of such models to capture power consumption at the task-level. Task-level energy models are a requirement for an operating system (OS) to perform real-time power management as OS time multiplexes tasks to enable sharing of hardware resources. I propose a detailed design methodology for constructing an architecture agnostic task-level power model and incorporating it into a modern operating system to build an online task-level power profiler. The profiler is implemented inside the latest Linux kernel and validated for Intel Sandy Bridge processor. It has a negligible overhead of less than 1\% hardware resource consumption. The profiler power prediction was demonstrated for various application benchmarks from SPEC to PARSEC with less than 4\% error. I also demonstrate the importance of the proposed profiler for emerging architectural techniques through use case scenarios, which include heterogeneous computing and fine grained per-core DVFS. Along with architectural enhancement in general purpose processors to improve energy efficiency, hardware accelerators like Coarse Grain reconfigurable architecture (CGRA) are gaining popularity. Unlike vector processors, which rely on data parallelism, CGRA can provide greater flexibility and compiler level control making it more suitable for present SoC environment. To provide streamline development environment for CGRA, I propose a flexible framework in Linux to do design space exploration for CGRA. With accurate and flexible hardware models, fine grained integration with accurate architectural simulator, and Linux memory management and DMA support, a user can carry out limitless experiments on CGRA in full system environment.
ContributorsDesai, Digant Pareshkumar (Author) / Vrudhula, Sarma (Thesis advisor) / Chakrabarti, Chaitali (Committee member) / Wu, Carole-Jean (Committee member) / Arizona State University (Publisher)
Created2013
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Description
We are expecting hundreds of cores per chip in the near future. However, scaling the memory architecture in manycore architectures becomes a major challenge. Cache coherence provides a single image of memory at any time in execution to all the cores, yet coherent cache architectures are believed will not scale

We are expecting hundreds of cores per chip in the near future. However, scaling the memory architecture in manycore architectures becomes a major challenge. Cache coherence provides a single image of memory at any time in execution to all the cores, yet coherent cache architectures are believed will not scale to hundreds and thousands of cores. In addition, caches and coherence logic already take 20-50% of the total power consumption of the processor and 30-60% of die area. Therefore, a more scalable architecture is needed for manycore architectures. Software Managed Manycore (SMM) architectures emerge as a solution. They have scalable memory design in which each core has direct access to only its local scratchpad memory, and any data transfers to/from other memories must be done explicitly in the application using Direct Memory Access (DMA) commands. Lack of automatic memory management in the hardware makes such architectures extremely power-efficient, but they also become difficult to program. If the code/data of the task mapped onto a core cannot fit in the local scratchpad memory, then DMA calls must be added to bring in the code/data before it is required, and it may need to be evicted after its use. However, doing this adds a lot of complexity to the programmer's job. Now programmers must worry about data management, on top of worrying about the functional correctness of the program - which is already quite complex. This dissertation presents a comprehensive compiler and runtime integration to automatically manage the code and data of each task in the limited local memory of the core. We firstly developed a Complete Circular Stack Management. It manages stack frames between the local memory and the main memory, and addresses the stack pointer problem as well. Though it works, we found we could further optimize the management for most cases. Thus a Smart Stack Data Management (SSDM) is provided. In this work, we formulate the stack data management problem and propose a greedy algorithm for the same. Later on, we propose a general cost estimation algorithm, based on which CMSM heuristic for code mapping problem is developed. Finally, heap data is dynamic in nature and therefore it is hard to manage it. We provide two schemes to manage unlimited amount of heap data in constant sized region in the local memory. In addition to those separate schemes for different kinds of data, we also provide a memory partition methodology.
ContributorsBai, Ke (Author) / Shrivastava, Aviral (Thesis advisor) / Chatha, Karamvir (Committee member) / Xue, Guoliang (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2014
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Description
Mobile platforms are becoming highly heterogeneous by combining a powerful multiprocessor system-on-chip (MpSoC) with numerous resources including display, memory, power management IC (PMIC), battery and wireless modems into a compact package. Furthermore, the MpSoC itself is a heterogeneous resource that integrates many processing elements such as CPU cores, GPU, video,

Mobile platforms are becoming highly heterogeneous by combining a powerful multiprocessor system-on-chip (MpSoC) with numerous resources including display, memory, power management IC (PMIC), battery and wireless modems into a compact package. Furthermore, the MpSoC itself is a heterogeneous resource that integrates many processing elements such as CPU cores, GPU, video, image, and audio processors. As a result, optimization approaches targeting mobile computing needs to consider the platform at various levels of granularity.

Platform energy consumption and responsiveness are two major considerations for mobile systems since they determine the battery life and user satisfaction, respectively. In this work, the models for power consumption, response time, and energy consumption of heterogeneous mobile platforms are presented. Then, these models are used to optimize the energy consumption of baseline platforms under power, response time, and temperature constraints with and without introducing new resources. It is shown, the optimal design choices depend on dynamic power management algorithm, and adding new resources is more energy efficient than scaling existing resources alone. The framework is verified through actual experiments on Qualcomm Snapdragon 800 based tablet MDP/T. Furthermore, usage of the framework at both design and runtime optimization is also presented.
ContributorsGupta, Ujjwala (Author) / Ogras, Umit Y. (Thesis advisor) / Ozev, Sule (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2014
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Description
The advent of medical imaging has enabled significant advances in pre-procedural planning, allowing cardiovascular anatomy to be visualized noninvasively before a procedure. However, absolute scale and tactile information are not conveyed in traditional pre-procedural planning based on images alone. This information deficit fails to completely prepare clinicians for complex heart

The advent of medical imaging has enabled significant advances in pre-procedural planning, allowing cardiovascular anatomy to be visualized noninvasively before a procedure. However, absolute scale and tactile information are not conveyed in traditional pre-procedural planning based on images alone. This information deficit fails to completely prepare clinicians for complex heart repair, where surgeons must consider the varied presentations of cardiac morphology and malformations. Three-dimensional (3D) visualization and 3D printing provide a mechanism to construct patient-specific, scale models of cardiovascular anatomy that surgeons and interventionalists can examine prior to a procedure. In addition, the same patient-specific models provide a valuable resource for educating future medical professionals. Instead of looking at idealized images on a computer screen or pages from medical textbooks, medical students can review a life-like model of patient anatomy.



In cases where surgical repair is insufficient to return the heart to normal function, a patient may proceed to advanced heart failure, and a heart transplant may be required. Unfortunately, a finite number of available donor hearts are available. A mechanical circulatory support (MCS) device can be used to bridge the time between heart failure and reception of a donor heart. These MCS devices are typically constructed for the adult population. Accordingly, the size associated to the device is a limiting factor for small adults or pediatric patients who often have smaller thoracic measurements. While current eligibility criteria are based on correlative measurements, the aforementioned 3D visualization capabilities can be leveraged to accomplish patient-specific fit analysis.

The main objectives of the work presented in this dissertation were 1) to develop and evaluate an optimized process for 3D printing cardiovascular anatomy for surgical planning and medical education and 2) to develop and evaluate computational tools to assess MCS device fit in specific patients. The evaluations for objectives 1 and 2 were completed with a collection of qualitative and quantitative validations. These validations include case studies to illustrate meaningful, qualitative results as well as quantitative results from surgical outcomes. The latter results present the first quantitative supporting evidence, beyond anecdotal case studies, regarding the efficacy of 3D printing for pre-procedural planning; this data is suitable as pilot data for clinical trials. The products of this work were used to plan 200 cardiovascular procedures (including 79 cardiothoracic surgeries at Phoenix Children's Hospital), via 3D printed heart models and assess MCS device fit in 29 patients across 6 countries.
ContributorsRyan, Justin Robert (Author) / Frakes, David (Thesis advisor) / Collins, Daniel (Committee member) / LaBelle, Jeffrey (Committee member) / Pizziconi, Vincent (Committee member) / Pophal, Stephen (Committee member) / Arizona State University (Publisher)
Created2015
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Description
Driven by stringent power and thermal constraints, heterogeneous multi-core processors, such as the ARM big-LITTLE architecture, are becoming increasingly popular. In this thesis, the use of low-power heterogeneous multi-cores as Microservers using web search as a motivational application is addressed. In particular, I propose a new family of scheduling policies

Driven by stringent power and thermal constraints, heterogeneous multi-core processors, such as the ARM big-LITTLE architecture, are becoming increasingly popular. In this thesis, the use of low-power heterogeneous multi-cores as Microservers using web search as a motivational application is addressed. In particular, I propose a new family of scheduling policies for heterogeneous microservers that assign incoming search queries to available cores so as to optimize for performance metrics such as mean response time and service level agreements, while guaranteeing thermally-safe operation. Thorough experimental evaluations on a big-LITTLE platform demonstrate, on an heterogeneous eight-core Samsung Exynos 5422 MpSoC, with four big and little cores each, that naive performance oriented scheduling policies quickly result in thermal instability, while the proposed policies not only reduce peak temperature but also achieve 4.8x reduction in processing time and 5.6x increase in energy efficiency compared to baseline scheduling policies.
ContributorsJain, Sankalp (Author) / Ogras, Umit Y. (Thesis advisor) / Garg, Siddharth (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2015
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Description
Three dimensional (3-D) ultrasound is safe, inexpensive, and has been shown to drastically improve system ease-of-use, diagnostic efficiency, and patient throughput. However, its high computational complexity and resulting high power consumption has precluded its use in hand-held applications.

In this dissertation, algorithm-architecture co-design techniques that aim to make hand-held 3-D ultrasound

Three dimensional (3-D) ultrasound is safe, inexpensive, and has been shown to drastically improve system ease-of-use, diagnostic efficiency, and patient throughput. However, its high computational complexity and resulting high power consumption has precluded its use in hand-held applications.

In this dissertation, algorithm-architecture co-design techniques that aim to make hand-held 3-D ultrasound a reality are presented. First, image enhancement methods to improve signal-to-noise ratio (SNR) are proposed. These include virtual source firing techniques and a low overhead digital front-end architecture using orthogonal chirps and orthogonal Golay codes.

Second, algorithm-architecture co-design techniques to reduce the power consumption of 3-D SAU imaging systems is presented. These include (i) a subaperture multiplexing strategy and the corresponding apodization method to alleviate the signal bandwidth bottleneck, and (ii) a highly efficient iterative delay calculation method to eliminate complex operations such as multiplications, divisions and square-root in delay calculation during beamforming. These techniques were used to define Sonic Millip3De, a 3-D die stacked architecture for digital beamforming in SAU systems. Sonic Millip3De produces 3-D high resolution images at 2 frames per second with system power consumption of 15W in 45nm technology.

Third, a new beamforming method based on separable delay decomposition is proposed to reduce the computational complexity of the beamforming unit in an SAU system. The method is based on minimizing the root-mean-square error (RMSE) due to delay decomposition. It reduces the beamforming complexity of a SAU system by 19x while providing high image fidelity that is comparable to non-separable beamforming. The resulting modified Sonic Millip3De architecture supports a frame rate of 32 volumes per second while maintaining power consumption of 15W in 45nm technology.

Next a 3-D plane-wave imaging system that utilizes both separable beamforming and coherent compounding is presented. The resulting system has computational complexity comparable to that of a non-separable non-compounding baseline system while significantly improving contrast-to-noise ratio and SNR. The modified Sonic Millip3De architecture is now capable of generating high resolution images at 1000 volumes per second with 9-fire-angle compounding.
ContributorsYang, Ming (Author) / Chakrabarti, Chaitali (Thesis advisor) / Papandreou-Suppappola, Antonia (Committee member) / Karam, Lina (Committee member) / Frakes, David (Committee member) / Ogras, Umit Y. (Committee member) / Arizona State University (Publisher)
Created2015
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Description
Dynamic susceptibility contrast MRI (DSC-MRI) is a powerful tool used to quantitatively measure parameters related to blood flow and volume in the brain. The technique is known as a “bolus-tracking” method and relies upon very fast scanning to accurately measure the flow of contrast agent into and out of a

Dynamic susceptibility contrast MRI (DSC-MRI) is a powerful tool used to quantitatively measure parameters related to blood flow and volume in the brain. The technique is known as a “bolus-tracking” method and relies upon very fast scanning to accurately measure the flow of contrast agent into and out of a region of interest. The need for high temporal resolution to measure contrast agent dynamics limits the spatial coverage of perfusion parameter maps which limits the utility of DSC-perfusion studies in pathologies involving the entire brain. Typical clinical DSC-perfusion studies are capable of acquiring 10-15 slices, generally centered on a known lesion or pathology.

The methods developed in this work improve the spatial coverage of whole-brain DSC-MRI by combining a highly efficient 3D spiral k-space trajectory with Generalized Autocalibrating Partial Parallel Acquisition (GRAPPA) parallel imaging without increasing temporal resolution. The proposed method is capable of acquiring 30 slices with a temporal resolution of under 1 second, covering the entire cerebrum with isotropic spatial resolution of 3 mm. Additionally, the acquisition method allows for correction of T1-enhancing leakage effects by virtue of collecting two echoes, which confound DSC perfusion measurements. The proposed DSC-perfusion method results in high quality perfusion parameter maps across a larger volume than is currently available with current clinical standards, improving diagnostic utility of perfusion MRI methods, which ultimately improves patient care.
ContributorsTurley, Dallas C (Author) / Pipe, James G (Thesis advisor) / Kodibagkar, Vikram (Thesis advisor) / Frakes, David (Committee member) / Sadleir, Rosalind (Committee member) / Schmainda, Kathleen (Committee member) / Arizona State University (Publisher)
Created2017
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Description
This thesis describes the development, characterization, and application of new biomedical technologies developed around the photoacoustic effect. The photoacoustic effect is defined as optical absorption-based generation of ultrasound and provides the foundation for a unique method of imaging and molecular detection. The range of applications of the photoacoustic effect have

This thesis describes the development, characterization, and application of new biomedical technologies developed around the photoacoustic effect. The photoacoustic effect is defined as optical absorption-based generation of ultrasound and provides the foundation for a unique method of imaging and molecular detection. The range of applications of the photoacoustic effect have not yet been fully explored. Photoacoustic endoscopy (PAE) has emerged as a minimally invasive tool for imaging internal organs and tissues. One of the main themes of this dissertation involves the first reported dual-intrauterine photoacoustic and ultrasound deep-tissue imaging endoscope. This device was designed to enable physicians at the point-of-care to better elucidate overall gynecological health, by imaging the lining of the human uterus. Intrauterine photoacoustic endoscopy is made possible due to the small diameter of the endoscope (3mm), which allows for complete, 360-degree organ analysis from within the uterine cavity. In certain biomedical applications, however, further minimization is necessary. Sufficiently small diameter endoscopes may allow for the possibility of applying PAE in new areas. To further miniaturize the diameter of our endoscopes, alternative imaging probe designs were investigated. The proposed PAE architecture utilizes a hollow optical waveguide to allow for concentric guiding of both light and sound. This enables imaging depths of up to several millimeters into animal tissue while maintaining an outer diameter of roughly 1mm. In the final focus of this dissertation, these waveguides are further investigated for use in micropipette electrodes, common in the field of single cell electrophysiology. Pulsed light is coupled with these electrodes providing real-time photoacoustic feedback, useful in navigation towards intended targets. Lastly, fluorescence can be generated and collected at the micropipette aperture by utilizing an intra-electrode tapered optical fiber. This allows for a targeted robotic approach to labeled neurons that is independent of microscopy.
ContributorsMiranda, Christopher (Author) / Smith, Barbara S. (Thesis advisor) / Kodibagkar, Vikram (Committee member) / LaBaer, Joshua (Committee member) / Frakes, David (Committee member) / Barkley, Joel (Committee member) / Arizona State University (Publisher)
Created2021