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- Genre: Academic theses
Description
Four Souvenirs for Violin and Piano was composed by Paul Schoenfeld (b.1947) in 1990 as a showpiece, spotlighting the virtuosity of both the violin and piano in equal measure. Each movement is a modern interpretation of a folk or popular genre, re- envisioned over intricate jazz harmonies and rhythms. The work was commissioned by violinist Lev Polyakin, who specifically requested some short pieces that could be performed in a local jazz establishment named Night Town in Cleveland, Ohio. The result is a work that is approximately fifteen minutes in length. Schoenfeld is a respected composer in the contemporary classical music community, whose Café Music (1986) for piano trio has recently become a staple of the standard chamber music repertoire. Many of his other works, however, remain in relative obscurity. It is the focus of this document to shed light on at least one other notable composition; Four Souvenirs for Violin and Piano. Among the topics to be discussed regarding this piece are a brief history behind the genesis of this composition, a structural summary of the entire work and each of its movements, and an appended practice guide based on interview and coaching sessions with the composer himself. With this project, I hope to provide a better understanding and appreciation of this work.
ContributorsJanczyk, Kristie Annette (Author) / Ryan, Russell (Thesis advisor) / Campbell, Andrew (Committee member) / Norton, Kay (Committee member) / Arizona State University (Publisher)
Created2015
Description
Samuel Máynez Prince (1886-1966), was a prolific and important Mexican musician. Prince’s musical style followed the trends of the nineteenth-century salon music genre. His compositions include lullabies, songs, dances, marches, mazurkas, waltzes, and revolutionary anthems. Prince’s social status and performances in the famed Café Colón in Mexico City increased his popularity among high-ranking political figures during the time of the Mexican Revolution as well as his status in the Mexican music scene.
Unfortunately there is virtually no existing scholarship on Prince and even basic information regarding his life and works is not readily available. The lack of organization of the manuscript scores and the absence of dates of his works has further pushed the composer into obscurity. An investigation therefore was necessary in order to explore the neglected aspects of the life and works of Prince as a violinist and composer. This document is the result of such an investigation by including extensive new biographical information, as well as the first musical analysis and edition of the complete recovered works for violin and piano.
In order to fill the gaps present in the limited biographical information regarding Prince’s life, investigative research was conducted in Mexico City. Information was drawn from archives of the composer’s grandchildren, the Palacio de Bellas Artes, the Conservatorio Nacional de Música de México, and the Orquesta Sinfónica Nacional. The surviving relatives provided first-hand details on events in the composer’s life; one also offered the researcher access to their personal archive including, important life documents, photographs, programs from concert performances, and manuscript scores of the compositions. Establishing connections with the relatives also led the researcher to examining the violins owned and used by the late violinist/composer.
This oral history approach led to new and updated information, including the revival of previously unpublished music for violin and piano. These works are here compiled in an edition that will give students, teachers, and music-lovers access to this unknown repertoire. Finally, this research seeks to promote the beauty and nuances of Mexican salon music, and the complete works for violin and piano of Samuel Máynez Prince in particular.
Unfortunately there is virtually no existing scholarship on Prince and even basic information regarding his life and works is not readily available. The lack of organization of the manuscript scores and the absence of dates of his works has further pushed the composer into obscurity. An investigation therefore was necessary in order to explore the neglected aspects of the life and works of Prince as a violinist and composer. This document is the result of such an investigation by including extensive new biographical information, as well as the first musical analysis and edition of the complete recovered works for violin and piano.
In order to fill the gaps present in the limited biographical information regarding Prince’s life, investigative research was conducted in Mexico City. Information was drawn from archives of the composer’s grandchildren, the Palacio de Bellas Artes, the Conservatorio Nacional de Música de México, and the Orquesta Sinfónica Nacional. The surviving relatives provided first-hand details on events in the composer’s life; one also offered the researcher access to their personal archive including, important life documents, photographs, programs from concert performances, and manuscript scores of the compositions. Establishing connections with the relatives also led the researcher to examining the violins owned and used by the late violinist/composer.
This oral history approach led to new and updated information, including the revival of previously unpublished music for violin and piano. These works are here compiled in an edition that will give students, teachers, and music-lovers access to this unknown repertoire. Finally, this research seeks to promote the beauty and nuances of Mexican salon music, and the complete works for violin and piano of Samuel Máynez Prince in particular.
ContributorsEkenes, Spencer Arvin (Author) / McLin, Katherine (Thesis advisor) / Feisst, Sabine (Committee member) / Jiang, Danwen (Committee member) / Arizona State University (Publisher)
Created2016
Description
The information era has brought about many technological advancements in the past
few decades, and that has led to an exponential increase in the creation of digital images and
videos. Constantly, all digital images go through some image processing algorithm for
various reasons like compression, transmission, storage, etc. There is data loss during this
process which leaves us with a degraded image. Hence, to ensure minimal degradation of
images, the requirement for quality assessment has become mandatory. Image Quality
Assessment (IQA) has been researched and developed over the last several decades to
predict the quality score in a manner that agrees with human judgments of quality. Modern
image quality assessment (IQA) algorithms are quite effective at prediction accuracy, and
their development has not focused on improving computational performance. The existing
serial implementation requires a relatively large run-time on the order of seconds for a single
frame. Hardware acceleration using Field programmable gate arrays (FPGAs) provides
reconfigurable computing fabric that can be tailored for a broad range of applications.
Usually, programming FPGAs has required expertise in hardware descriptive languages
(HDLs) or high-level synthesis (HLS) tool. OpenCL is an open standard for cross-platform,
parallel programming of heterogeneous systems along with Altera OpenCL SDK, enabling
developers to use FPGA's potential without extensive hardware knowledge. Hence, this
thesis focuses on accelerating the computationally intensive part of the most apparent
distortion (MAD) algorithm on FPGA using OpenCL. The results are compared with CPU
implementation to evaluate performance and efficiency gains.
few decades, and that has led to an exponential increase in the creation of digital images and
videos. Constantly, all digital images go through some image processing algorithm for
various reasons like compression, transmission, storage, etc. There is data loss during this
process which leaves us with a degraded image. Hence, to ensure minimal degradation of
images, the requirement for quality assessment has become mandatory. Image Quality
Assessment (IQA) has been researched and developed over the last several decades to
predict the quality score in a manner that agrees with human judgments of quality. Modern
image quality assessment (IQA) algorithms are quite effective at prediction accuracy, and
their development has not focused on improving computational performance. The existing
serial implementation requires a relatively large run-time on the order of seconds for a single
frame. Hardware acceleration using Field programmable gate arrays (FPGAs) provides
reconfigurable computing fabric that can be tailored for a broad range of applications.
Usually, programming FPGAs has required expertise in hardware descriptive languages
(HDLs) or high-level synthesis (HLS) tool. OpenCL is an open standard for cross-platform,
parallel programming of heterogeneous systems along with Altera OpenCL SDK, enabling
developers to use FPGA's potential without extensive hardware knowledge. Hence, this
thesis focuses on accelerating the computationally intensive part of the most apparent
distortion (MAD) algorithm on FPGA using OpenCL. The results are compared with CPU
implementation to evaluate performance and efficiency gains.
ContributorsGunavelu Mohan, Aswin (Author) / Sohoni, Sohum (Thesis advisor) / Ren, Fengbo (Thesis advisor) / Seo, Jae-Sun (Committee member) / Arizona State University (Publisher)
Created2017
Description
Convolutional Neural Network (CNN) has achieved state-of-the-art performance in numerous applications like computer vision, natural language processing, robotics etc. The advancement of High-Performance Computing systems equipped with dedicated hardware accelerators has also paved the way towards the success of compute intensive CNNs. Graphics Processing Units (GPUs), with massive processing capability, have been of general interest for the acceleration of CNNs. Recently, Field Programmable Gate Arrays (FPGAs) have been promising in CNN acceleration since they offer high performance while also being re-configurable to support the evolution of CNNs. This work focuses on a design methodology to accelerate CNNs on FPGA with low inference latency and high-throughput which are crucial for scenarios like self-driving cars, video surveillance etc. It also includes optimizations which reduce the resource utilization by a large margin with a small degradation in performance thus making the design suitable for low-end FPGA devices as well.
FPGA accelerators often suffer due to the limited main memory bandwidth. Also, highly parallel designs with large resource utilization often end up achieving low operating frequency due to poor routing. This work employs data fetch and buffer mechanisms, designed specifically for the memory access pattern of CNNs, that overlap computation with memory access. This work proposes a novel arrangement of the systolic processing element array to achieve high frequency and consume less resources than the existing works. Also, support has been extended to more complicated CNNs to do video processing. On Intel Arria 10 GX1150, the design operates at a frequency as high as 258MHz and performs single inference of VGG-16 and C3D in 23.5ms and 45.6ms respectively. For VGG-16 and C3D the design offers a throughput of 66.1 and 23.98 inferences/s respectively. This design can outperform other FPGA 2D CNN accelerators by up to 9.7 times and 3D CNN accelerators by up to 2.7 times.
FPGA accelerators often suffer due to the limited main memory bandwidth. Also, highly parallel designs with large resource utilization often end up achieving low operating frequency due to poor routing. This work employs data fetch and buffer mechanisms, designed specifically for the memory access pattern of CNNs, that overlap computation with memory access. This work proposes a novel arrangement of the systolic processing element array to achieve high frequency and consume less resources than the existing works. Also, support has been extended to more complicated CNNs to do video processing. On Intel Arria 10 GX1150, the design operates at a frequency as high as 258MHz and performs single inference of VGG-16 and C3D in 23.5ms and 45.6ms respectively. For VGG-16 and C3D the design offers a throughput of 66.1 and 23.98 inferences/s respectively. This design can outperform other FPGA 2D CNN accelerators by up to 9.7 times and 3D CNN accelerators by up to 2.7 times.
ContributorsRavi, Pravin Kumar (Author) / Zhao, Ming (Thesis advisor) / Li, Baoxin (Committee member) / Ren, Fengbo (Committee member) / Arizona State University (Publisher)
Created2020