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The increased use of commercial complementary metal-oxide-semiconductor (CMOS) technologies in harsh radiation environments has resulted in a new approach to radiation effects mitigation. This approach utilizes simulation to support the design of integrated circuits (ICs) to meet targeted tolerance specifications. Modeling the deleterious impact of ionizing radiation on ICs fabricated

The increased use of commercial complementary metal-oxide-semiconductor (CMOS) technologies in harsh radiation environments has resulted in a new approach to radiation effects mitigation. This approach utilizes simulation to support the design of integrated circuits (ICs) to meet targeted tolerance specifications. Modeling the deleterious impact of ionizing radiation on ICs fabricated in advanced CMOS technologies requires understanding and analyzing the basic mechanisms that result in buildup of radiation-induced defects in specific sensitive regions. Extensive experimental studies have demonstrated that the sensitive regions are shallow trench isolation (STI) oxides. Nevertheless, very little work has been done to model the physical mechanisms that result in the buildup of radiation-induced defects and the radiation response of devices fabricated in these technologies. A comprehensive study of the physical mechanisms contributing to the buildup of radiation-induced oxide trapped charges and the generation of interface traps in advanced CMOS devices is presented in this dissertation. The basic mechanisms contributing to the buildup of radiation-induced defects are explored using a physical model that utilizes kinetic equations that captures total ionizing dose (TID) and dose rate effects in silicon dioxide (SiO2). These mechanisms are formulated into analytical models that calculate oxide trapped charge density (Not) and interface trap density (Nit) in sensitive regions of deep-submicron devices. Experiments performed on field-oxide-field-effect-transistors (FOXFETs) and metal-oxide-semiconductor (MOS) capacitors permit investigating TID effects and provide a comparison for the radiation response of advanced CMOS devices. When used in conjunction with closed-form expressions for surface potential, the analytical models enable an accurate description of radiation-induced degradation of transistor electrical characteristics. In this dissertation, the incorporation of TID effects in advanced CMOS devices into surface potential based compact models is also presented. The incorporation of TID effects into surface potential based compact models is accomplished through modifications of the corresponding surface potential equations (SPE), allowing the inclusion of radiation-induced defects (i.e., Not and Nit) into the calculations of surface potential. Verification of the compact modeling approach is achieved via comparison with experimental data obtained from FOXFETs fabricated in a 90 nm low-standby power commercial bulk CMOS technology and numerical simulations of fully-depleted (FD) silicon-on-insulator (SOI) n-channel transistors.
ContributorsSanchez Esqueda, Ivan (Author) / Barnaby, Hugh J (Committee member) / Schroder, Dieter (Thesis advisor) / Schroder, Dieter K. (Committee member) / Holbert, Keith E. (Committee member) / Gildenblat, Gennady (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Programmable Metallization Cell (PMC) is a technology platform which utilizes mass transport in solid or liquid electrolyte coupled with electrochemical (redox) reactions to form or remove nanoscale metallic electrodeposits on or in the electrolyte. The ability to redistribute metal mass and form metallic nanostructure in or on a structure in

Programmable Metallization Cell (PMC) is a technology platform which utilizes mass transport in solid or liquid electrolyte coupled with electrochemical (redox) reactions to form or remove nanoscale metallic electrodeposits on or in the electrolyte. The ability to redistribute metal mass and form metallic nanostructure in or on a structure in situ, via the application of a bias on laterally placed electrodes, creates a large number of promising applications. A novel PMC-based lateral microwave switch was fabricated and characterized for use in microwave systems. It has demonstrated low insertion loss, high isolation, low voltage operation, low power and low energy consumption, and excellent linearity. Due to its non-volatile nature the switch operates with fewer biases and its simple planar geometry makes possible innovative device structures which can be potentially integrated into microwave power distribution circuits. PMC technology is also used to develop lateral dendritic metal electrodes. A lateral metallic dendritic network can be grown in a solid electrolyte (GeSe) or electrodeposited on SiO2 or Si using a water-mediated method. These dendritic electrodes grown in a solid electrolyte (GeSe) can be used to lower resistances for applications like self-healing interconnects despite its relatively low light transparency; while the dendritic electrodes grown using water-mediated method can be potentially integrated into solar cell applications, like replacing conventional Ag screen-printed top electrodes as they not only reduce resistances but also are highly transparent. This research effort also laid a solid foundation for developing dendritic plasmonic structures. A PMC-based lateral dendritic plasmonic structure is a device that has metallic dendritic networks grown electrochemically on SiO2 with a thin layer of surface metal nanoparticles in liquid electrolyte. These structures increase the distribution of particle sizes by connecting pre-deposited Ag nanoparticles into fractal structures and result in three significant effects, resonance red-shift, resonance broadening and resonance enhancement, on surface plasmon resonance for light trapping simultaneously, which can potentially enhance thin film solar cells' performance at longer wavelengths.
ContributorsRen, Minghan (Author) / Kozicki, Michael (Thesis advisor) / Schroder, Dieter (Committee member) / Roedel, Ronald (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2011
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Description
This thesis summarizes the research work carried out on design, modeling and simulation of semiconductor nanophotonic devices. The research includes design of nanowire (NW) lasers, modeling of active plasmonic waveguides, design of plasmonic nano-lasers, and design of all-semiconductor plasmonic systems. For the NW part, a comparative study of electrical injection

This thesis summarizes the research work carried out on design, modeling and simulation of semiconductor nanophotonic devices. The research includes design of nanowire (NW) lasers, modeling of active plasmonic waveguides, design of plasmonic nano-lasers, and design of all-semiconductor plasmonic systems. For the NW part, a comparative study of electrical injection in the longitudinal p-i-n and coaxial p-n core-shell NWs was performed. It is found that high density carriers can be efficiently injected into and confined in the core-shell structure. The required bias voltage and doping concentrations in the core-shell structure are smaller than those in the longitudinal p-i-n structure. A new device structure with core-shell configuration at the p and n contact regions for electrically driven single NW laser was proposed. Through a comprehensive design trade-off between threshold gain and threshold voltage, room temperature lasing has been proved in the laser with low threshold current and large output efficiency. For the plasmonic part, the propagation of surface plasmon polariton (SPP) in a metal-semiconductor-metal structure where semiconductor is highly excited to have an optical gain was investigated. It is shown that near the resonance the SPP mode experiences an unexpected giant modal gain that is 1000 times of the material gain in the semiconductor and the corresponding confinement factor is as high as 105. The physical origin of the giant modal gain is the slowing down of the average energy propagation in the structure. Secondly, SPP modes lasing in a metal-insulator-semiconductor multi-layer structure was investigated. It is shown that the lasing threshold can be reduced by structural optimization. A specific design example was optimized using AlGaAs/GaAs/AlGaAs single quantum well sandwiched between silver layers. This cavity has a physical volume of 1.5×10-4 λ03 which is the smallest nanolaser reported so far. Finally, the all-semiconductor based plasmonics was studied. It is found that InAs is superior to other common semiconductors for plasmonic application in mid-infrared range. A plasmonic system made of InAs, GaSb and AlSb layers, consisting of a plasmonic source, waveguide and detector was proposed. This on-chip integrated system is realizable in a single epitaxial growth process.
ContributorsLi, Debin (Author) / Ning, Cun-Zheng (Thesis advisor) / Zhang, Yong-Hang (Committee member) / Balanis, Constantine A (Committee member) / Yu, Hongbin (Committee member) / Arizona State University (Publisher)
Created2012
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Description
This dissertation addresses challenges pertaining to multi-junction (MJ) solar cells from material development to device design and characterization. Firstly, among the various methods to improve the energy conversion efficiency of MJ solar cells using, a novel approach proposed recently is to use II-VI (MgZnCd)(SeTe) and III-V (AlGaIn)(AsSb) semiconductors lattice-matched on

This dissertation addresses challenges pertaining to multi-junction (MJ) solar cells from material development to device design and characterization. Firstly, among the various methods to improve the energy conversion efficiency of MJ solar cells using, a novel approach proposed recently is to use II-VI (MgZnCd)(SeTe) and III-V (AlGaIn)(AsSb) semiconductors lattice-matched on GaSb or InAs substrates for current-matched subcells with minimal defect densities. CdSe/CdTe superlattices are proposed as a potential candidate for a subcell in the MJ solar cell designs using this material system, and therefore the material properties of the superlattices are studied. The high structural qualities of the superlattices are obtained from high resolution X-ray diffraction measurements and cross-sectional transmission electron microscopy images. The effective bandgap energies of the superlattices obtained from the photoluminescence (PL) measurements vary with the layer thicknesses, and are smaller than the bandgap energies of either the constituent material. Furthermore, The PL peak position measured at the steady state exhibits a blue shift that increases with the excess carrier concentration. These results confirm a strong type-II band edge alignment between CdSe and CdTe. The valence band offset between unstrained CdSe and CdTe is determined as 0.63 eV±0.06 eV by fitting the measured PL peak positions using the Kronig-Penney model. The blue shift in PL peak position is found to be primarily caused by the band bending effect based on self-consistent solutions of the Schrödinger and Poisson equations. Secondly, the design of the contact grid layout is studied to maximize the power output and energy conversion efficiency for concentrator solar cells. Because the conventional minimum power loss method used for the contact design is not accurate in determining the series resistance loss, a method of using a distributed series resistance model to maximize the power output is proposed for the contact design. It is found that the junction recombination loss in addition to the series resistance loss and shadowing loss can significantly affect the contact layout. The optimal finger spacing and maximum efficiency calculated by the two methods are close, and the differences are dependent on the series resistance and saturation currents of solar cells. Lastly, the accurate measurements of external quantum efficiency (EQE) are important for the design and development of MJ solar cells. However, the electrical and optical couplings between the subcells have caused EQE measurement artifacts. In order to interpret the measurement artifacts, DC and small signal models are built for the bias condition and the scan of chopped monochromatic light in the EQE measurements. Characterization methods are developed for the device parameters used in the models. The EQE measurement artifacts are found to be caused by the shunt and luminescence coupling effects, and can be minimized using proper voltage and light biases. Novel measurement methods using a pulse voltage bias or a pulse light bias are invented to eliminate the EQE measurement artifacts. These measurement methods are nondestructive and easy to implement. The pulse voltage bias or pulse light bias is superimposed on the conventional DC voltage and light biases, in order to control the operating points of the subcells and counterbalance the effects of shunt and luminescence coupling. The methods are demonstrated for the first time to effectively eliminate the measurement artifacts.
ContributorsLi, Jingjing (Author) / Zhang, Yong-Hang (Thesis advisor) / Tao, Meng (Committee member) / Schroder, Dieter (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2012
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Description
Ge1-xSnx and SiyGe1-x-ySnx materials are being researched intensively for applications in infra-red optoelectronic devices. Due to their direct band gap these materials may in-fact be the enabling factor in the commercial realization of silicon photonics/group IV photonics and the integration of nanophotonics with nanoelectronics. However the synthesis of these meta-stable

Ge1-xSnx and SiyGe1-x-ySnx materials are being researched intensively for applications in infra-red optoelectronic devices. Due to their direct band gap these materials may in-fact be the enabling factor in the commercial realization of silicon photonics/group IV photonics and the integration of nanophotonics with nanoelectronics. However the synthesis of these meta-stable semiconductor alloys, with a range of Sn-compositions, remains the primary technical challenge. Highly specialized epitaxial growth methods must be employed to produce single crystal layers which have sufficient quality for optoelectronic device applications. Up to this point these methods have been unfavorable from a semiconductor manufacturing perspective. In this work the growth of high-quality Si-Ge-Sn epitaxial alloys on Ge-buffered Si (100) using an industry-standard reduced pressure chemical vapor deposition reactor and a cost-effective chemistry is demonstrated. The growth kinetics are studied in detail in-order to understand the factors influencing layer composition, morphology, and defectivity. In doing so breakthrough GeSn materials and device results are achieved including methods to overcome the limits of Sn-incorporation and the realization of low-defect and strain-relaxed epitaxial layers with up to 20% Sn.

P and n-type doping methods are presented in addition to the production of SiGeSn ternary alloys. Finally optically stimulated lasing in thick GeSn layers and SiGeSn/GeSn multiple quantum wells is demonstrated. Lasing wavelengths ranging from 2-3 µm at temperatures up to 180K are realized in thick layers. Whereas SiGeSn/GeSn multiple quantum wells on a strain-relaxed GeSn buffers have enabled the first reported SiGeSn/GeSn multiple quantum well laser operating up to 80K with threshold power densities as low as 33 kW/cm2.
ContributorsMargetis, Joseph (Author) / Zhang, Yong-Hang (Thesis advisor) / Chizmeshya, Andrew (Committee member) / Johnson, Shane (Committee member) / Arizona State University (Publisher)
Created2018
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Description
To extend the lifetime of complementary metal-oxide-semiconductors (CMOS), emerging process techniques are being proposed to conquer the manufacturing difficulties. New structures and materials are proposed with superior electrical properties to traditional CMOS, such as strain technology and feedback field-effect transistor (FB-FET). To continue the design success and make an impact

To extend the lifetime of complementary metal-oxide-semiconductors (CMOS), emerging process techniques are being proposed to conquer the manufacturing difficulties. New structures and materials are proposed with superior electrical properties to traditional CMOS, such as strain technology and feedback field-effect transistor (FB-FET). To continue the design success and make an impact on leading products, advanced circuit design exploration must begin concurrently with early silicon development. Therefore, an accurate and scalable model is desired to correctly capture those effects and flexible to extend to alternative process choices. For example, strain technology has been successfully integrated into CMOS fabrication to improve transistor performance but the stress is non-uniformly distributed in the channel, leading to systematic performance variations. In this dissertation, a new layout-dependent stress model is proposed as a function of layout, temperature, and other device parameters. Furthermore, a method of layout decomposition is developed to partition the layout into a set of simple patterns for model extraction. These solutions significantly reduce the complexity in stress modeling and simulation. On the other hand, semiconductor devices with self-feedback mechanisms are emerging as promising alternatives to CMOS. Fe-FET was proposed to improve the switching by integrating a ferroelectric material as gate insulator in a MOSFET structure. Under particular circumstances, ferroelectric capacitance is effectively negative, due to the negative slope of its polarization-electrical field curve. This property makes the ferroelectric layer a voltage amplifier to boost surface potential, achieving fast transition. A new threshold voltage model for Fe-FET is developed, and is further revealed that the impact of random dopant fluctuation (RDF) can be suppressed. Furthermore, through silicon via (TSV), a key technology that enables the 3D integration of chips, is studied. TSV structure is usually a cylindrical metal-oxide-semiconductors (MOS) capacitor. A piecewise capacitance model is proposed for 3D interconnect simulation. Due to the mismatch in coefficients of thermal expansion (CTE) among materials, thermal stress is observed in TSV process and impacts neighboring devices. The stress impact is investigated to support the interaction between silicon process and IC design at the early stage.
ContributorsWang, Chi-Chao (Author) / Cao, Yu (Thesis advisor) / Chakrabarti, Chaitali (Committee member) / Clark, Lawrence (Committee member) / Schroder, Dieter (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Polarization detection and control techniques play essential roles in various applications, including optical communication, polarization imaging, chemical analysis, target detection, and biomedical diagnosis. Conventional methods for polarization detection and polarization control require bulky optical systems. Flat optics opens a new way for ultra-compact, lower-cost devices and systems for polarization detection

Polarization detection and control techniques play essential roles in various applications, including optical communication, polarization imaging, chemical analysis, target detection, and biomedical diagnosis. Conventional methods for polarization detection and polarization control require bulky optical systems. Flat optics opens a new way for ultra-compact, lower-cost devices and systems for polarization detection and control. However, polarization measurement and manipulating devices with high efficiency and accuracy in the mid-infrared (MIR) range remain elusive. This dissertation presented design concepts and experimental demonstrations of full-Stokes parameters detection and polarization generation devices based on chip-integrated plasmonic metasurfaces with high performance and record efficiency. One of the significant challenges for full-Stokes polarization detection is to achieve high-performance circular polarization (CP) filters. The first design presented in this dissertation is based on the direct integration of plasmonic quarter-wave plate (QWP) onto gold nanowire gratings. It is featured with the subwavelength thickness (~500nm) and extinction ratio around 16. The second design is based on the anisotropic thin-film interference between two vertically integrated anisotropic plasmonic metasurfaces. It provides record high efficiency (around 90%) and extinction ratio (>180). These plasmonic CP filters can be used for circular, elliptical, and linear polarization generation at different wavelengths. The maximum degree of circular polarization (DOCP) measured from the sample achieves 0.99998. The proposed CP filters were integrated with nanograting-based linear polarization (LP) filters on the same chip for single-shot polarization detection. Full-Stokes measurements were experimentally demonstrated with high accuracy at the single wavelength using the direct subtraction method and over a broad wavelength range from 3.5 to 4.5mm using the Mueller matrix method. This design concept was later expanded to a pixelized array of polarization filters. A full-Stokes imaging system was experimentally demonstrated based on integrating a metasurface with pixelized polarization filters arrays and an MIR camera.
ContributorsBai, Jing (Author) / Yao, Yu (Thesis advisor) / Balanis, Constantine A. (Committee member) / Wang, Liping (Committee member) / Zhang, Yong-Hang (Committee member) / Arizona State University (Publisher)
Created2021
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Description
Nanophotonics studies the interaction of light with nanoscale devices and nanostructures. This thesis focuses on developing nanoscale devices for optical modulation (saturable absorber and all-optical modulator) and investigating light scattering from nanoparticles for underwater navigation and energy sector application. Saturable absorbers and all-optical modulators are essential to generate ultrashort high-power

Nanophotonics studies the interaction of light with nanoscale devices and nanostructures. This thesis focuses on developing nanoscale devices for optical modulation (saturable absorber and all-optical modulator) and investigating light scattering from nanoparticles for underwater navigation and energy sector application. Saturable absorbers and all-optical modulators are essential to generate ultrashort high-power laser pulses and high-speed communications. Graphene-based devices are broadband, ultrafast, and compatible with different substrates and fibers. Nevertheless, the required fluence to saturate or modulate the optical signal with graphene is still high to realize low-threshold, compact broadband devices, which are essential for many applications. This dissertation emphasizes that the strong light-matter interaction in graphene-plasmonic hybrid metasurface greatly enhances monolayer graphene’s saturable absorption and optical signal modulation effect while maintaining graphene’s ultrafast carrier dynamics. Furthermore, based on this concept, simulation models and experimental demonstrations are presented in this dissertation to demonstrate both subwavelength (~λ/5 in near-infrared and ~λ/10 in mid-infrared) thick graphene-based saturable absorber (with record-low saturation fluence (~0.1μJ/cm2), and ultrashort recovery time (~60fs) at near-infrared wavelengths) and all-optical modulators ( with 40% reflection modulation at 6.5μm with ~55μJ/cm2 pump fluence and ultrafast relaxation time of ~1ps at 1.56μm with less than 8μJ/cm2 pump fluence). Underwater navigation is essential for various underwater vehicles. However, there is no reliable method for underwater navigation. This dissertation presents a numerical simulation model and algorithm for navigation based on underwater polarization mapping data. With the methods developed, for clear water in the swimming pool, it is possible to achieve a sun position error of 0.35˚ azimuth and 0.03˚ zenith angle, and the corresponding location prediction error is ~23Km. For turbid lake water, a location determination error of ~100Km is achieved. Furthermore, maintenance of heliostat mirrors and receiver tubes is essential for properly operating concentrated solar power (CSP) plants. This dissertation demonstrates a fast and field deployable inspection method to measure the heliostat mirror soiling levels and receiver tube defect detection based on polarization images. Under sunny and clear sky conditions, accurate reflection efficiency (error ~1%) measurement for mirrors with different soiling levels is achieved, and detection of receiver tube defects is demonstrated.
ContributorsRafique, Md Zubair Ebne (Author) / Yao, Yu (Thesis advisor) / Palais, Joseph (Committee member) / Zhang, Yong-Hang (Committee member) / Sukharev, Maxim (Committee member) / Arizona State University (Publisher)
Created2022