Matching Items (24)
Filtering by

Clear all filters

151814-Thumbnail Image.png
Description
This research emphasizes the use of low energy and low temperature post processing to improve the performance and lifetime of thin films and thin film transistors, by applying the fundamentals of interaction of materials with conductive heating and electromagnetic radiation. Single frequency microwave anneal is used to rapidly recrystallize the

This research emphasizes the use of low energy and low temperature post processing to improve the performance and lifetime of thin films and thin film transistors, by applying the fundamentals of interaction of materials with conductive heating and electromagnetic radiation. Single frequency microwave anneal is used to rapidly recrystallize the damage induced during ion implantation in Si substrates. Volumetric heating of the sample in the presence of the microwave field facilitates quick absorption of radiation to promote recrystallization at the amorphous-crystalline interface, apart from electrical activation of the dopants due to relocation to the substitutional sites. Structural and electrical characterization confirm recrystallization of heavily implanted Si within 40 seconds anneal time with minimum dopant diffusion compared to rapid thermal annealed samples. The use of microwave anneal to improve performance of multilayer thin film devices, e.g. thin film transistors (TFTs) requires extensive study of interaction of individual layers with electromagnetic radiation. This issue has been addressed by developing detail understanding of thin films and interfaces in TFTs by studying reliability and failure mechanisms upon extensive stress test. Electrical and ambient stresses such as illumination, thermal, and mechanical stresses are inflicted on the mixed oxide based thin film transistors, which are explored due to high mobilities of the mixed oxide (indium zinc oxide, indium gallium zinc oxide) channel layer material. Semiconductor parameter analyzer is employed to extract transfer characteristics, useful to derive mobility, subthreshold, and threshold voltage parameters of the transistors. Low temperature post processing anneals compatible with polymer substrates are performed in several ambients (oxygen, forming gas and vacuum) at 150 °C as a preliminary step. The analysis of the results pre and post low temperature anneals using device physics fundamentals assists in categorizing defects leading to failure/degradation as: oxygen vacancies, thermally activated defects within the bandgap, channel-dielectric interface defects, and acceptor-like or donor-like trap states. Microwave anneal has been confirmed to enhance the quality of thin films, however future work entails extending the use of electromagnetic radiation in controlled ambient to facilitate quick post fabrication anneal to improve the functionality and lifetime of these low temperature fabricated TFTs.
ContributorsVemuri, Rajitha (Author) / Alford, Terry L. (Thesis advisor) / Theodore, N David (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
151596-Thumbnail Image.png
Description
Carrier lifetime is one of the few parameters which can give information about the low defect densities in today's semiconductors. In principle there is no lower limit to the defect density determined by lifetime measurements. No other technique can easily detect defect densities as low as 10-9 - 10-10 cm-3

Carrier lifetime is one of the few parameters which can give information about the low defect densities in today's semiconductors. In principle there is no lower limit to the defect density determined by lifetime measurements. No other technique can easily detect defect densities as low as 10-9 - 10-10 cm-3 in a simple, contactless room temperature measurement. However in practice, recombination lifetime τr measurements such as photoconductance decay (PCD) and surface photovoltage (SPV) that are widely used for characterization of bulk wafers face serious limitations when applied to thin epitaxial layers, where the layer thickness is smaller than the minority carrier diffusion length Ln. Other methods such as microwave photoconductance decay (µ-PCD), photoluminescence (PL), and frequency-dependent SPV, where the generated excess carriers are confined to the epitaxial layer width by using short excitation wavelengths, require complicated configuration and extensive surface passivation processes that make them time-consuming and not suitable for process screening purposes. Generation lifetime τg, typically measured with pulsed MOS capacitors (MOS-C) as test structures, has been shown to be an eminently suitable technique for characterization of thin epitaxial layers. It is for these reasons that the IC community, largely concerned with unipolar MOS devices, uses lifetime measurements as a "process cleanliness monitor." However when dealing with ultraclean epitaxial wafers, the classic MOS-C technique measures an effective generation lifetime τg eff which is dominated by the surface generation and hence cannot be used for screening impurity densities. I have developed a modified pulsed MOS technique for measuring generation lifetime in ultraclean thin p/p+ epitaxial layers which can be used to detect metallic impurities with densities as low as 10-10 cm-3. The widely used classic version has been shown to be unable to effectively detect such low impurity densities due to the domination of surface generation; whereas, the modified version can be used suitably as a metallic impurity density monitoring tool for such cases.
ContributorsElhami Khorasani, Arash (Author) / Alford, Terry (Thesis advisor) / Goryll, Michael (Committee member) / Bertoni, Mariana (Committee member) / Arizona State University (Publisher)
Created2013
151512-Thumbnail Image.png
Description
Photodetectors in the 1.7 to 4.0 μm range are being commercially developed on InP substrates to meet the needs of longer wavelength applications such as thermal and medical sensing. Currently, these devices utilize high indium content metamorphic Ga1-xInxAs (x > 0.53) layers to extend the wavelength range beyond the 1.7

Photodetectors in the 1.7 to 4.0 μm range are being commercially developed on InP substrates to meet the needs of longer wavelength applications such as thermal and medical sensing. Currently, these devices utilize high indium content metamorphic Ga1-xInxAs (x > 0.53) layers to extend the wavelength range beyond the 1.7 μm achievable using lattice matched GaInAs. The large lattice mismatch required to reach the extended wavelengths results in photodetector materials that contain a large number of misfit dislocations. The low quality of these materials results in a large nonradiative Shockley Read Hall generation/recombination rate that is manifested as an undesirable large thermal noise level in these photodetectors. This work focuses on utilizing the different band structure engineering methods to design more efficient devices on InP substrates. One prospective way to improve photodetector performance at the extended wavelengths is to utilize lattice matched GaInAs/GaAsSb structures that have a type-II band alignment, where the ground state transition energy of the superlattice is smaller than the bandgap of either constituent material. Over the extended wavelength range of 2 to 3 μm this superlattice structure has an optimal period thickness of 3.4 to 5.2 nm and a wavefunction overlap of 0.8 to 0.4, respectively. In using a type-II superlattice to extend the cutoff wavelength there is a tradeoff between the wavelength reached and the electron-hole wavefunction overlap realized, and hence absorption coefficient achieved. This tradeoff and the subsequent reduction in performance can be overcome by two methods: adding bismuth to this type-II material system; applying strain on both layers in the system to attain strain-balanced condition. These allow the valance band alignment and hence the wavefunction overlap to be tuned independently of the wavelength cutoff. Adding 3% bismuth to the GaInAs constituent material, the resulting lattice matched Ga0.516In0.484As0.970Bi0.030/GaAs0.511Sb0.489superlattice realizes a 50% larger absorption coefficient. While as, similar results can be achieved with strain-balanced condition with strain limited to 1.9% on either layer. The optimal design rules derived from the different possibilities make it feasible to extract superlattice period thickness with the best absorption coefficient for any cutoff wavelength in the range.  
ContributorsSharma, Ankur R (Author) / Johnson, Shane (Thesis advisor) / Goryll, Michael (Committee member) / Roedel, Ronald (Committee member) / Arizona State University (Publisher)
Created2013
151846-Thumbnail Image.png
Description
Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased

Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased efficiency, but at the cost of distortion. Class AB amplifiers have low efficiency, but high linearity. By modulating the supply voltage of a Class AB amplifier to make a Class H amplifier, the efficiency can increase while still maintaining the Class AB level of linearity. A 92dB Power Supply Rejection Ratio (PSRR) Class AB amplifier and a Class H amplifier were designed in a 0.24um process for portable audio applications. Using a multiphase buck converter increased the efficiency of the Class H amplifier while still maintaining a fast response time to respond to audio frequencies. The Class H amplifier had an efficiency above the Class AB amplifier by 5-7% from 5-30mW of output power without affecting the total harmonic distortion (THD) at the design specifications. The Class H amplifier design met all design specifications and showed performance comparable to the designed Class AB amplifier across 1kHz-20kHz and 0.01mW-30mW. The Class H design was able to output 30mW into 16Ohms without any increase in THD. This design shows that Class H amplifiers merit more research into their potential for increasing efficiency of audio amplifiers and that even simple designs can give significant increases in efficiency without compromising linearity.
ContributorsPeterson, Cory (Author) / Bakkaloglu, Bertan (Thesis advisor) / Barnaby, Hugh (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
152978-Thumbnail Image.png
Description
Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which

Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which is referred to as programmable metallization cell (PMC), conductive bridge RAM (CBRAM), or electrochemical metallization memory (ECM), which is likely to surpass flash memory in all the ideal memory characteristics. A comprehensive physics-based model is needed to completely understand PMC operation and assist in design optimization.

To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities.

The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior.

The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.
ContributorsRajabi, Saba (Author) / Barnaby, Hugh (Thesis advisor) / Kozicki, Michael (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2014
153322-Thumbnail Image.png
Description
Inductors are fundamental components that do not scale well. Their physical limitations to scalability along with their inherent losses make them the main obstacle in achieving monolithic system-on-chip platform (SoCP). For past decades researchers focused on integrating magnetic materials into on-chip inductors in the quest of achieving high inductance density

Inductors are fundamental components that do not scale well. Their physical limitations to scalability along with their inherent losses make them the main obstacle in achieving monolithic system-on-chip platform (SoCP). For past decades researchers focused on integrating magnetic materials into on-chip inductors in the quest of achieving high inductance density and quality factor (QF). The state of the art on-chip inductor is made of an enclosed magnetic thin-film around the current carrying wire for maximum flux amplification. Though the integration of magnetic materials results in enhanced inductor characteristics, this approach has its own challenges and limitations especially in power applications. The current-induced magnetic field (HDC) drives the magnetic film into its saturation state. At saturation, inductance and QF drop to that of air-core inductors, eliminating the benefits of integrating magnetic materials. Increasing the current carrying capability without substantially sacrificing benefits brought on by the magnetic material is an open challenge in power applications. Researchers continue to address this challenge along with the continuous improvement in inductance and QF for RF and power applications.

In this work on-chip inductors incorporating magnetic Co-4%Zr-4%Ta -8%B thin films were fabricated and their characteristics were examined under the influence of an externally applied DC magnetic field. It is well established that spins in magnetic materials tend to align themselves in the same direction as the applied field. The resistance of the inductor resulting from the ferromagnetic film can be changed by manipulating the orientation of magnetization. A reduction in resistance should lead to decreases in losses and an enhancement in the QF. The effect of externally applied DC magnetic field along the easy and hard axes was thoroughly investigated. Depending on the strength and orientation of the externally applied field significant improvements in QF response were gained at the expense of a relative reduction in inductance. Characteristics of magnetic-based inductors degrade with current-induced stress. It was found that applying an externally low DC magnetic field across the on-chip inductor prevents the degradation in inductance and QF responses. Examining the effect of DC magnetic field on current carrying capability under low temperature is suggested.
ContributorsKhdour, Mahmoud (Author) / Yu, Hongbin (Thesis advisor) / Pan, George (Committee member) / Goryll, Michael (Committee member) / Bearat, Hamdallah (Committee member) / Arizona State University (Publisher)
Created2014
153330-Thumbnail Image.png
Description
Semiconductor manufacturing economics necessitate the development of innovative device measurement techniques for quick assessment of products. Several novel electrical measurement techniques will be proposed for screening silicon device parameters. The studied parameters range from oxide reliability, and carrier lifetime in MOS capacitors to the power MOSFET reverse recovery.

It will be

Semiconductor manufacturing economics necessitate the development of innovative device measurement techniques for quick assessment of products. Several novel electrical measurement techniques will be proposed for screening silicon device parameters. The studied parameters range from oxide reliability, and carrier lifetime in MOS capacitors to the power MOSFET reverse recovery.

It will be shown that positive charge trapping is a dominant process when thick oxides are stressed through the ramped voltage test (RVT). Exploiting the physics behind positive charge generation/trapping at high electric fields, a fast I-V measurement technique is proposed that can be used to effectively distinguish the ultra-thick oxides' intrinsic quality at low electric fields.

Next, two novel techniques will be presented for studying the carrier lifetime in MOS Capacitor devices. It will be shown that the deep-level transient spectroscopy (DLTS) can be applied to MOS test structures as a swift mean for screening the generation lifetime. Recombination lifetime will also be addressed by introducing the optically-excited MOS technique as a promising tool.

The last part of this work is devoted to the reverse recovery behavior of the body diode of power MOSFETs. The correct interpretation of the LDMOS reverse recovery is challenging and requires special attention. A simple approach will be presented to extract meaningful lifetime values from the reverse recovery of LDMOS body-diodes exploiting their gate voltage and the magnitude of the reverse bias.
ContributorsElhami Khorasani, Arash (Author) / Alford, Terry L. (Thesis advisor) / Goryll, Michael (Committee member) / Theodore, David (Committee member) / Arizona State University (Publisher)
Created2015
153292-Thumbnail Image.png
Description
Biogenic silica nanostructures, derived from diatoms, possess highly ordered porous hierarchical nanostructures and afford flexibility in design in large part due to the availability of a great variety of shapes, sizes, and symmetries. These advantages have been exploited for study of transport phenomena of ions and molecules towards the goal

Biogenic silica nanostructures, derived from diatoms, possess highly ordered porous hierarchical nanostructures and afford flexibility in design in large part due to the availability of a great variety of shapes, sizes, and symmetries. These advantages have been exploited for study of transport phenomena of ions and molecules towards the goal of developing ultrasensitive and selective filters and biosensors. Diatom frustules give researchers many inspiration and ideas for the design and production of novel nanostructured materials. In this doctoral research will focus on the following three aspects of biogenic silica: 1) Using diatom frustule as protein sensor. 2) Using diatom nanostructures as template to fabricate nano metal materials. 3) Using diatom nanostructures to fabricate hybrid platform.

Nanoscale confinement biogenetic silica template-based electrical biosensor assay offers the user the ability to detect and quantify the biomolecules. Diatoms have been demonstrated as part of a sensor. The sensor works on the principle of electrochemical impedance spectroscopy. When specific protein biomarkers from a test sample bind to corresponding antibodies conjugated to the surface of the gold surface at the base of each nanowell, a perturbation of electrical double layer occurs resulting in a change in the impedance.

Diatoms are also a new source of inspiration for the design and fabrication of nanostructured materials. Template-directed deposition within cylindrical nanopores of a porous membrane represents an attractive and reproducible approach for preparing metal nanopatterns or nanorods of a variety of aspect ratios. The nanopatterns fabricated from diatom have the potential of the metal-enhanced fluorescence to detect dye-conjugated molecules.

Another approach presents a platform integrating biogenic silica nanostructures with micromachined silicon substrates in a micro
ano hybrid device. In this study, one can take advantages of the unique properties of a marine diatom that exhibits nanopores on the order of 40 nm in diameter and a hierarchical structure. This device can be used to several applications, such as nano particles separation and detection. This platform is also a good substrate to study cell growth that one can observe the reaction of cell growing on the nanostructure of frustule.
ContributorsLin, Kai-Chun (Author) / Ramakrishna, B.L. (Thesis advisor) / Goryll, Michael (Thesis advisor) / Dey, Sandwip (Committee member) / Prasad, Shalini (Committee member) / Arizona State University (Publisher)
Created2014
154176-Thumbnail Image.png
Description
Programmable metallization cell (PMC) technology employs the mechanisms of metal ion transport in solid electrolytes (SE) and electrochemical redox reactions in order to form metallic electrodeposits. When a positive bias is applied to an anode opposite to a cathode, atoms at the anode are oxidized to ions and dissolve into

Programmable metallization cell (PMC) technology employs the mechanisms of metal ion transport in solid electrolytes (SE) and electrochemical redox reactions in order to form metallic electrodeposits. When a positive bias is applied to an anode opposite to a cathode, atoms at the anode are oxidized to ions and dissolve into the SE. Under the influence of the electric field, the ions move to the cathode and become reduced to form the electrodeposits. These electrodeposits are filamentary in nature and persistent, and since they are metallic can alter the physical characteristics of the material on which they are formed. PMCs can be used as next generation memories, radio frequency (RF) switches and physical unclonable functions (PUFs).

The morphology of the filaments is impacted by the biasing conditions. Under a relatively high applied electric field, they form as dendritic elements with a low fractal dimension (FD), whereas a low electric field leads to high FD features. Ion depletion effects in the SE due to low ion diffusivity/mobility also influences the morphology by limiting the ion supply into the growing electrodeposit.

Ion transport in SE is due to hopping transitions driven by drift and diffusion force. A physical model of ion hopping with Brownian motion has been proposed, in which the ion transitions are random when time window is larger than characteristic time. The random growth process of filaments in PMC adds entropy to the electrodeposition, which leads to random features in the dendritic patterns. Such patterns has extremely high information capacity due to the fractal nature of the electrodeposits.

In this project, lateral-growth PMCs were fabricated, whose LRS resistance is less than 10Ω, which can be used as RF switches. Also, an array of radial-growth PMCs was fabricated, on which multiple dendrites, all with different shapes, could be grown simultaneously. Those patterns can be used as secure keys in PUFs and authentication can be performed by optical scanning.

A kinetic Monte Carlo (KMC) model is developed to simulate the ion transportation in SE under electric field. The simulation results matched experimental data well that validated the ion hopping model.
ContributorsYu, Weijie (Author) / Kozicki, Michael N (Thesis advisor) / Barnaby, Hugh (Thesis advisor) / Diaz, Rodolfo (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2015
156467-Thumbnail Image.png
Description
The hierarchical silica structure of the Coscinodiscus wailesii diatom was studied due to its intriguing optical properties. To bring the diatom into light harvesting applications, three crucial factors were investigated, including closely-packed diatom monolayer formation, bonding of the diatoms on a substrate, and conversion of silica diatom shells into silicon.

The hierarchical silica structure of the Coscinodiscus wailesii diatom was studied due to its intriguing optical properties. To bring the diatom into light harvesting applications, three crucial factors were investigated, including closely-packed diatom monolayer formation, bonding of the diatoms on a substrate, and conversion of silica diatom shells into silicon.

The closely-packed monolayer formation of diatom valves on silicon substrates was accomplished using their hydrodynamic properties and the surface tension of water. Valves dispersed on a hydrophobic surface were able to float-up with a preferential orientation (convex side facing the water surface) when water was added. The floating diatom monolayer was subsequently transferred to a silicon substrate. A closely-packed diatom monolayer on the silicon substrate was obtained after the water evaporated at room temperature.

The diatom monolayer was then directly bonded onto the substrate via a sintering process at high temperature in air. The percentage of bonded valves increased as the temperature increased. The valves started to sinter into the substrate at 1100°C. The sintering process caused shrinkage of the nanopores at temperatures above 1100°C. The more delicate structure was more sensitive to the elevated temperature. The cribellum, the most intricate nanostructure of the diatom (~50 nm), disappeared at 1125°C. The cribrum, consisting of approximated 100-300 nm diameter pores, disappeared at 1150°C. The areola, the micro-chamber-liked structure, can survive up to 1150°C. At 1200°C, the complete nanostructure was destroyed. In addition, cross-section images revealed that the valves fused into the thermally-grown oxide layer that was generated on the substrate at high temperatures.

The silica-sintered diatom close-packed monolayer, processed at 1125°C, was magnesiothermically converted into porous silicon using magnesium silicide. X-ray diffraction, infrared absorption, energy dispersive X-say spectra and secondary electron images confirmed the formation of a Si layer with preserved diatom nano-microstructure. The conversion process and subsequent application of a PEDOT:PSS coating both decreased the light reflection from the sample. The photocurrent and reflectance spectra revealed that the Si-diatom dominantly enhanced light absorption between 414 to 586 nm and 730 to 800 nm. Though some of the structural features disappeared during the sintering process, the diatom is still able to improve light absorption. Therefore, the sintering process can be used for diatom direct bonding in light harvesting applications.
ContributorsRojsatien, Srisuda (Author) / Goryll, Michael (Thesis advisor) / Alford, Terry (Thesis advisor) / Theodore, David (Committee member) / Arizona State University (Publisher)
Created2018