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Description
Electromigration in metal interconnects is the most pernicious failure mechanism in semiconductor integrated circuits (ICs). Early electromigration investigations were primarily focused on aluminum interconnects for silicon-based ICs. An alternative metallization compatible with gallium arsenide (GaAs) was required in the development of high-powered radio frequency (RF) compound semiconductor devices operating at

Electromigration in metal interconnects is the most pernicious failure mechanism in semiconductor integrated circuits (ICs). Early electromigration investigations were primarily focused on aluminum interconnects for silicon-based ICs. An alternative metallization compatible with gallium arsenide (GaAs) was required in the development of high-powered radio frequency (RF) compound semiconductor devices operating at higher current densities and elevated temperatures. Gold-based metallization was implemented on GaAs devices because it uniquely forms a very low resistance ohmic contact and gold interconnects have superior electrical and thermal conductivity properties. Gold (Au) was also believed to have improved resistance to electromigration due to its higher melting temperature, yet electromigration reliability data on passivated Au interconnects is scarce and inadequate in the literature. Therefore, the objective of this research was to characterize the electromigration lifetimes of passivated Au interconnects under precisely controlled stress conditions with statistically relevant quantities to obtain accurate model parameters essential for extrapolation to normal operational conditions. This research objective was accomplished through measurement of electromigration lifetimes of large quantities of passivated electroplated Au interconnects utilizing high-resolution in-situ resistance monitoring equipment. Application of moderate accelerated stress conditions with a current density limited to 2 MA/cm2 and oven temperatures in the range of 300°C to 375°C avoided electrical overstress and severe Joule-heated temperature gradients. Temperature coefficients of resistance (TCRs) were measured to determine accurate Joule-heated Au interconnect film temperatures. A failure criterion of 50% resistance degradation was selected to prevent thermal runaway and catastrophic metal ruptures that are problematic of open circuit failure tests. Test structure design was optimized to reduce resistance variation and facilitate failure analysis. Characterization of the Au microstructure yielded a median grain size of 0.91 ìm. All Au lifetime distributions followed log-normal distributions and Black's model was found to be applicable. An activation energy of 0.80 ± 0.05 eV was measured from constant current electromigration tests at multiple temperatures. A current density exponent of 1.91 was extracted from multiple current densities at a constant temperature. Electromigration-induced void morphology along with these model parameters indicated grain boundary diffusion is dominant and the void nucleation mechanism controlled the failure time.
ContributorsKilgore, Stephen (Author) / Adams, James (Thesis advisor) / Schroder, Dieter (Thesis advisor) / Krause, Stephen (Committee member) / Gaw, Craig (Committee member) / Arizona State University (Publisher)
Created2013
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Description
Amorphous oxide semiconductors are promising new materials for various optoelectronic applications. In this study, improved electrical and optical properties upon thermal and microwave processing of mixed-oxide semiconductors are reported. First, arsenic-doped silicon was used as a model system to understand susceptor-assisted microwave annealing. Mixed oxide semiconductor films of indium zinc

Amorphous oxide semiconductors are promising new materials for various optoelectronic applications. In this study, improved electrical and optical properties upon thermal and microwave processing of mixed-oxide semiconductors are reported. First, arsenic-doped silicon was used as a model system to understand susceptor-assisted microwave annealing. Mixed oxide semiconductor films of indium zinc oxide (IZO) and indium gallium zinc oxide (IGZO) were deposited by room-temperature RF sputtering on flexible polymer substrates. Thermal annealing in different environments - air, vacuum and oxygen was done. Electrical and optical characterization was carried out before and after annealing. The degree of reversal in the degradation in electrical properties of the thin films upon annealing in oxygen was assessed by subjecting samples to subsequent vacuum anneals. To further increase the conductivity of the IGZO films, Ag layers of various thicknesses were embedded between two IGZO layers. Optical performance of the multilayer structures was improved by susceptor-assisted microwave annealing and furnace-annealing in oxygen environment without compromising on their electrical conductivity. The post-processing of the films in different environments was used to develop an understanding of mechanisms of carrier generation, transport and optical absorption. This study establishes IGZO as a viable transparent conductor, which can be deposited at room-temperature and processed by thermal and microwave annealing to improve electrical and optical performance for applications in flexible electronics and optoelectronics.
ContributorsGadre, Mandar (Author) / Alford, Terry L. (Thesis advisor) / Schroder, Dieter (Committee member) / Krause, Stephen (Committee member) / Theodore, David (Committee member) / Arizona State University (Publisher)
Created2011
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Description
The object of this study is to investigate and improve the performance/stability of the flexible thin film transistors (TFTs) and to study the properties of metal oxide transparent conductive oxides for wide range of flexible electronic applications. Initially, a study has been done to improve the conductivity of ITO (indium

The object of this study is to investigate and improve the performance/stability of the flexible thin film transistors (TFTs) and to study the properties of metal oxide transparent conductive oxides for wide range of flexible electronic applications. Initially, a study has been done to improve the conductivity of ITO (indium tin oxide) films on PEN (polyethylene naphthalate) by inserting a thin layer of silver layer between two ITO layers. The multilayer with an optimum Ag mid-layer thickness, of 8 nm, exhibited excellent photopic average transmittance (~ 88 %), resistivity (~ 2.7 × 10-5 µ-cm.) and has the best Hackee figure of merit (41.0 × 10-3 Ω-1). The electrical conduction is dominated by two different scattering mechanisms depending on the thickness of the Ag mid-layer. Optical transmission is explained by scattering losses and absorption of light due to inter-band electronic transitions. A systematic study was carried out to improve the performance/stability of the TFTs on PEN. The performance and stability of a-Si:H and a-IZO (amorphous indium zinc oxide) TFTs were improved by performing a systematic low temperature (150 °C) anneals for extended times. For 96 hours annealed a-Si:H TFTs, the sub-threshold slope and off-current were reduced by a factor ~ 3 and by 2 orders of magnitude, respectively when compared to unannealed a-Si:H TFTs. For a-IZO TFTs, 48 hours of annealing is found to be the optimum time for the best performance and elevated temperature stability. These devices exhibit saturation mobility varying between 4.5-5.5 cm2/V-s, ION/IOFF ratio was 106 and a sub-threshold swing variation of 1-1.25 V/decade. An in-depth study on the mechanical and electromechanical stress response on the electrical properties of the a-IZO TFTs has also been investigated. Finally, the a-Si:H TFTs were exposed to gamma radiation to examine their radiation resistance. The interface trap density (Nit) values range from 5 to 6 × 1011 cm-2 for only electrical stress bias case. For "irradiation only" case, the Nit value increases from 5×1011 cm-2 to 2×1012 cm-2 after 3 hours of gamma radiation exposure, whereas it increases from 5×1011 cm-2 to 4×1012 cm-2 for "combined gamma and electrical stress".
ContributorsIndluru, Anil (Author) / Alford, Terry L. (Thesis advisor) / Schroder, Dieter (Committee member) / Krause, Stephen (Committee member) / Theodore, David (Committee member) / Arizona State University (Publisher)
Created2011
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Description
As the world energy demand increases, semiconductor devices with high energy conversion efficiency become more and more desirable. The energy conversion consists of two distinct processes, namely energy generation and usage. In this dissertation, novel multi-junction solar cells and light emitting diodes (LEDs) are proposed and studied for

As the world energy demand increases, semiconductor devices with high energy conversion efficiency become more and more desirable. The energy conversion consists of two distinct processes, namely energy generation and usage. In this dissertation, novel multi-junction solar cells and light emitting diodes (LEDs) are proposed and studied for high energy conversion efficiency in both processes, respectively. The first half of this dissertation discusses the practically achievable energy conversion efficiency limit of solar cells. Since the demonstration of the Si solar cell in 1954, the performance of solar cells has been improved tremendously and recently reached 41.6% energy conversion efficiency. However, it seems rather challenging to further increase the solar cell efficiency. The state-of-the-art triple junction solar cells are analyzed to help understand the limiting factors. To address these issues, the monolithically integrated II-VI and III-V material system is proposed for solar cell applications. This material system covers the entire solar spectrum with a continuous selection of energy bandgaps and can be grown lattice matched on a GaSb substrate. Moreover, six four-junction solar cells are designed for AM0 and AM1.5D solar spectra based on this material system, and new design rules are proposed. The achievable conversion efficiencies for these designs are calculated using the commercial software package Silvaco with real material parameters. The second half of this dissertation studies the semiconductor luminescence refrigeration, which corresponds to over 100% energy usage efficiency. Although cooling has been realized in rare-earth doped glass by laser pumping, semiconductor based cooling is yet to be realized. In this work, a device structure that monolithically integrates a GaAs hemisphere with an InGaAs/GaAs quantum-well thin slab LED is proposed to realize cooling in semiconductor. The device electrical and optical performance is calculated. The proposed device then is fabricated using nine times photolithography and eight masks. The critical process steps, such as photoresist reflow and dry etch, are simulated to insure successful processing. Optical testing is done with the devices at various laser injection levels and the internal quantum efficiency, external quantum efficiency and extraction efficiency are measured.
ContributorsWu, Songnan (Author) / Zhang, Yong-Hang (Thesis advisor) / Menéndez, Jose (Committee member) / Ponce, Fernando (Committee member) / Belitsky, Andrei (Committee member) / Schroder, Dieter (Committee member) / Arizona State University (Publisher)
Created2010