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- Genre: Doctoral Dissertation
- All Subjects: Materials Science
- All Subjects: Coding theory
- All Subjects: Characterization
- Member of: ASU Electronic Theses and Dissertations
Description
There are many wireless communication and networking applications that require high transmission rates and reliability with only limited resources in terms of bandwidth, power, hardware complexity etc.. Real-time video streaming, gaming and social networking are a few such examples. Over the years many problems have been addressed towards the goal of enabling such applications; however, significant challenges still remain, particularly, in the context of multi-user communications. With the motivation of addressing some of these challenges, the main focus of this dissertation is the design and analysis of capacity approaching coding schemes for several (wireless) multi-user communication scenarios. Specifically, three main themes are studied: superposition coding over broadcast channels, practical coding for binary-input binary-output broadcast channels, and signalling schemes for two-way relay channels. As the first contribution, we propose an analytical tool that allows for reliable comparison of different practical codes and decoding strategies over degraded broadcast channels, even for very low error rates for which simulations are impractical. The second contribution deals with binary-input binary-output degraded broadcast channels, for which an optimal encoding scheme that achieves the capacity boundary is found, and a practical coding scheme is given by concatenation of an outer low density parity check code and an inner (non-linear) mapper that induces desired distribution of "one" in a codeword. The third contribution considers two-way relay channels where the information exchange between two nodes takes place in two transmission phases using a coding scheme called physical-layer network coding. At the relay, a near optimal decoding strategy is derived using a list decoding algorithm, and an approximation is obtained by a joint decoding approach. For the latter scheme, an analytical approximation of the word error rate based on a union bounding technique is computed under the assumption that linear codes are employed at the two nodes exchanging data. Further, when the wireless channel is frequency selective, two decoding strategies at the relay are developed, namely, a near optimal decoding scheme implemented using list decoding, and a reduced complexity detection/decoding scheme utilizing a linear minimum mean squared error based detector followed by a network coded sequence decoder.
ContributorsBhat, Uttam (Author) / Duman, Tolga M. (Thesis advisor) / Tepedelenlioğlu, Cihan (Committee member) / Li, Baoxin (Committee member) / Zhang, Junshan (Committee member) / Arizona State University (Publisher)
Created2011
Description
Insertion and deletion errors represent an important category of channel impairments. Despite their importance and much work over the years, channels with such impairments are far from being fully understood as they proved to be difficult to analyze. In this dissertation, a promising coding scheme is investigated over independent and identically distributed (i.i.d.) insertion/deletion channels, i.e., interleaved concatenation of an outer low-density parity-check (LDPC) code with error-correction capabilities and an inner marker code for synchronization purposes. Marker code structures which offer the highest achievable rates are found with standard bit-level synchronization is performed. Then, to exploit the correlations in the likelihoods corresponding to different transmitted bits, a novel symbol-level synchronization algorithm that works on groups of consecutive bits is introduced. Extrinsic information transfer (EXIT) charts are also utilized to analyze the convergence behavior of the receiver, and to design LDPC codes with degree distributions matched to these channels. The next focus is on segmented deletion channels. It is first shown that such channels are information stable, and hence their channel capacity exists. Several upper and lower bounds are then introduced in an attempt to understand the channel capacity behavior. The asymptotic behavior of the channel capacity is also quantified when the average bit deletion rate is small. Further, maximum-a-posteriori (MAP) based synchronization algorithms are developed and specific LDPC codes are designed to match the channel characteristics. Finally, in addition to binary substitution errors, coding schemes and the corresponding detection algorithms are also studied for several other models with synchronization errors, including inter-symbol interference (ISI) channels, channels with multiple transmit/receive elements and multi-user communication systems.
ContributorsWang, Feng (Author) / Duman, Tolga M. (Thesis advisor) / Tepedelenlioğlu, Cihan (Committee member) / Reisslein, Martin (Committee member) / Zhang, Junshan (Committee member) / Arizona State University (Publisher)
Created2012
Description
This research emphasizes the use of low energy and low temperature post processing to improve the performance and lifetime of thin films and thin film transistors, by applying the fundamentals of interaction of materials with conductive heating and electromagnetic radiation. Single frequency microwave anneal is used to rapidly recrystallize the damage induced during ion implantation in Si substrates. Volumetric heating of the sample in the presence of the microwave field facilitates quick absorption of radiation to promote recrystallization at the amorphous-crystalline interface, apart from electrical activation of the dopants due to relocation to the substitutional sites. Structural and electrical characterization confirm recrystallization of heavily implanted Si within 40 seconds anneal time with minimum dopant diffusion compared to rapid thermal annealed samples. The use of microwave anneal to improve performance of multilayer thin film devices, e.g. thin film transistors (TFTs) requires extensive study of interaction of individual layers with electromagnetic radiation. This issue has been addressed by developing detail understanding of thin films and interfaces in TFTs by studying reliability and failure mechanisms upon extensive stress test. Electrical and ambient stresses such as illumination, thermal, and mechanical stresses are inflicted on the mixed oxide based thin film transistors, which are explored due to high mobilities of the mixed oxide (indium zinc oxide, indium gallium zinc oxide) channel layer material. Semiconductor parameter analyzer is employed to extract transfer characteristics, useful to derive mobility, subthreshold, and threshold voltage parameters of the transistors. Low temperature post processing anneals compatible with polymer substrates are performed in several ambients (oxygen, forming gas and vacuum) at 150 °C as a preliminary step. The analysis of the results pre and post low temperature anneals using device physics fundamentals assists in categorizing defects leading to failure/degradation as: oxygen vacancies, thermally activated defects within the bandgap, channel-dielectric interface defects, and acceptor-like or donor-like trap states. Microwave anneal has been confirmed to enhance the quality of thin films, however future work entails extending the use of electromagnetic radiation in controlled ambient to facilitate quick post fabrication anneal to improve the functionality and lifetime of these low temperature fabricated TFTs.
ContributorsVemuri, Rajitha (Author) / Alford, Terry L. (Thesis advisor) / Theodore, N David (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
In-field characterization of photovoltaics is crucial to understanding performance and degradation mechanisms, subsequently improving overall reliability and lifespans. Current outdoor characterization is often limited by logistical difficulties, variable weather, and requirements to measure during peak production hours. It becomes a challenge to find a characterization technique that is affordable with a low impact on system performance while still providing useful device parameters. For added complexity, this characterization technique must have the ability to scale for implementation in large powerplant applications. This dissertation addresses some of the challenges of outdoor characterization by expanding the knowledge of a well-known indoor technique referred to as Suns-VOC. Suns-VOC provides a pseudo current-voltage curve that is free of any effects from series resistance. Device parameters can be extracted from this pseudo I-V curve, allowing for subsequent degradation analysis. This work introduces how to use Suns-VOC outdoors while normalizing results based on the different effects of environmental conditions. This technique is validated on single-cells, modules, and small arrays with accuracies capable of measuring yearly degradation. An adaptation to Suns-VOC, referred to as Suns-Voltage-Resistor (Suns-VR), is also introduced to complement the results from Suns-VOC. This work can potentially be used to provide a diagnostic tool for outdoor characterization in various applications, including residential, commercial, and industrial PV systems.
ContributorsKillam, Alexander Cameron (Author) / Bowden, Stuart G (Thesis advisor) / Goryll, Michael (Committee member) / Augusto, Andre (Committee member) / Rand, James (Committee member) / Arizona State University (Publisher)
Created2022
Description
Highly reflective back surfaces are critical for reaching the detailed balance efficiency limits of photovoltaics. In addition to being highly reflective, the back surface and contact of the cell must have low resistance. A traditional approach to balance reflectance and contact resistance has been to use point contact geometries, which are process intensive. This work considers using a transparent conductive oxide and metal mirror, which, due to being two planar layers, can be fabricated much more easily. To study the tradeoff between resistance and absorptance for this contact, the oxide doping concentration is varied. Test structures to measure the doping concentration, contact resistance, and parasitic absorptance were fabricated. Using measured parameters, the performance of high-quality GaAs photonic power converters is modeled. Measurements show that although the contact resistance is comparatively high, it can be controlled through doping in the oxide and semiconductor composition. Furthermore, modeling shows the contact resistance is not prohibitively high for one-sun or lower illumination level devices. The hemispheric reflectance of the experimental oxide/metal back contact is modeled to be 96.7%, which is quite high considering that it is a conductive back contact. Although the oxide/metal contact structure does not perform electrically or optically as well as more complex point contact structures, this work indicates the advantages of the planar transparent conductive oxide/metal contact structure near one-sun equivalent current densities for solar cells and photonic power converters, where it is desirable to avoid the device fabrication costs of back contact patterning.
ContributorsGregory, Christopher Thomas (Author) / King, Richard R (Thesis advisor) / Goryll, Michael (Committee member) / Rolston, Nicholas (Committee member) / Alford, Terry (Committee member) / Arizona State University (Publisher)
Created2024
Description
The silicon-based solar cell has been extensively deployed in photovoltaic industry and plays an important role in renewable energy industries. A more energy-efficient, environment-harmless and eco-friendly silicon production technique is required for price-competitive solar energy harvesting. Silicon electrorefining in molten salt is promising for the ultrapure solar-grade Si production. To avoid using highly corrosive fluoride salt, CaCl2-based salt is widely employed for silicon electroreduction. For Si electroreduction in CaCl2-based salt, CaO is usually added to enhance the solubility of SiO2. However, the existence of oxygen in molten salt could result in system corrosion, anode passivation and the co-deposition of secondary phases such as CaSiO3 and SiO2 at the cathode. This research focuses on the development of reusable oxygen-free CaCl2-based molten salt for solar-grade silicon electrorefining. A new multi-potential electropurification process has been proposed and proven to be more effective in impurities removal. The as-received salt and the salt after electrorefining have been electropurified. The inductively-coupled plasma mass spectrometry and cyclic voltammetry have been utilized to determine the impurities removal of electropurification. The salt after silicon electrorefining has been regenerated to its original purity level before by the multi-potential electropurification process, demonstrating the feasibility of a reusable salt by electropurification. In an oxygen-free CaCl2-based salt without silicon precursor, the silicon dissolved from the silicon anode can be successfully deposited at the cathode. The silicon anode has been operated for more than 50 hours without passivation in the oxygen-free system. Silicon ions start to be deposited after 0.17 g of silicon has been dissolved into the salt from the silicon anode. A 180 µm deposit with a silver-luster surface was obtained at the cathode. The main impurities in the silicon anode such as aluminum, iron and titanium were not found in the silicon deposits. No oxygen-containing secondary phases are detected in the silicon deposits. These results confirm the feasibility of silicon electrorefining in the oxygen-free CaCl2-based salt.
ContributorsTseng, Mao-Feng (Author) / Tao, Meng (Thesis advisor) / Kannan, Arunachala Mada (Committee member) / Mu, Linqin (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2023
Description
Photovoltaics (PV) is one of the promising options for maintaining sustainable energy supply because it is environmentally friendly, a non-polluting and low-maintenance energy source. Despite the many advantages of PV, solar energy currently accounts for only 1% of the global energy portfolio for electricity generation. This is because the cost of electricity from PV remains about a factor of two higher than the fossil fuel (10¢/kWh). Widely-used commercial methods employed to generate PV energy, such as silicon or thin film-based technologies, are still expensive as they are processed through vacuum-based techniques. Therefore, it is desirable to find an alternative method that is open-air and continuous process for the mass production of solar cells.
The objective of the research in this thesis is to develop low-cost spray pyrolysis technique to synthesize oxides thin films for applications in solar cells. Chapter 4 and 5 discuss spray-deposited dielectric oxides for their applications in Si solar cells. In Chapter 4, a successful deposition of Al2O3 is demonstrated using water as the solvent which ensures a lower cost and safer process environment. Optical, electrical, and structural properties of spray-deposited Al2O3 are investigated and compared to the industrial standard Atomic Layer Deposition (ALD) Al2O3/Plasma Enhanced Chemical Vapor Deposition (PECVD) SiNx stack, to reveal the suitability of spray-deposited Al2O3 for rear passivation and optical trapping in p-type Si Passivated Emitter and Rear Cell (PERC) solar cells. In Chapter 5, The possibility of using low-cost spray-deposited ZrO2 as the antireflection coating for Si solar cells is investigated. Optical, electrical and structural properties of spray-deposited ZrO2 films are studied and compared to the industrial standard antireflection coating PECVD SiNx. In Chapter 6, spray-deposited hematite Fe2O3 and sol-gel prepared anatase TiO2 thin films are sulfurized by annealing in H2S to investigate the band gap narrowing by sulfur doping and explore the possibility of using ternary semiconductors for their application as solar absorbers.
The objective of the research in this thesis is to develop low-cost spray pyrolysis technique to synthesize oxides thin films for applications in solar cells. Chapter 4 and 5 discuss spray-deposited dielectric oxides for their applications in Si solar cells. In Chapter 4, a successful deposition of Al2O3 is demonstrated using water as the solvent which ensures a lower cost and safer process environment. Optical, electrical, and structural properties of spray-deposited Al2O3 are investigated and compared to the industrial standard Atomic Layer Deposition (ALD) Al2O3/Plasma Enhanced Chemical Vapor Deposition (PECVD) SiNx stack, to reveal the suitability of spray-deposited Al2O3 for rear passivation and optical trapping in p-type Si Passivated Emitter and Rear Cell (PERC) solar cells. In Chapter 5, The possibility of using low-cost spray-deposited ZrO2 as the antireflection coating for Si solar cells is investigated. Optical, electrical and structural properties of spray-deposited ZrO2 films are studied and compared to the industrial standard antireflection coating PECVD SiNx. In Chapter 6, spray-deposited hematite Fe2O3 and sol-gel prepared anatase TiO2 thin films are sulfurized by annealing in H2S to investigate the band gap narrowing by sulfur doping and explore the possibility of using ternary semiconductors for their application as solar absorbers.
ContributorsShin, Woo Jung (Author) / Tao, Meng (Thesis advisor) / Goryll, Michael (Committee member) / Wang, Qing Hua (Committee member) / Arizona State University (Publisher)
Created2019
Description
Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.
ContributorsKao, Wei-Chieh (Author) / Goryll, Michael (Thesis advisor) / Chowdhury, Srabanti (Committee member) / Yu, Hongbin (Committee member) / Marinella, Matthew (Committee member) / Arizona State University (Publisher)
Created2015
Description
This work demonstrates novel nBn photodetectors including mid-wave infrared (MWIR) nBn photodetectors based on InAs/InAsSb type-II superlattices (T2SLs) with charge as the output signal, and visible nBn photodetectors based on CdTe with current output. Furthermore, visible/MWIR two-color photodetectors (2CPDs) are fabricated through monolithic integration of the CdTe nBn photodetector and an InSb photodiode.
The MWIR nBn photodetectors have a potential well for holes present in the barrier layer. At low voltages of < −0.2 V, which ensure low dark current <10-5 A/cm2 at 77 K, photogenerated holes are collected in this well with a storage lifetime of 40 s. This charge collection process is an in-device signal integration process that reduces the random noise significantly. Since the stored holes can be readout laterally as in charge-coupled devices, it is therefore possible to make charge-output nBn with much lower noise than conventional current-output nBn photodetectors.
The visible nBn photodetectors have a CdTe absorber layer and a ZnTe barrier layer with an aligned valence band edge. By using a novel ITO/undoped-CdTe top contact design, it has achieved a high specific detectivity of 3×1013 cm-Hz1/2/W at room temperature. Particularly, this CdTe nBn photodetector grown on InSb substrates enables the monolithic integration of CdTe and InSb photodetectors, and provides a platform to study in-depth device physics of nBn photodetectors at room temperature.
Furthermore, the visible/MWIR 2CPD has been developed by the monolithic integration of the CdTe nBn and an InSb photodiode through an n-CdTe/p-InSb tunnel junction. At 77 K, the photoresponse of the 2CPD can be switched between a 1-5.5 μm MWIR band and a 350-780 nm visible band by illuminating the device with an external light source or not, and applying with proper voltages. Under optimum conditions, the 2CPD has achieved a MWIR peak responsivity of 0.75 A/W with a band rejection ratio (BRR) of 52 dB, and a visible peak responsivity of 0.3 A/W with a BRR of 18 dB. This 2CPD has enabled future compact image sensors with high fill-factor and responsivity switchable between visible and MWIR colors.
The MWIR nBn photodetectors have a potential well for holes present in the barrier layer. At low voltages of < −0.2 V, which ensure low dark current <10-5 A/cm2 at 77 K, photogenerated holes are collected in this well with a storage lifetime of 40 s. This charge collection process is an in-device signal integration process that reduces the random noise significantly. Since the stored holes can be readout laterally as in charge-coupled devices, it is therefore possible to make charge-output nBn with much lower noise than conventional current-output nBn photodetectors.
The visible nBn photodetectors have a CdTe absorber layer and a ZnTe barrier layer with an aligned valence band edge. By using a novel ITO/undoped-CdTe top contact design, it has achieved a high specific detectivity of 3×1013 cm-Hz1/2/W at room temperature. Particularly, this CdTe nBn photodetector grown on InSb substrates enables the monolithic integration of CdTe and InSb photodetectors, and provides a platform to study in-depth device physics of nBn photodetectors at room temperature.
Furthermore, the visible/MWIR 2CPD has been developed by the monolithic integration of the CdTe nBn and an InSb photodiode through an n-CdTe/p-InSb tunnel junction. At 77 K, the photoresponse of the 2CPD can be switched between a 1-5.5 μm MWIR band and a 350-780 nm visible band by illuminating the device with an external light source or not, and applying with proper voltages. Under optimum conditions, the 2CPD has achieved a MWIR peak responsivity of 0.75 A/W with a band rejection ratio (BRR) of 52 dB, and a visible peak responsivity of 0.3 A/W with a BRR of 18 dB. This 2CPD has enabled future compact image sensors with high fill-factor and responsivity switchable between visible and MWIR colors.
ContributorsHe, Zhaoyu (Author) / Zhang, Yong-Hang (Thesis advisor) / Vasileska, Dragica (Committee member) / Goryll, Michael (Committee member) / Johnson, Shane (Committee member) / Arizona State University (Publisher)
Created2016
Description
InAs/InAsSb type-II superlattices (T2SLs) can be considered as potential alternatives for conventional HgCdTe photodetectors due to improved uniformity, lower manufacturing costs with larger substrates, and possibly better device performance. This dissertation presents a comprehensive study on the structural, optical and electrical properties of InAs/InAsSb T2SLs grown by Molecular Beam Epitaxy.
The effects of different growth conditions on the structural quality were thoroughly investigated. Lattice-matched condition was successfully achieved and material of exceptional quality was demonstrated.
After growth optimization had been achieved, structural defects could hardly be detected, so different characterization techniques, including etch-pit-density (EPD) measurements, cathodoluminescence (CL) imaging and X-ray topography (XRT), were explored, in attempting to gain better knowledge of the sparsely distributed defects. EPD revealed the distribution of dislocation-associated pits across the wafer. Unfortunately, the lack of contrast in images obtained by CL imaging and XRT indicated their inability to provide any quantitative information about defect density in these InAs/InAsSb T2SLs.
The nBn photodetectors based on mid-wave infrared (MWIR) and long-wave infrared (LWIR) InAs/InAsSb T2SLs were fabricated. The significant difference in Ga composition in the barrier layer coupled with different dark current behavior, suggested the possibility of different types of band alignment between the barrier layers and the absorbers. A positive charge density of 1.8 × 1017/cm3 in the barrier of MWIR nBn photodetector, as determined by electron holography, confirmed the presence of a potential well in its valence band, thus identifying type-II alignment. In contrast, the LWIR nBn photodetector was shown to have type-I alignment because no sign of positive charge was detected in its barrier.
Capacitance-voltage measurements were performed to investigate the temperature dependence of carrier densities in a metal-oxide-semiconductor (MOS) structure based on MWIR InAs/InAsSb T2SLs, and a nBn structure based on LWIR InAs/InAsSb T2SLs. No carrier freeze-out was observed in either sample, indicating very shallow donor levels. The decrease in carrier density when temperature increased was attributed to the increased density of holes that had been thermally excited from localized states near the oxide/semiconductor interface in the MOS sample. No deep-level traps were revealed in deep-level transient spectroscopy temperature scans.
The effects of different growth conditions on the structural quality were thoroughly investigated. Lattice-matched condition was successfully achieved and material of exceptional quality was demonstrated.
After growth optimization had been achieved, structural defects could hardly be detected, so different characterization techniques, including etch-pit-density (EPD) measurements, cathodoluminescence (CL) imaging and X-ray topography (XRT), were explored, in attempting to gain better knowledge of the sparsely distributed defects. EPD revealed the distribution of dislocation-associated pits across the wafer. Unfortunately, the lack of contrast in images obtained by CL imaging and XRT indicated their inability to provide any quantitative information about defect density in these InAs/InAsSb T2SLs.
The nBn photodetectors based on mid-wave infrared (MWIR) and long-wave infrared (LWIR) InAs/InAsSb T2SLs were fabricated. The significant difference in Ga composition in the barrier layer coupled with different dark current behavior, suggested the possibility of different types of band alignment between the barrier layers and the absorbers. A positive charge density of 1.8 × 1017/cm3 in the barrier of MWIR nBn photodetector, as determined by electron holography, confirmed the presence of a potential well in its valence band, thus identifying type-II alignment. In contrast, the LWIR nBn photodetector was shown to have type-I alignment because no sign of positive charge was detected in its barrier.
Capacitance-voltage measurements were performed to investigate the temperature dependence of carrier densities in a metal-oxide-semiconductor (MOS) structure based on MWIR InAs/InAsSb T2SLs, and a nBn structure based on LWIR InAs/InAsSb T2SLs. No carrier freeze-out was observed in either sample, indicating very shallow donor levels. The decrease in carrier density when temperature increased was attributed to the increased density of holes that had been thermally excited from localized states near the oxide/semiconductor interface in the MOS sample. No deep-level traps were revealed in deep-level transient spectroscopy temperature scans.
ContributorsShen, Xiaomeng (Author) / Zhang, Yong-Hang (Thesis advisor) / Smith, David J. (Thesis advisor) / Alford, Terry (Committee member) / Goryll, Michael (Committee member) / Mccartney, Martha R (Committee member) / Arizona State University (Publisher)
Created2015