Matching Items (2)
Filtering by
- All Subjects: Biomedical Engineering
- All Subjects: cost effective integration
- Genre: Masters Thesis
Description
In this thesis, I present a lab-on-a-chip (LOC) that can separate and detect Escherichia Coli (E. coli) in simulated urine samples for Urinary Tract Infection (UTI) diagnosis. The LOC consists of two (concentration and sensing) chambers connected in series and an integrated impedance detector. The two-chamber approach is designed to reduce the non-specific absorption of proteins, e.g. albumin, that potentially co-exist with E. coli in urine. I directly separate E. coli K-12 from a urine cocktail in a concentration chamber containing micro-sized magnetic beads (5 µm in diameter) conjugated with anti-E. coli antibodies. The immobilized E. coli are transferred to a sensing chamber for the impedance measurement. The measurement at the concentration chamber suffers from non-specific absorption of albumin on the gold electrode, which may lead to a false positive response. By contrast, the measured impedance at the sensing chamber shows ~60 kÙ impedance change between 6.4x104 and 6.4x105 CFU/mL, covering the threshold of UTI (105 CFU/mL). The sensitivity of the LOC for detecting E. coli is characterized to be at least 3.4x104 CFU/mL. I also characterized the LOC for different age groups and white blood cell spiked samples. These preliminary data show promising potential for application in portable LOC devices for UTI detection.
ContributorsKim, Sangpyeong (Author) / Chae, Junseok (Thesis advisor) / Phillips, Stephen M. (Committee member) / Blain Christen, Jennifer M. (Committee member) / Arizona State University (Publisher)
Created2011
Description
The thesis focuses on cost-efficient integration of the electro-chemical residue sensor (ECRS), a novel sensor developed for the in situ and real-time measurement of the residual impurities left on the wafer surface and in the fine structures of patterned wafers during typical rinse processes, and wireless transponder circuitry that is based on RFID technology. The proposed technology uses only the NMOS FD-SOI transistors with amorphous silicon as active material with silicon nitride as a gate dielectric. The proposed transistor was simulated under the SILVACO ATLAS Simulation Framework. A parametric study was performed to study the impact of different gate lengths (6 μm to 56 μm), electron motilities (0.1 cm2/Vs to 1 cm2/Vs), gate dielectric (SiO2 and SiNx) and active materials (a-Si and poly-Si) specifications. Level-1 models, that are accurate enough to acquire insight into the circuit behavior and perform preliminary design, were successfully constructed by analyzing drain current and gate to node capacitance characteristics against drain to source and gate to source voltages. Using the model corresponding to SiNx as gate dielectric, a-Si:H as active material with electron mobility equal to 0.4 cm2/V-sec, an operational amplifier was designed and was tested in unity gain configuration at modest load-frequency specifications.
ContributorsPandit, Vedhas (Author) / Vermeire, Bert (Thesis advisor) / Barnaby, Hugh (Committee member) / Chae, Junseok (Committee member) / Arizona State University (Publisher)
Created2010