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- Creators: Barrett, The Honors College
Description
Electromigration in metal interconnects is the most pernicious failure mechanism in semiconductor integrated circuits (ICs). Early electromigration investigations were primarily focused on aluminum interconnects for silicon-based ICs. An alternative metallization compatible with gallium arsenide (GaAs) was required in the development of high-powered radio frequency (RF) compound semiconductor devices operating at higher current densities and elevated temperatures. Gold-based metallization was implemented on GaAs devices because it uniquely forms a very low resistance ohmic contact and gold interconnects have superior electrical and thermal conductivity properties. Gold (Au) was also believed to have improved resistance to electromigration due to its higher melting temperature, yet electromigration reliability data on passivated Au interconnects is scarce and inadequate in the literature. Therefore, the objective of this research was to characterize the electromigration lifetimes of passivated Au interconnects under precisely controlled stress conditions with statistically relevant quantities to obtain accurate model parameters essential for extrapolation to normal operational conditions. This research objective was accomplished through measurement of electromigration lifetimes of large quantities of passivated electroplated Au interconnects utilizing high-resolution in-situ resistance monitoring equipment. Application of moderate accelerated stress conditions with a current density limited to 2 MA/cm2 and oven temperatures in the range of 300°C to 375°C avoided electrical overstress and severe Joule-heated temperature gradients. Temperature coefficients of resistance (TCRs) were measured to determine accurate Joule-heated Au interconnect film temperatures. A failure criterion of 50% resistance degradation was selected to prevent thermal runaway and catastrophic metal ruptures that are problematic of open circuit failure tests. Test structure design was optimized to reduce resistance variation and facilitate failure analysis. Characterization of the Au microstructure yielded a median grain size of 0.91 ìm. All Au lifetime distributions followed log-normal distributions and Black's model was found to be applicable. An activation energy of 0.80 ± 0.05 eV was measured from constant current electromigration tests at multiple temperatures. A current density exponent of 1.91 was extracted from multiple current densities at a constant temperature. Electromigration-induced void morphology along with these model parameters indicated grain boundary diffusion is dominant and the void nucleation mechanism controlled the failure time.
ContributorsKilgore, Stephen (Author) / Adams, James (Thesis advisor) / Schroder, Dieter (Thesis advisor) / Krause, Stephen (Committee member) / Gaw, Craig (Committee member) / Arizona State University (Publisher)
Created2013
Description
Company X is one of the world's largest semiconductor companies in the world, having a current market capitalization of 177.44 Billion USD, an enterprise value of 173.6 Billion USD, and generated 52.7 billion USD in revenue in fiscal year 2013. Recently, Company X has been looking to expand its Foundry business. The Foundry business in the semiconductor business is the actual process of making the chips. This process can be approached in several different ways by companies who need their chips built. A company, like TSMC, can be considered a pure-play company and only makes chips for other companies. A fabless company, like Apple, creates its own chip design and then allows another company to build them. It also uses other chip designs for its products, but outsources the building to another company. Lastly, the integrated device manufacturing companies like Samsung or Company X both design and build the chip. The foundry industry is a rather novel market for Company X because it owns less than 1 percent of the market. However, the industry itself is rather large, generating a total of 40 billion dollars in revenue annually, with expectations to have increasing year over year growth into the foreseeable future. The industry is fairly concentrated with TSMC being the top competitor, owning roughly 50 percent of the market with Samsung and Global Foundries lagging behind as notable competitors. It is a young industry and there is potential opportunity for companies that want to get into the business. For Company X, it is not only another market to get into, but also an added business segment to supplant their business segments that are forecasted to do poorly in the near future. This thesis will analyze the financial opportunity for Company X in the foundry space. Our final product is a series of P&L's which illustrate our findings. The results of our analysis were presented and defended in front of a panel of Company X managers and executives.
ContributorsJones, Trevor (Author) / Matiski, Matthew (Co-author) / Green, Alex (Co-author) / Simonson, Mark (Thesis director) / Hertzel, Michael (Committee member) / Department of Finance (Contributor) / W. P. Carey School of Business (Contributor) / Barrett, The Honors College (Contributor)
Created2015-05
Description
The purpose of this thesis was to design a market entrance strategy for Company X to enter the microcontroller (MCU) market within the Internet of Things (IoT). The five IoT segments are automotive; medical; retail; industrial; and military, aerospace, and government. To reach a final decision, we will research the markets, analyze make versus buy scenarios, and deliver a financial analysis on the chosen strategy. Based on the potential financial benefits and compatibility with Company X's current business model, we recommend that Company X enter the automotive segment through mergers & acquisitions (M&A). After analyzing the supply chain structure of the automotive IoT, we advise Company X to acquire Freescale Semiconductor for $46.98 per share.
ContributorsBradley, Rachel (Co-author) / Fankhauser, Elisa (Co-author) / McCoach, Robert (Co-author) / Zheng, Weilin (Co-author) / Simonson, Mark (Thesis director) / Hertzel, Mike (Committee member) / Barrett, The Honors College (Contributor) / Department of Finance (Contributor) / Department of Supply Chain Management (Contributor) / School of Accountancy (Contributor) / School of International Letters and Cultures (Contributor) / WPC Graduate Programs (Contributor)
Created2015-05
Description
Our thesis project aims to evaluate a major semiconductor company's (The Company) substrate supplier strategy in order to find the ideal number of suppliers that minimizes fixed cost and supplier power. With The Company spending roughly $2.2 billion annually on substrates, supplier strategy has a significant impact on their costs. As a general rule in micro processing, the circuitry of the processor becomes twice as dense every two years. The substrate, being the pathway through which the process or with the motherboard, must become more advanced as well, although the technology does not grow at nearly the same speed. Leading the way in their industry, The Company is at the forefront of technology and produces the world's most advanced processing units. The suppliers The Company purchases from must be innovators in their own respective fields in order to be capable of handling such "bleeding-edge" technology; this requires a supplier to make a commitment to continuously work towards meeting The Company's constantly changing technological requirements. The ultimate goal of this project is to determine the ideal number of substrate suppliers that balances the effects of production costs and buying power to give the company the best overall purchase price.
ContributorsWright, Brian (Author) / Hertzel, Michael (Thesis director) / Simonson, Mark (Committee member) / Shirts, John (Committee member) / Barrett, The Honors College (Contributor)
Created2012-05
Description
The semiconductor industry looks to constantly improve the efficiency of research and development in order to reduce costs and time to market. One such method was designed in order to decrease time spent inducing warpage in integrated circuits in an Intel research process. Intel's Atom product line seeks to compete with ARM architecture by entering the mobile devices CPU market. Due to the fundamental differences between the Atom's Bonnell architecture and the ARM architecture, the Intel Atom product line must utilize such improved research and development methods. Until power consumption is drastically lowered while maintaining processing speed, the Atom product line will not be able to effectively break into the mobile devices CPU market.
ContributorsLandseidel, Jack Adam (Author) / Adams, James (Thesis director) / Krause, Stephen (Committee member) / Anwar, Shahriar (Committee member) / Barrett, The Honors College (Contributor) / School of Mathematical and Statistical Sciences (Contributor) / Materials Science and Engineering Program (Contributor)
Created2013-05
Description
The Metal Semiconductor Field Effect Transistor (MESFET) has high potential to enter analog and RF applications due to their high breakdown voltage and switching frequency characteristics. These MESFET devices could allow for high voltage analog circuits to be integrated with low voltage digital circuits on a single chip in an extremely cost effective way. Higher integration leads to electronics with increased functionality and a smaller finished product. The MESFETs are designed in-house by the research group led by Dr. Trevor Thornton. The layouts are then sent to multi-project wafer (MPW) integrated circuit foundry companies, such as the Metal Oxide Semiconductor Implementation Service (MOSIS) to be fabricated. Once returned, the electrical characteristics of the devices are measured. The MESFET has been implemented in various applications by the research group, including the low dropout linear regulator (LDO) and RF power amplifier. An advantage of the MESFET is that it can function in extreme environments such as space, allowing for complex electrical systems to continue functioning properly where traditional transistors would fail.
ContributorsKam, Jason (Author) / Thornton, Trevor (Thesis director) / Goryll, Michael (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor)
Created2015-05
Description
The purpose of this research is to optically characterize the band gaps of sulfide-based chalcogenides and copper oxide thin films. The analysis on the copper oxide thin films will view the effects of various annealing temperatures and the analysis of the chalcogenides will view the effects of silver doping on the thin films. Using UV-Vis spectroscopy, parameters such as the absorption coefficient and determined which then provide details on the optical band gaps of these various semiconductors. With a better understanding of the bandgap of these materials, the behavior can be better predicted in fields of nanoionics and photonics.
ContributorsArora, Rajat Anmol (Author) / Gonzalez Velo, Yago (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2020-12
Description
Semiconductor wafers are analyzed and their total surface energy γT is measured in three components according to the van Oss theory: (1) γLW, surface energy due to Lifshitz-van der Waals forces or dipole interactions, (2) γ+, surface energy due to interactions with electron donors, and (3) γ–, surface energy due to interactions with electron acceptors. Surface energy is measured via Three Liquid Contact Angle Analysis (3LCAA), a method of contact angle measurement using the sessile drop technique and three liquids: water, glycerin, and α-bromonaphthalene. This research optimizes the experimental methods of 3LCAA, proving that the technique produces reproducible measurements for surface energy on a variety of surfaces. Wafer surfaces are prepared via thermal oxidation, rapid thermal oxidation, ion beam oxidation, rapid thermal annealing, hydrofluoric acid etching, the RCA clean, the Herbots-Atluri (H-A) process, and the dry and wet anneals used for Dry and Wet NanoBonding™, respectively.
NanoBonding™ is a process for growing molecular bonds between semiconducting surfaces to create a hermetic seal. NanoBonding™ prevents fluid percolation, protecting integrated electronic sensors from corrosive mobile ion species such as sodium. This can extend the lifetime of marine sensors and glucose sensors from less than one week to over two years, dramatically reducing costs and improving quality of life for diabetic patients. Surface energy measurement is critical to understanding and optimizing NanoBonding™. Surface energies are modified through variations on the H-A process, and measured via 3LCAA. The majority of this research focuses on silicon oxide surfaces.
This is the first quantitative measurement of gallium arsenide surface energy in three components. GaAs is a III-V semiconductor with potential commercial use in transistors, but its oxide layer slowly evaporates over time. In subsequent research, 3LCAA may prove key to developing a stable GaAs oxide layer.
NanoBonding™ is a process for growing molecular bonds between semiconducting surfaces to create a hermetic seal. NanoBonding™ prevents fluid percolation, protecting integrated electronic sensors from corrosive mobile ion species such as sodium. This can extend the lifetime of marine sensors and glucose sensors from less than one week to over two years, dramatically reducing costs and improving quality of life for diabetic patients. Surface energy measurement is critical to understanding and optimizing NanoBonding™. Surface energies are modified through variations on the H-A process, and measured via 3LCAA. The majority of this research focuses on silicon oxide surfaces.
This is the first quantitative measurement of gallium arsenide surface energy in three components. GaAs is a III-V semiconductor with potential commercial use in transistors, but its oxide layer slowly evaporates over time. In subsequent research, 3LCAA may prove key to developing a stable GaAs oxide layer.
ContributorsDavis, Ender (Author) / Herbots, Nicole (Thesis director) / Culbertson, Robert (Committee member) / Watson, Clarizza (Committee member) / Barrett, The Honors College (Contributor)
Created2016-05
Description
This paper serves as an analysis of the current operational conditions of a real-world company – referred to as “Company X” – with respect to the IC substrate industry. The cost of substrates, a crucial component in the production of Company X’s product, has recently diverged from Company X’s predictions and is contributing to declining profitability. This analysis aims to discover the underlying cause for price divergence and recommend potential resolutions to improve the forecast of substrate costs and profitability. The paper is organized as follows: Chapter 1 is an introduction to IC substrates and the industry as a whole, Chapter 2 is a breakdown of the specific factors responsible for substrate prices, and Chapter 3 delivers a final recommendation to Company X and concludes the paper.
ContributorsFares, Ariya (Ari) (Author) / O’Loughlin, Connor (Co-author) / Guillaume, Riley (Co-author) / Aggarwal, Bianca (Co-author) / King, Camden (Co-author) / Simonson, Mark (Thesis director) / Hertzel, Michael (Committee member) / Barrett, The Honors College (Contributor) / Department of Finance (Contributor)
Created2023-05
Description
We gathered and analyzed key data from a wide-range of competitors in the foundry, fabless, and Integrated design manufacturing business. After detecting a downward trend in the return of invested capital (ROIC) and higher capital intensity of Company X, we searched for alternatives to turn this around. We conclude that, to decrease the net PPE of Company X, a sale-leaseback transaction would help Company X reduce their balance sheet and provided financing to advance their manufacturing capabilities.
ContributorsBhat, Arjun Khandige (Co-author) / Brock, Ethan (Co-author) / Gamperl, Max (Co-author) / Gupta, Viraj (Co-author) / Macha, Sanketh (Co-author) / Simonson, Mark (Thesis director) / Duran, Juan Carlos (Committee member) / Department of Finance (Contributor) / Barrett, The Honors College (Contributor)
Created2018-05