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Description
Carrier lifetime is one of the few parameters which can give information about the low defect densities in today's semiconductors. In principle there is no lower limit to the defect density determined by lifetime measurements. No other technique can easily detect defect densities as low as 10-9 - 10-10 cm-3

Carrier lifetime is one of the few parameters which can give information about the low defect densities in today's semiconductors. In principle there is no lower limit to the defect density determined by lifetime measurements. No other technique can easily detect defect densities as low as 10-9 - 10-10 cm-3 in a simple, contactless room temperature measurement. However in practice, recombination lifetime τr measurements such as photoconductance decay (PCD) and surface photovoltage (SPV) that are widely used for characterization of bulk wafers face serious limitations when applied to thin epitaxial layers, where the layer thickness is smaller than the minority carrier diffusion length Ln. Other methods such as microwave photoconductance decay (µ-PCD), photoluminescence (PL), and frequency-dependent SPV, where the generated excess carriers are confined to the epitaxial layer width by using short excitation wavelengths, require complicated configuration and extensive surface passivation processes that make them time-consuming and not suitable for process screening purposes. Generation lifetime τg, typically measured with pulsed MOS capacitors (MOS-C) as test structures, has been shown to be an eminently suitable technique for characterization of thin epitaxial layers. It is for these reasons that the IC community, largely concerned with unipolar MOS devices, uses lifetime measurements as a "process cleanliness monitor." However when dealing with ultraclean epitaxial wafers, the classic MOS-C technique measures an effective generation lifetime τg eff which is dominated by the surface generation and hence cannot be used for screening impurity densities. I have developed a modified pulsed MOS technique for measuring generation lifetime in ultraclean thin p/p+ epitaxial layers which can be used to detect metallic impurities with densities as low as 10-10 cm-3. The widely used classic version has been shown to be unable to effectively detect such low impurity densities due to the domination of surface generation; whereas, the modified version can be used suitably as a metallic impurity density monitoring tool for such cases.
ContributorsElhami Khorasani, Arash (Author) / Alford, Terry (Thesis advisor) / Goryll, Michael (Committee member) / Bertoni, Mariana (Committee member) / Arizona State University (Publisher)
Created2013
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Description
The goal of this work is to develop low cost and highly efficient hybrid solar cells based on semiconductor nanoparticles (NPs). Hybrid solar cells have been demonstrated to take advantages of both inorganic and organic semiconductors by employing simple soluble process. In order to improve the power conversion efficiency (PCE),

The goal of this work is to develop low cost and highly efficient hybrid solar cells based on semiconductor nanoparticles (NPs). Hybrid solar cells have been demonstrated to take advantages of both inorganic and organic semiconductors by employing simple soluble process. In order to improve the power conversion efficiency (PCE), the bulk heterojunction (BHJ) of cadmium selenide (CdSe) tetrapods (TPs) and poly (3-hexylthiophene) (P3HT) are introduced as an electron acceptor and donor, respectively. The dimension of CdSe TPs and the 3D spatial distribution of CdSe TPs:P3HT photoactive blends are investigated to improve optical and electrical properties of photovoltaic devices. Hybrid solar cells having long-armed CdSe TPs and P3HT establish higher PCE of 1.12% when compared to device employing short-armed TPs of 0.80%. The device performance are improved by using longer armed CdSe TPs, which aids in better percolation connectivity and reduced charge hopping events, thus leading to better charge transport. The device architecture of hybrid solar cells is examined to assist vertical phase separation (VPS). Improvement of VPS in hybrid solar cells using CdSe TPs:P3HT photoactive blends is systematically manipulated by solution processed interfacial layers, resulting in enhanced device performance. Multi-layered hybrid solar cells assist better light absorption, efficient charge carrier transport, and increase of the surface contact area. In this work, hole transport assisting layer (HTAL)/BHJ photoactive layer (BPL)/electron transport assisting layer (ETAL) or HTAL/BPL/ETAL (HBE) multi-layered structure is introduced, similarly to p-type layer/intermixed photoactive layer
-type layer (p-i-n) structure of organic photovoltaic devices. To further control the improvement of the device performance, the effects of nano-scale morphology from solvents having different boiling points, the various shapes of semiconductor NPs, and the emergence of blending NPs are demonstrated. The formation of favorable 3D networks in photoactive layer is attributed to enhance the efficient charge transport by the optimized combination of semiconductor NPs in polymer matrix.
ContributorsLee, Kyu Sung (Author) / Jabbour, Ghassan E. (Thesis advisor) / Alford, Terry (Thesis advisor) / Krause, Stephen (Committee member) / Arizona State University (Publisher)
Created2012
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Description
Proposed and tested were three different methods to deposit important layers of Silicon heterojunction solar cells (SHJs). If there were a shortage of Silver, Aluminum could be substituted for the contacts. If there were a shortage of Indium, Yttrium Zinc Oxide could be substituted. To improve the solar cell, the

Proposed and tested were three different methods to deposit important layers of Silicon heterojunction solar cells (SHJs). If there were a shortage of Silver, Aluminum could be substituted for the contacts. If there were a shortage of Indium, Yttrium Zinc Oxide could be substituted. To improve the solar cell, the p and n type layers can be grown with hydrogenated nanocrystallline Silicon (nc-Si:H). 40% and 50% nc-Si:H has shown a maximum absorbance reduction of 5 times compared to hydrogenated amorphous Silicon (a-Si). The substitutions offer alternatives which increase the total possible amount of solar cell production, advancing toward completion of the Terrawatt challenge.
ContributorsCarpenter, Joe Victor (Author) / Alford, Terry (Thesis director) / Holman, Zachary (Committee member) / Barrett, The Honors College (Contributor) / Chemical Engineering Program (Contributor) / Materials Science and Engineering Program (Contributor)
Created2014-05
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Description
Diamond transistors are promising as high-power and high-frequency devices having higher efficiencies than conventional transistors. Diamond possesses superior electronic properties, such as a high bandgap (5.47 eV), high breakdown voltage (>10 MV cm−1 ), high electron and hole mobilities [4500 and 3800 cm2 V−1 · s−1, respectively], high electron

Diamond transistors are promising as high-power and high-frequency devices having higher efficiencies than conventional transistors. Diamond possesses superior electronic properties, such as a high bandgap (5.47 eV), high breakdown voltage (>10 MV cm−1 ), high electron and hole mobilities [4500 and 3800 cm2 V−1 · s−1, respectively], high electron and hole saturation velocities (1.5 × 107 and 1.05 × 107 cm s−1, respectively), and high thermal conductivity [22 W cm−1 · K−1], compared to conventional semiconductors. Reportedly, the diamond field-effect transistors (FETs) have shown transition frequencies (fT) of 45 and 70 GHz, maximum oscillation frequency (fmax) of 120 GHz, and radiofrequency (RF) power densities of 2.1 and 3.8 W mm−1 at 1 GHz. A two-dimensional-hole-gas (2DHG) surface channel forms on H-diamond by transfer doping from adsorbates/dielectrics in contact with H-diamond surface. However, prior studies indicate that charge transfer at the dielectric/ H-diamond interface could result in relatively low mobility attributed to interface scattering from the transferred negative charge to acceptor region. H-terminated diamond exhibits a negative electron affinity (NEA) of -1.1 to -1.3 eV, which is crucial to enable charge transfer doping. To overcome these limitations modulation doping, that is, selective doping, that leads to spatial separation of the MoO3 acceptor layer from the hole channel on H-diamond has been proposed. Molybdenum oxide (MoO3) was used as dielectric as it has electron affinity of 5.9eV and could align its conduction band minimum (CBM) below the valence band maximum (VBM) of H-terminated diamond. The band alignment provides the driving potential for charge transfer. Hafnium oxide (HfO2) was used as interfacial layer since it is a high-k oxide insulator (∼25), having large Eg (5.6 eV), high critical breakdown field, and high thermal stability. This study presents photoemission measurements of the electronic band alignments of the MoO3/HfO2/H-diamond layer structure to gain insight into the driving potential for the negative charge transfer and the location of the negative charges near the interface, in the HfO2 layer or in the MoO3 layer. The diamond hole concentration, mobility, and sheet resistance were characterized for MoO3/HfO2/H-Diamond with HfO2 layers of 0, 2 and 4 nm thickness.
ContributorsDeshmukh, Aditya Vilasrao (Author) / Nemanich, Robert J. (Thesis advisor) / Alford, Terry (Committee member) / Yang, Sui (Committee member) / Arizona State University (Publisher)
Created2024
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Description
Global photovoltaic (PV) module installation in 2018 is estimated to exceed 100 GW, and crystalline Si (c-Si) solar cell-based modules have a share more than 90% of the global PV market. To reduce the social cost of PV electricity, further developments in reliability of solar panels are expected. These will

Global photovoltaic (PV) module installation in 2018 is estimated to exceed 100 GW, and crystalline Si (c-Si) solar cell-based modules have a share more than 90% of the global PV market. To reduce the social cost of PV electricity, further developments in reliability of solar panels are expected. These will lead to realize longer module lifetime and reduced levelized cost of energy. As many as 86 failure modes are observed in PV modules [1] and series resistance increase is one of the major durability issues of all. Series resistance constitutes emitter sheet resistance, metal-semiconductor contact resistance, and resistance across the metal-solder ribbon. Solder bond degradation at the cell interconnect is one of the primary causes for increase in series resistance, which is also considered to be an invisible defect [1]. Combination of intermetallic compounds (IMC) formation during soldering and their growth due to solid state diffusion over its lifetime result in formation of weak interfaces between the solar cell and the interconnect. Thermal cycling under regular operating conditions induce thermo-mechanical fatigue over these weak interfaces resulting in contact reduction or loss. Contact reduction or loss leads to increase in series resistance which further manifests into power and fill factor loss. The degree of intermixing of metallic interfaces and contact loss depends on climatic conditions as temperature and humidity (moisture ingression into the PV module laminate) play a vital role in reaction kinetics of these layers. Modules from Arizona and Florida served as a good sample set to analyze the effects of hot and humid climatic conditions respectively. The results obtained in the current thesis quantifies the thickness of IMC formation from SEM-EDS profiles, where similar modules obtained from different climatic conditions were compared. The results indicate the thickness of the IMC and detachment degree to be growing with age and operating temperatures of the module. This can be seen in CuxSny IMC which is thicker in the case of Arizona module. The results obtained from FL

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aged modules also show that humidity accelerates the formation of IMC as they showed thicker AgxSny layer and weak interconnect-contact interfaces as compared to Arizona modules. It is also shown that climatic conditions have different effects on rate at which CuxSny and AgxSny intermetallic compounds are formed.
ContributorsBuddha, Viswa Sai Pavan (Author) / Tamizhmani, Govindasamy (Thesis advisor) / Alford, Terry (Thesis advisor) / Srinivasan, Devarajan (Committee member) / Arizona State University (Publisher)
Created2018
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Description
In order to meet climate targets, the solar photovoltaic industry must increase photovoltaic (PV) deployment and cost competitiveness over its business-as-usual trajectory. This requires more efficient PV modules that use less expensive materials, and longer operational lifetime. The work presented here approaches this challenge with a novel metallization method for

In order to meet climate targets, the solar photovoltaic industry must increase photovoltaic (PV) deployment and cost competitiveness over its business-as-usual trajectory. This requires more efficient PV modules that use less expensive materials, and longer operational lifetime. The work presented here approaches this challenge with a novel metallization method for solar PV and electronic devices.

This document outlines work completed to this end. Chapter 1 introduces the areas for cost reductions and improvements in efficiency to drive down the cost per watt of solar modules. Next, in Chapter 2, conventional and advanced metallization methods are reviewed, and our proposed solution of dispense printed reactive inks is introduced. Chapter 3 details a proof of concept study for reactive silver ink as front metallization for solar cells. Furthermore, Chapter 3 details characterization of the optical and electrical properties of reactive silver ink metallization, which is important to understanding the origins of problems related to metallization, enabling approaches to minimize power losses in full devices. Chapter 4 describes adhesion and specific contact resistance of reactive ink metallizations on silicon heterojunction solar cells. Chapter 5 compares performance of silicon heterojunction solar cells with front grids formed from reactive ink metallization and conventional, commercially available metallization. Performance and degradation throughout 1000 h of accelerated environmental exposure are described before detailing an isolated corrosion experiment for different silver-based metallizations. Finally, Chapter 6 summarizes the main contributions of this work.

The major goal of this project is to evaluate potential of a new metallization technique –high-precision dispense printing of reactive inks–to become a high efficiency replacement for solar cell metallization through optical and electrical characterization, evaluation of durability and reliability, and commercialization research. Although this work primarily describes the application of reactive silver inks as front-metallization for silicon heterojunction solar cells, the work presented here provides a framework for evaluation of reactive inks as metallization for various solar cell architectures and electronic devices.
ContributorsJeffries, April M (Author) / Bertoni, Mariana I (Thesis advisor) / Saive, Rebecca (Committee member) / Holman, Zachary (Committee member) / Alford, Terry (Committee member) / Arizona State University (Publisher)
Created2019
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Description
Stress-related failure such as cracking are an important photovoltaic (PV) reliability issue since it accounts for a high percentage of power losses in the midlife-failure and wear-out failure regimes. Cell cracking can only be correlated with module degradation when cracks are of detectable size and detrimental to the performance. Several

Stress-related failure such as cracking are an important photovoltaic (PV) reliability issue since it accounts for a high percentage of power losses in the midlife-failure and wear-out failure regimes. Cell cracking can only be correlated with module degradation when cracks are of detectable size and detrimental to the performance. Several techniques have been explored to access the deflection and stress status on solar cell, but they have disadvantages such as high surface sensitivity.

This dissertation presents a new and non-destructive method for mapping the deflection on encapsulated solar cells using X-ray topography (XRT). This method is based on Bragg diffraction imaging, where only the areas that meet diffraction conditions will present contrast. By taking XRT images of the solar cell at various sample positions and applying an in-house developed algorithm framework, the cell‘s deflection map is obtained. Error analysis has demonstrated that the errors from the experiment and the data processing are below 4.4 and 3.3%.

Von Karman plate theory has been applied to access the stress state of the solar cells. Under the assumptions that the samples experience pure bending and plain stress conditions, the principal stresses are obtained from the cell deflection data. Results from a statistical analysis using a Weibull distribution suggest that 0.1% of the data points can contribute to critical failure. Both the soldering and lamination processes put large amounts of stress on solar cells. Even though glass/glass packaging symmetry is preferred over glass/backsheet, the solar cells inside the glass/glass packaging experience significantly more stress. Through a series of in-situ four-point bending test, the assumptions behind Von Karman theory are validated for cases where the neutral plane is displaced by the tensile and compressive stresses.

The deflection and stress mapping method is applied to two next generation PV concepts named Flex-circuit and PVMirror. The Flex-circuit module concept replaces traditional metal ribbons with Al foils for electrical contact and PVMirror concept utilizes a curved PV module design with a dichroic film for thermal storage and electrical output. The XRT framework proposed in this dissertation successfully characterized the impact of various novel interconnection and packaging solutions.
ContributorsMeng, Xiaodong (Author) / Bertoni, Marian I (Thesis advisor) / Meier, Rico (Committee member) / Holman, Zachary C (Committee member) / Alford, Terry (Committee member) / Arizona State University (Publisher)
Created2019
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Description
Wide bandgap semiconductors are of much current interest due to their superior electrical properties. This dissertation describes electron microscopy characterization of GaN-on-GaN structures for high-power vertical device applications. Unintentionally-doped (UID) GaN layers grown homoepitaxially via metal-organic chemical vapor deposition on freestanding GaN substrates, were subjected to dry etching, and layers

Wide bandgap semiconductors are of much current interest due to their superior electrical properties. This dissertation describes electron microscopy characterization of GaN-on-GaN structures for high-power vertical device applications. Unintentionally-doped (UID) GaN layers grown homoepitaxially via metal-organic chemical vapor deposition on freestanding GaN substrates, were subjected to dry etching, and layers of UID-GaN/p-GaN were over-grown. The as-grown and regrown heterostructures were examined in cross-section using transmission electron microscopy (TEM). Two different etching treatments, fast-etch-only and multiple etches with decreasing power, were employed. The fast-etch-only devices showed GaN-on-GaN interface at etched location, and low device breakdown voltages were measured (~ 45-95V). In comparison, no interfaces were visible after multiple etching steps, and the corresponding breakdown voltages were much higher (~1200-1270V). These results emphasized importance of optimizing surface etching techniques for avoiding degraded device performance. The morphology of GaN-on-GaN devices after reverse-bias electrical stressing to breakdown was investigated. All failed devices had irreversible structural damage, showing large surface craters (~15-35 microns deep) with lengthy surface cracks. Cross-sectional TEM of failed devices showed high densities of threading dislocations (TDs) around the cracks and near crater surfaces. Progressive ion-milling across damaged devices revealed high densities of TDs and the presence of voids beneath cracks: these features were not observed in unstressed devices. The morphology of GaN substrates grown by hydride vapor-phase epitaxy (HVPE) and by ammonothermal methods were correlated with reverse-bias results. HVPE substrates showed arrays of surface features when observed by X-ray topography (XRT). All fabricated devices that overlapped with these features had typical reverse-bias voltages less than 100V at a leakage current limit of 10-6 A. In contrast, devices not overlapping with such features reached voltages greater than 300V. After etching, HVPE substrate surfaces showed defect clusters and macro-pits, whereas XRT images of ammonothermal substrate revealed no visible features. However, some devices fabricated on ammonothermal substrate failed at low voltages. Devices on HVPE and ammonothermal substrates with low breakdown voltages showed crater-like surface damage and revealed TDs (~25µm deep) and voids; such features were not observed in devices reaching higher voltages. These results should assist in developing protocols to fabricate reliable high-voltage devices.
ContributorsPeri, Prudhvi Ram (Author) / Smith, David J. (Thesis advisor) / Alford, Terry (Committee member) / Mccartney, Martha R (Committee member) / Nemanich, Robert (Committee member) / Zhao, Yuji (Committee member) / Arizona State University (Publisher)
Created2021