Matching Items (100)
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- All Subjects: Electrical Engineering
- Creators: Barnaby, Hugh
Description
Thin film transistors (TFTs) are being used in a wide variety of applications such as image sensors, radiation detectors, as well as for use in liquid crystal displays. However, there is a conspicuous absence of interface electronics for bridging the gap between the flexible sensors and digitized displays. Hence is the need to build the same. In this thesis, the feasibility of building mixed analog circuits in TFTs are explored and demonstrated. A flexible CMOS op-amp is demonstrated using a-Si:H and pentacene TFTs. The achieved performance is ¡Ö 50 dB of DC open loop gain with unity gain frequency (UGF) of 7 kHz. The op-amp is built on the popular 2 stage topology with the 2nd stage being cascoded to provide sufficient gain. A novel biasing circuit was successfully developed modifying the gm biasing circuit to retard the performance degradation as the TFTs aged. A switched capacitor 7 bit DAC was developed in only nMOS topology using a-Si:H TFTs, based on charge sharing concept. The DAC achieved a maximum differential non-linearity (DNL) of 0.6 least significant bit (LSB), while the maximum integral non-linearity (INL) was 1 LSB. TFTs were used as switches in this architecture; as a result the performance was quite unchanged even as the TFTs degraded. A 5 bit fully flash ADC was also designed using all nMOS a-Si:H TFTs. Gray coding was implemented at the output to avoid errors due to comparator meta-stability. Finally a 5 bit current steering DAC was also built using all nMOS a-Si:H TFTs. However, due to process variation, the DNL was increased to 1.2 while the INL was about 1.8 LSB. Measurements were made on the external stress effects on zinc indium oxide (ZIO) TFTs. Electrically induced stresses were studied applying DC bias on the gate and drain. These stresses shifted the device characteristics like threshold voltage and mobility. The TFTs were then mechanically stressed by stretching them across cylindrical structures of various radii. Both the subthreshold swing and mobility underwent significant changes when the stress was tensile while the change was minor under compressive stress, applied parallel to channel length.
ContributorsDey, Aritra (Author) / Allee, David R. (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Garrity, Douglas A (Committee member) / Song, Hongjiang (Committee member) / Clark, Lawrence T (Committee member) / Arizona State University (Publisher)
Created2011
Description
Advancements in computer vision and machine learning have added a new dimension to remote sensing applications with the aid of imagery analysis techniques. Applications such as autonomous navigation and terrain classification which make use of image classification techniques are challenging problems and research is still being carried out to find better solutions. In this thesis, a novel method is proposed which uses image registration techniques to provide better image classification. This method reduces the error rate of classification by performing image registration of the images with the previously obtained images before performing classification. The motivation behind this is the fact that images that are obtained in the same region which need to be classified will not differ significantly in characteristics. Hence, registration will provide an image that matches closer to the previously obtained image, thus providing better classification. To illustrate that the proposed method works, naïve Bayes and iterative closest point (ICP) algorithms are used for the image classification and registration stages respectively. This implementation was tested extensively in simulation using synthetic images and using a real life data set called the Defense Advanced Research Project Agency (DARPA) Learning Applied to Ground Robots (LAGR) dataset. The results show that the ICP algorithm does help in better classification with Naïve Bayes by reducing the error rate by an average of about 10% in the synthetic data and by about 7% on the actual datasets used.
ContributorsMuralidhar, Ashwini (Author) / Saripalli, Srikanth (Thesis advisor) / Papandreou-Suppappola, Antonia (Committee member) / Turaga, Pavan (Committee member) / Arizona State University (Publisher)
Created2011
Description
Programmable Metallization Cell (PMC) is a technology platform which utilizes mass transport in solid or liquid electrolyte coupled with electrochemical (redox) reactions to form or remove nanoscale metallic electrodeposits on or in the electrolyte. The ability to redistribute metal mass and form metallic nanostructure in or on a structure in situ, via the application of a bias on laterally placed electrodes, creates a large number of promising applications. A novel PMC-based lateral microwave switch was fabricated and characterized for use in microwave systems. It has demonstrated low insertion loss, high isolation, low voltage operation, low power and low energy consumption, and excellent linearity. Due to its non-volatile nature the switch operates with fewer biases and its simple planar geometry makes possible innovative device structures which can be potentially integrated into microwave power distribution circuits. PMC technology is also used to develop lateral dendritic metal electrodes. A lateral metallic dendritic network can be grown in a solid electrolyte (GeSe) or electrodeposited on SiO2 or Si using a water-mediated method. These dendritic electrodes grown in a solid electrolyte (GeSe) can be used to lower resistances for applications like self-healing interconnects despite its relatively low light transparency; while the dendritic electrodes grown using water-mediated method can be potentially integrated into solar cell applications, like replacing conventional Ag screen-printed top electrodes as they not only reduce resistances but also are highly transparent. This research effort also laid a solid foundation for developing dendritic plasmonic structures. A PMC-based lateral dendritic plasmonic structure is a device that has metallic dendritic networks grown electrochemically on SiO2 with a thin layer of surface metal nanoparticles in liquid electrolyte. These structures increase the distribution of particle sizes by connecting pre-deposited Ag nanoparticles into fractal structures and result in three significant effects, resonance red-shift, resonance broadening and resonance enhancement, on surface plasmon resonance for light trapping simultaneously, which can potentially enhance thin film solar cells' performance at longer wavelengths.
ContributorsRen, Minghan (Author) / Kozicki, Michael (Thesis advisor) / Schroder, Dieter (Committee member) / Roedel, Ronald (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2011
Description
Optical receivers have many different uses covering simple infrared receivers, high speed fiber optic communication and light based instrumentation. All of them have an optical receiver that converts photons to current followed by a transimpedance amplifier to convert the current to a useful voltage. Different systems create different requirements for each receiver. High speed digital communication require high throughput with enough sensitivity to keep the bit error rate low. Instrumentation receivers have a lower bandwidth, but higher gain and sensitivity requirements. In this thesis an optical receiver for use in instrumentation in presented. It is an entirely monolithic design with the photodiodes on the same substrate as the CMOS circuitry. This allows for it to be built into a focal-plane array, but it places some restriction on the area. It is also designed for in-situ testing and must be able to cancel any low frequency noise caused by ambient light. The area restrictions prohibit the use of a DC blocking capacitor to reject the low frequency noise. In place a servo loop was wrapped around the system to reject any DC offset. A modified Cherry-Hooper architecture was used for the transimpedance amplifier. This provides the flexibility to create an amplifier with high gain and wide bandwidth that is independent of the input capacitance. The downside is the increased complexity of the design makes stability paramount to the design. Another drawback is the high noise associated with low input impedance that decouples the input capacitance from the bandwidth. This problem is compounded by the servo loop feed which leaves the output noise of some amplifiers directly referred to the input. An in depth analysis of each circuit block's noise contribution is presented.
ContributorsLaFevre, Kyle (Author) / Bakkaloglu, Bertan (Thesis advisor) / Barnaby, Hugh (Committee member) / Vermeire, Bert (Committee member) / Arizona State University (Publisher)
Created2011
Description
Advancements in mobile technologies have significantly enhanced the capabilities of mobile devices to serve as powerful platforms for sensing, processing, and visualization. Surges in the sensing technology and the abundance of data have enabled the use of these portable devices for real-time data analysis and decision-making in digital signal processing (DSP) applications. Most of the current efforts in DSP education focus on building tools to facilitate understanding of the mathematical principles. However, there is a disconnect between real-world data processing problems and the material presented in a DSP course. Sophisticated mobile interfaces and apps can potentially play a crucial role in providing a hands-on-experience with modern DSP applications to students. In this work, a new paradigm of DSP learning is explored by building an interactive easy-to-use health monitoring application for use in DSP courses. This is motivated by the increasing commercial interest in employing mobile phones for real-time health monitoring tasks. The idea is to exploit the computational abilities of the Android platform to build m-Health modules with sensor interfaces. In particular, appropriate sensing modalities have been identified, and a suite of software functionalities have been developed. Within the existing framework of the AJDSP app, a graphical programming environment, interfaces to on-board and external sensor hardware have also been developed to acquire and process physiological data. The set of sensor signals that can be monitored include electrocardiogram (ECG), photoplethysmogram (PPG), accelerometer signal, and galvanic skin response (GSR). The proposed m-Health modules can be used to estimate parameters such as heart rate, oxygen saturation, step count, and heart rate variability. A set of laboratory exercises have been designed to demonstrate the use of these modules in DSP courses. The app was evaluated through several workshops involving graduate and undergraduate students in signal processing majors at Arizona State University. The usefulness of the software modules in enhancing student understanding of signals, sensors and DSP systems were analyzed. Student opinions about the app and the proposed m-health modules evidenced the merits of integrating tools for mobile sensing and processing in a DSP curriculum, and familiarizing students with challenges in modern data-driven applications.
ContributorsRajan, Deepta (Author) / Spanias, Andreas (Thesis advisor) / Frakes, David (Committee member) / Turaga, Pavan (Committee member) / Arizona State University (Publisher)
Created2013
Description
The medical industry has benefited greatly by electronic integration resulting in the explosive growth of active medical implants. These devices often treat and monitor chronic health conditions and require very minimal power usage. A key part of these medical implants is an ultra-low power two way wireless communication system. This enables both control of the implant as well as relay of information collected. This research has focused on a high performance receiver for medical implant applications. One commonly quoted specification to compare receivers is energy per bit required. This metric is useful, but incomplete in that it ignores Sensitivity level, bit error rate, and immunity to interferers. In this study exploration of receiver architectures and convergence upon a comprehensive solution is done. This analysis is used to design and build a system for validation. The Direct Conversion Receiver architecture implemented for the MICS standard in 0.18 µm CMOS process consumes approximately 2 mW is competitive with published research.
ContributorsStevens, Mark (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Aberle, James T., 1961- (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2012
Description
Efficiency of components is an ever increasing area of importance to portable applications, where a finite battery means finite operating time. Higher efficiency devices need to be designed that don't compromise on the performance that the consumer has come to expect. Class D amplifiers deliver on the goal of increased efficiency, but at the cost of distortion. Class AB amplifiers have low efficiency, but high linearity. By modulating the supply voltage of a Class AB amplifier to make a Class H amplifier, the efficiency can increase while still maintaining the Class AB level of linearity. A 92dB Power Supply Rejection Ratio (PSRR) Class AB amplifier and a Class H amplifier were designed in a 0.24um process for portable audio applications. Using a multiphase buck converter increased the efficiency of the Class H amplifier while still maintaining a fast response time to respond to audio frequencies. The Class H amplifier had an efficiency above the Class AB amplifier by 5-7% from 5-30mW of output power without affecting the total harmonic distortion (THD) at the design specifications. The Class H amplifier design met all design specifications and showed performance comparable to the designed Class AB amplifier across 1kHz-20kHz and 0.01mW-30mW. The Class H design was able to output 30mW into 16Ohms without any increase in THD. This design shows that Class H amplifiers merit more research into their potential for increasing efficiency of audio amplifiers and that even simple designs can give significant increases in efficiency without compromising linearity.
ContributorsPeterson, Cory (Author) / Bakkaloglu, Bertan (Thesis advisor) / Barnaby, Hugh (Committee member) / Kiaei, Sayfe (Committee member) / Arizona State University (Publisher)
Created2013
Description
Digital sound synthesis allows the creation of a great variety of sounds. Focusing on interesting or ecologically valid sounds for music, simulation, aesthetics, or other purposes limits the otherwise vast digital audio palette. Tools for creating such sounds vary from arbitrary methods of altering recordings to precise simulations of vibrating objects. In this work, methods of sound synthesis by re-sonification are considered. Re-sonification, herein, refers to the general process of analyzing, possibly transforming, and resynthesizing or reusing recorded sounds in meaningful ways, to convey information. Applied to soundscapes, re-sonification is presented as a means of conveying activity within an environment. Applied to the sounds of objects, this work examines modeling the perception of objects as well as their physical properties and the ability to simulate interactive events with such objects. To create soundscapes to re-sonify geographic environments, a method of automated soundscape design is presented. Using recorded sounds that are classified based on acoustic, social, semantic, and geographic information, this method produces stochastically generated soundscapes to re-sonify selected geographic areas. Drawing on prior knowledge, local sounds and those deemed similar comprise a locale's soundscape. In the context of re-sonifying events, this work examines processes for modeling and estimating the excitations of sounding objects. These include plucking, striking, rubbing, and any interaction that imparts energy into a system, affecting the resultant sound. A method of estimating a linear system's input, constrained to a signal-subspace, is presented and applied toward improving the estimation of percussive excitations for re-sonification. To work toward robust recording-based modeling and re-sonification of objects, new implementations of banded waveguide (BWG) models are proposed for object modeling and sound synthesis. Previous implementations of BWGs use arbitrary model parameters and may produce a range of simulations that do not match digital waveguide or modal models of the same design. Subject to linear excitations, some models proposed here behave identically to other equivalently designed physical models. Under nonlinear interactions, such as bowing, many of the proposed implementations exhibit improvements in the attack characteristics of synthesized sounds.
ContributorsFink, Alex M (Author) / Spanias, Andreas S (Thesis advisor) / Cook, Perry R. (Committee member) / Turaga, Pavan (Committee member) / Tsakalis, Konstantinos (Committee member) / Arizona State University (Publisher)
Created2013
Description
ABSTRACT Developing new non-traditional device models is gaining popularity as the silicon-based electrical device approaches its limitation when it scales down. Membrane systems, also called P systems, are a new class of biological computation model inspired by the way cells process chemical signals. Spiking Neural P systems (SNP systems), a certain kind of membrane systems, is inspired by the way the neurons in brain interact using electrical spikes. Compared to the traditional Boolean logic, SNP systems not only perform similar functions but also provide a more promising solution for reliable computation. Two basic neuron types, Low Pass (LP) neurons and High Pass (HP) neurons, are introduced. These two basic types of neurons are capable to build an arbitrary SNP neuron. This leads to the conclusion that these two basic neuron types are Turing complete since SNP systems has been proved Turing complete. These two basic types of neurons are further used as the elements to construct general-purpose arithmetic circuits, such as adder, subtractor and comparator. In this thesis, erroneous behaviors of neurons are discussed. Transmission error (spike loss) is proved to be equivalent to threshold error, which makes threshold error discussion more universal. To improve the reliability, a new structure called motif is proposed. Compared to Triple Modular Redundancy improvement, motif design presents its efficiency and effectiveness in both single neuron and arithmetic circuit analysis. DRAM-based CMOS circuits are used to implement the two basic types of neurons. Functionality of basic type neurons is proved using the SPICE simulations. The motif improved adder and the comparator, as compared to conventional Boolean logic design, are much more reliable with lower leakage, and smaller silicon area. This leads to the conclusion that SNP system could provide a more promising solution for reliable computation than the conventional Boolean logic.
ContributorsAn, Pei (Author) / Cao, Yu (Thesis advisor) / Barnaby, Hugh (Committee member) / Chakrabarti, Chaitali (Committee member) / Arizona State University (Publisher)
Created2013
Description
The advent of threshold logic simplifies the traditional Boolean logic to the single level multi-input function. Threshold logic latch (TLL), among implementations of threshold logic, is functionally equivalent to a multi-input function with an edge triggered flip-flop, which stands out to improve area and both dynamic and leakage power consumption, providing an appropriate design alternative. Accordingly, the TLL standard cell library is designed. Through technology mapping, hybrid circuit is generated by absorbing the logic cone backward from each flip-flip to get the smallest remaining feeder. With the scan test methodology adopted, design for testability (DFT) is proposed, including scan element design and scan chain insertion. Test synthesis flow is then introduced, according to the Cadence tool, RTL compiler. Test application is the process of applying vectors and the response analysis, which is mainly about the testbench design. A parameterized generic self-checking Verilog testbench is designed for static fault detection. Test development refers to the fault modeling, and test generation. Firstly, functional truth table test generation on TLL cells is proposed. Before the truth table test of the threshold function, the dependence of sequence of vectors applied, i.e., the dependence of current state on the previous state, should be eliminated. Transition test (dynamic pattern) on all weak inputs is proved to be able to test the reset function, which is supposed to erase the history in the reset phase before every evaluation phase. Remaining vectors in the truth table except the weak inputs are then applied statically (static pattern). Secondly, dynamic patterns for all weak inputs are proposed to detect structural transistor level faults analyzed in the TLL cell, with single fault assumption and stuck-at faults, stuck-on faults, and stuck-open faults under consideration. Containing those patterns, the functional test covers all testable structural faults inside the TLL. Thirdly, with the scope of the whole hybrid netlist, the procedure of test generation is proposed with three steps: scan chain test; test of feeders and other scan elements except TLLs; functional pattern test of TLL cells. Implementation of this procedure is discussed in the automatic test pattern generation (ATPG) chapter.
ContributorsHu, Yang (Author) / Vrudhula, Sarma (Thesis advisor) / Barnaby, Hugh (Committee member) / Yu, Shimeng (Committee member) / Arizona State University (Publisher)
Created2013