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Description
Linear bipolar circuits, designed with bipolar junction transistors (BJTs), are particularly vulnerable to the effects of space radiation. These circuits, which are usually commercial off-the-shelf (COTS) components, typically exhibit Enhanced Low Dose Rate Sensitivity (ELDRS), which is characterized by the enhancement of degradation when parts are exposed to radiation at low dose rates as compared to high dose rates. This phenomenon poses significant problems for the qualification of bipolar parts for use in low dose rate environments, such as most Earth orbits. ELDRS in BJTs has been well-documented in ground-based experiments; however, the effects of low dose rate irradiation on bipolar transistors manufactured in an integrated linear process had never been characterized in space - until the ELDRS experiment was launched in June 2019. The ELDRS instrument measures changes in the active collector and base currents in 24 lateral PNP (LPNP) BJTs on eight packaged die (three BJTs per die). Sixteen of the 24 BJTs are gated, while eight are standard, un-gated LPNPs. Device Under Test (DUT) and measurement variables include oxide thickness, passivation layer, packaging conditions, and gate voltage. This thesis reports the results obtained after more than 20 months of space flight in a highly elliptical Earth orbit. These results demonstrate that this category of bipolar devices is susceptible to low dose rate exposures and therefore exhibits the ELDRS effect in an actual space environment. This thesis also assess the impact of packaging variables on radiation response and examines one of the major causes behind radiation degradation, interface traps. An understanding of radiation effects in real space environments is critical for future missions that use these low-cost COTS bipolar technologies, making these results highly relevant for the satellite community.
ContributorsBenedetto, Adalin (Author) / Barnaby, Hugh J (Thesis advisor) / Goodnick, Stephen (Committee member) / Sanchez, Ivan (Committee member) / Arizona State University (Publisher)
Created2023
Description
The development of high efficiency III-V solar cells is needed to meet the demands of a promising renewable energy source. Intermediate band solar cells (IBSCs) using semiconductor quantum dots (QDs) have been proposed to exceed the Shockley-Queisser efficiency limit [1]. The introduction of an IB in the forbidden gap of host material generates two additional carrier transitions for sub-bandgap photon absorption, leading to increased photocurrent of IBSCs while simultaneously allowing an open-circuit voltage of the highest band gap. To realize a high efficiency IBSC, QD structures should have high crystal quality and optimized electronic properties. This dissertation focuses on the investigation and optimization of the structural and optical properties of InAs/GaAsSb QDs and the development of InAs/GaAsSb QD-based IBSCs.
In the present dissertation, the interband optical transition and carrier lifetime of InAs/GaAsSb QDs with different silicon delta-doping densities have been first studied by time-integrated and time-resolved photoluminescence (PL). It is found that an optimized silicon delta-doping density in the QDs enables to fill the QD electronic states with electrons for sub-bandgap photon absorption and to improve carrier lifetime of the QDs.
After that, the crystal quality and QD morphology of single- and multi-stack InAs/GaAsSb QDs with different Sb compositions have been investigated by transmission electron microscopy (TEM) and x-ray diffraction (XRD). The TEM studies reveal that QD morphology of single-stack QDs is affected by Sb composition due to strain reducing effect of Sb incorporation. The XRD studies confirm that the increase of Sb composition increases the lattice mismatch between GaAs matrix and GaAsSb spacers, resulting in increase of the strain relaxation in GaAsSb of the multi-stack QDs. Furthermore, the increase of Sb composition causes a PL redshift and increases carrier lifetime of QDs.
Finally, the spacer layer thickness of multi-stack InAs/GaAsSb QDs is optimized for the growth of InAs/GaAsSb QD solar cells (QDSCs). The InAs/GaAsSb QDSCs with GaP strain compensating layer are grown and their device performances are characterized. The increase of GaP coverage is beneficial to improve the conversion efficiency of the QDSCs. However, the conversion efficiency is reduced when using a relatively large GaP coverage.
In the present dissertation, the interband optical transition and carrier lifetime of InAs/GaAsSb QDs with different silicon delta-doping densities have been first studied by time-integrated and time-resolved photoluminescence (PL). It is found that an optimized silicon delta-doping density in the QDs enables to fill the QD electronic states with electrons for sub-bandgap photon absorption and to improve carrier lifetime of the QDs.
After that, the crystal quality and QD morphology of single- and multi-stack InAs/GaAsSb QDs with different Sb compositions have been investigated by transmission electron microscopy (TEM) and x-ray diffraction (XRD). The TEM studies reveal that QD morphology of single-stack QDs is affected by Sb composition due to strain reducing effect of Sb incorporation. The XRD studies confirm that the increase of Sb composition increases the lattice mismatch between GaAs matrix and GaAsSb spacers, resulting in increase of the strain relaxation in GaAsSb of the multi-stack QDs. Furthermore, the increase of Sb composition causes a PL redshift and increases carrier lifetime of QDs.
Finally, the spacer layer thickness of multi-stack InAs/GaAsSb QDs is optimized for the growth of InAs/GaAsSb QD solar cells (QDSCs). The InAs/GaAsSb QDSCs with GaP strain compensating layer are grown and their device performances are characterized. The increase of GaP coverage is beneficial to improve the conversion efficiency of the QDSCs. However, the conversion efficiency is reduced when using a relatively large GaP coverage.
ContributorsKim, Yeongho (Author) / Honsberg, Christiana (Thesis advisor) / Goodnick, Stephen (Committee member) / Faleev, Nikolai (Committee member) / Smith, David (Committee member) / Arizona State University (Publisher)
Created2015
Description
This dissertation explores thermal effects and electrical characteristics in metal-oxide-semiconductor field effect transistor (MOSFET) devices and circuits using a multiscale dual-carrier approach. Simulating electron and hole transport with carrier-phonon interactions for thermal transport allows for the study of complementary logic circuits with device level accuracy in electrical characteristics and thermal effects. The electrical model is comprised of an ensemble Monte Carlo solution to the Boltzmann Transport Equation coupled with an iterative solution to two-dimensional (2D) Poisson’s equation. The thermal model solves the energy balance equations accounting for carrier-phonon and phonon-phonon interactions. Modeling of circuit behavior uses parametric iteration to ensure current and voltage continuity. This allows for modeling of device behavior, analyzing circuit performance, and understanding thermal effects.
The coupled electro-thermal approach, initially developed for individual n-channel MOSFET (NMOS) devices, now allows multiple devices in tandem providing a platform for better comparison with heater-sensor experiments. The latest electro-thermal solver allows simulation of multiple NMOS and p-channel MOSFET (PMOS) devices, providing a platform for the study of complementary MOSFET (CMOS) circuit behavior. Modeling PMOS devices necessitates the inclusion of hole transport and hole-phonon interactions. The analysis of CMOS circuits uses the electro-thermal device simulation methodology alongside parametric iteration to ensure current continuity. Simulating a CMOS inverter and analyzing the extracted voltage transfer characteristics verifies the efficacy of this methodology. This work demonstrates the effectiveness of the dual-carrier electro-thermal solver in simulating thermal effects in CMOS circuits.
The coupled electro-thermal approach, initially developed for individual n-channel MOSFET (NMOS) devices, now allows multiple devices in tandem providing a platform for better comparison with heater-sensor experiments. The latest electro-thermal solver allows simulation of multiple NMOS and p-channel MOSFET (PMOS) devices, providing a platform for the study of complementary MOSFET (CMOS) circuit behavior. Modeling PMOS devices necessitates the inclusion of hole transport and hole-phonon interactions. The analysis of CMOS circuits uses the electro-thermal device simulation methodology alongside parametric iteration to ensure current continuity. Simulating a CMOS inverter and analyzing the extracted voltage transfer characteristics verifies the efficacy of this methodology. This work demonstrates the effectiveness of the dual-carrier electro-thermal solver in simulating thermal effects in CMOS circuits.
ContributorsDaugherty, Robin (Author) / Vasileska, Dragica (Thesis advisor) / Aberle, James T., 1961- (Committee member) / Ferry, David (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2019
Description
A model of self-heating is incorporated into a Cellular Monte Carlo (CMC) particle-based device simulator through the solution of an energy balance equation (EBE) for phonons. The EBE self-consistently couples charge and heat transport in the simulation through a novel approach to computing the heat generation rate in the device under study. First, the moments of the Boltzmann Transport equation (BTE) are discussed, and subsequently the EBE of for phonons is derived. Subsequently, several tests are performed to verify the applicability and accuracy of a nonlinear iterative method for the solution of the EBE in the presence of convective boundary conditions, as compared to a finite element analysis solver as well as using the Kirchhoff transformation. The coupled electrothermal characterization of a GaN/AlGaN high electron mobility transistor (HEMT) is then performed, and the effects of non-ideal interfaces and boundary conditions are studied.
The proposed thermal model is then applied to a novel $\Pi$-gate architecture which has been suggested to reduce hot electron generation in the device, compared to the conventional T-gate. Additionally, small signal ac simulations are performed for the determination of cutoff frequencies using the thermal model as well.
Finally, further extensions of the CMC algorithm used in this work are discussed, including 1) higher-order moments of the phonon BTE, 2) coupling to phonon Monte Carlo simulations, and 3) application to other large-bandgap, and therefore high-power, materials such as diamond.
The proposed thermal model is then applied to a novel $\Pi$-gate architecture which has been suggested to reduce hot electron generation in the device, compared to the conventional T-gate. Additionally, small signal ac simulations are performed for the determination of cutoff frequencies using the thermal model as well.
Finally, further extensions of the CMC algorithm used in this work are discussed, including 1) higher-order moments of the phonon BTE, 2) coupling to phonon Monte Carlo simulations, and 3) application to other large-bandgap, and therefore high-power, materials such as diamond.
ContributorsMerrill, Ky (Author) / Saraniti, Marco (Thesis advisor) / Goodnick, Stephen (Committee member) / Smith, David (Committee member) / Wang, Robert (Committee member) / Arizona State University (Publisher)
Created2020
Description
The quest to find efficient algorithms to numerically solve differential equations isubiquitous in all branches of computational science. A natural approach to address
this problem is to try all possible algorithms to solve the differential equation and
choose the one that is satisfactory to one's needs. However, the vast variety of algorithms
in place makes this an extremely time consuming task. Additionally, even
after choosing the algorithm to be used, the style of programming is not guaranteed
to result in the most efficient algorithm. This thesis attempts to address the same
problem but pertinent to the field of computational nanoelectronics, by using PETSc
linear solver and SLEPc eigenvalue solver packages to efficiently solve Schrödinger
and Poisson equations self-consistently.
In this work, quasi 1D nanowire fabricated in the GaN material system is considered
as a prototypical example. Special attention is placed on the proper description
of the heterostructure device, the polarization charges and accurate treatment of the
free surfaces. Simulation results are presented for the conduction band profiles, the
electron density and the energy eigenvalues/eigenvectors of the occupied sub-bands
for this quasi 1D nanowire. The simulation results suggest that the solver is very
efficient and can be successfully used for the analysis of any device with two dimensional
confinement. The tool is ported on www.nanoHUB.org and as such is freely
available.
this problem is to try all possible algorithms to solve the differential equation and
choose the one that is satisfactory to one's needs. However, the vast variety of algorithms
in place makes this an extremely time consuming task. Additionally, even
after choosing the algorithm to be used, the style of programming is not guaranteed
to result in the most efficient algorithm. This thesis attempts to address the same
problem but pertinent to the field of computational nanoelectronics, by using PETSc
linear solver and SLEPc eigenvalue solver packages to efficiently solve Schrödinger
and Poisson equations self-consistently.
In this work, quasi 1D nanowire fabricated in the GaN material system is considered
as a prototypical example. Special attention is placed on the proper description
of the heterostructure device, the polarization charges and accurate treatment of the
free surfaces. Simulation results are presented for the conduction band profiles, the
electron density and the energy eigenvalues/eigenvectors of the occupied sub-bands
for this quasi 1D nanowire. The simulation results suggest that the solver is very
efficient and can be successfully used for the analysis of any device with two dimensional
confinement. The tool is ported on www.nanoHUB.org and as such is freely
available.
ContributorsBaikadi, Pranay Kumar Reddy (Author) / Vasileska, Dragica (Thesis advisor) / Goodnick, Stephen (Committee member) / Povolotskyi, Mykhailo (Committee member) / Arizona State University (Publisher)
Created2020
Description
Advanced and mature computer simulation methods exist in fluid dynamics, elec-
tromagnetics, semiconductors, chemical transport, and even chemical and material
electronic structure. However, few general or accurate methods have been developed
for quantum photonic devices. Here, a novel approach utilizing phase-space quantum
mechanics is developed to model photon transport in ring resonators, a form of en-
tangled pair source. The key features the model needs to illustrate are the emergence
of non-classicality and entanglement between photons due to nonlinear effects in the
ring. The quantum trajectory method is subsequently demonstrated on a sequence
of elementary models and multiple aspects of the ring resonator itself.
tromagnetics, semiconductors, chemical transport, and even chemical and material
electronic structure. However, few general or accurate methods have been developed
for quantum photonic devices. Here, a novel approach utilizing phase-space quantum
mechanics is developed to model photon transport in ring resonators, a form of en-
tangled pair source. The key features the model needs to illustrate are the emergence
of non-classicality and entanglement between photons due to nonlinear effects in the
ring. The quantum trajectory method is subsequently demonstrated on a sequence
of elementary models and multiple aspects of the ring resonator itself.
ContributorsWelland, Ian Matthew (Author) / Ferry, David K. (Thesis advisor) / Goodnick, Stephen (Thesis advisor) / Zhao, Yuji (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2020
Description
Wurtzite (B, Ga, Al) N semiconductors, especially (Ga, Al) N material systems, demonstrate immense promises to boost the economic growth in the semiconductor industry that is approaching the end of Moore’s law. At the material level, their high electric field strength, high saturation velocity, and unique heterojunction polarization charge have enabled tremendous potentials for high power, high frequency, and photonic applications. With the availability of large-area bulk GaN substrates and high-quality epilayer on foreign substrates, the power conversion applications of GaN are now at the cusp of commercialization.Despite these encouraging advances, there remain two critical hurdles in GaN-based technology: selective area doping and hole-based p-channel devices. Current selective area doping methods are still immature and lead to low-quality lateral p-n junctions, which prevent the realization of advanced power transistors and rectifiers. The missing of hole-based p-channel devices hinders the development of GaN complementary integrated circuits.
This thesis comprehensively studied these challenges. The first part (chapter 2) researched the selective area doping by etch-then-regrow. A GaN-based vertical-channel junction field-effect transistors (VC-JFETs) was experimentally demonstrated by blanket regrowth and self-planarization. The devices’ electrical performances were characterized to understand the regrowth quality. The non-ideal factors during p-GaN regrowth were also discussed. The second part (chapter 3-5) systematically studied the application of the hydrogen plasma treatment process to change the p-GaN properties selectively. A novel GaN-based metal-insulator-semiconductor junction was demonstrated. Then a novel edge termination design with avalanche breakdown capability achieved in GaN power rectifiers is proposed. The last part (Chapter 6) demonstrated a GaN-based p-channel heterojunction field-effect transistor, with record low leakage, subthreshold swing, and a record high on/off ratio. In the end, some outlook and future work have also been proposed.
Although in infancy, the demonstrated etch-then-regrow and the hydrogen plasma treatment methods have the potential to ultimately solve the challenges in GaN and benefit the development of the wide-ultra-wide bandgap industry, technology, and society.
ContributorsYang, Chen (Author) / Zhao, Yuji (Thesis advisor) / Goodnick, Stephen (Committee member) / Yu, Hongbin (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2021
Description
The advent of silicon, germanium, narrow-gap III-V materials, and later the wide bandgap (WBG) semiconductors, and their subsequent revolution and enrichment of daily life begs the question: what is the next generation of semiconductor electronics poised to look like? Ultrawide bandgap (UWBG) semiconductors are the class of semiconducting materials that possess an electronic bandgap (EG) greater than that of gallium nitride (GaN), which is 3.4 eV. They currently consist of beta-phase gallium oxide (β-Ga2O3 ; EG = 4.6–4.9 eV), diamond (EG = 5.5 eV), aluminum nitride (AlN; EG =6.2 eV), cubic boron nitride (BN; EG = 6.4 eV), and other materials hitherto undiscovered. Such a strong emphasis is placed on the semiconductor bandgap because so many relevant electronic performance properties scale positively with the bandgap. Where power electronics is concerned, the Baliga's Figure of Merit (BFOM) quantifies how much voltage a device can block in the off state and how high its conductivity is in the on state. The BFOM has a sixth-order dependence on the bandgap. The UWBG class of semiconductors also possess the potential for higher switching efficiencies and power densities and better suitability for deep-UV and RF optoelectronics. Many UWBG materials have very tight atomic lattices and high displacement energies, which makes them suitable for extreme applications such as radiation-harsh environments commonly found in military, industrial, and outer space applications. In addition, the UWBG materials also show promise for applications in quantum information sciences. For all the inherent promise and burgeoning research efforts, key breakthroughs in UWBG research have only occurred as recently as within the last two to three decades, making them extremely immature in comparison with the well-known WBG materials and others before them. In particular, AlN suffers from a lack of wide availability of low-cost, highquality substrates, a stark contrast to β-Ga2O3, which is now readily commercially available. In order to realize more efficient and varied devices on the relatively nascent UWBG materials platform, a deeper understanding of the various devices and physics is necessary. The following thesis focuses on the UWBG materials AlN and β-Ga2O3, overlooking radiation studies, a novel device heterojunction, and electronic defect study.
ContributorsMontes, Jossue (Author) / Zhao, Yuji (Thesis advisor) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Sanchez Esqueda, Ivan (Committee member) / Arizona State University (Publisher)
Created2021
Description
The research of alternative materials and new device architectures to exceed the limits of conventional silicon-based devices has been sparked by the persistent pursuit of semiconductor technology scaling. The development of tungsten diselenide (WSe2) and molybdenum disulfide (MoS2), well-known member of the transition metal dichalcogenide (TMD) family, has made great strides towards ultrascaled two-dimensional (2D) field-effect-transistors (FETs). The scaling issues facing silicon-based complementary metal-oxide-semiconductor (CMOS) technologies can be solved by 2D FETs, which show extraordinary potential.This dissertation provides a comprehensive experimental analysis relating to improvements in p-type metal-oxide-semiconductor (PMOS) FETs with few-layer WSe2 and high-κ metal gate (HKMG) stacks. Compared to this works improved methods, standard metallization (more damaging to underlying channel) results in significant Fermi-level pinning, although Schottky barrier heights remain small (< 100 meV) when using high work function metals. Temperature-dependent analysis reveals a dominant contribution to contact resistance from the damaged channel access region. Thus, through less damaging metallization methods combined with strongly scaled HKMG stacks significant improvements were achieved in contact resistance and PMOS FET overall performance. A clean contact/channel interface was achieved through high-vacuum evaporation and temperature-controlled stepped deposition. Theoretical analysis using a Landauer transport adapted to WSe2 Schottky barrier FETs (SB-FETs) elucidates the prospects of nanoscale 2D PMOS FETs indicating high-performance towards the ultimate CMOS scaling limit.
Next, this dissertation discusses how device electrical characteristics are affected by scaling of equivalent oxide thickness (EOT) and by adopting double-gate FET architectures, as well as how this might support CMOS scaling. An improved gate control over the channel is made possible by scaling EOT, improving on-off current ratios, carrier mobility, and subthreshold swing. This study also elucidates the impact of EOT scaling on FET gate hysteresis attributed to charge-trapping effects in high-κ-dielectrics prepared by atomic layer deposition (ALD). These developments in 2D FETs offer a compelling alternative to conventional silicon-based devices and a path for continued transistor scaling. This research contributes to ongoing efforts in 2D materials for future semiconductor technologies. Finally, this work introduces devices based on emerging Janus TMDs and bismuth oxyselenide (Bi2O2Se) layered semiconductors.
ContributorsPatoary, Md Naim Hossain (Author) / Sanchez Esqueda, Ivan (Thesis advisor) / Tongay, Sefaattin (Committee member) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2023
Description
Scaling of the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) towards shorter channel lengths, has lead to an increasing importance of quantum effects on the device performance. Until now, a semi-classical model based on Monte Carlo method for instance, has been sufficient to address these issues in silicon, and arrive at a reasonably good fit to experimental mobility data. But as the semiconductor world moves towards 10nm technology, many of the basic assumptions in this method, namely the very fundamental Fermi’s golden rule come into question. The derivation of the Fermi’s golden rule assumes that the scattering is infrequent (therefore the long time limit) and the collision duration time is zero. This thesis overcomes some of the limitations of the above approach by successfully developing a quantum mechanical simulator that can model the low-field inversion layer mobility in silicon MOS capacitors and other inversion layers as well. It solves for the scattering induced collisional broadening of the states by accounting for the various scattering mechanisms present in silicon through the non-equilibrium based near-equilibrium Green’s Functions approach, which shall be referred to as near-equilibrium Green’s Function (nEGF) in this work. It adopts a two-loop approach, where the outer loop solves for the self-consistency between the potential and the subband sheet charge density by solving the Poisson and the Schrödinger equations self-consistently. The inner loop solves for the nEGF (renormalization of the spectrum and the broadening of the states), self-consistently using the self-consistent Born approximation, which is then used to compute the mobility using the Green-Kubo Formalism.
ContributorsJayaram Thulasingam, Gokula Kannan (Author) / Vasileska, Dragica (Thesis advisor) / Ferry, David (Committee member) / Goodnick, Stephen (Committee member) / Allee, David (Committee member) / Arizona State University (Publisher)
Created2017