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- All Subjects: Electrical Engineering
- Creators: Yu, Hongbin
- Resource Type: Text
Description
Antenna arrays are widely used in wireless communication, radar, remote sensing, and other fields. Compared to traditional linear antenna arrays, novel nonlinear antenna arrays have fascinating advantages in terms of structural simplicity, lower cost, wider bandwidth, faster scanning speed, and lower side-lobe levels. This dissertation explores a novel design of a phased array antenna with an augmented scanning range, aiming to establish a clear connection between mathematical principles and practical circuitry. To achieve this goal, the Van der Pol (VDP) model is applied to a single-transistor oscillator to obtain the isolated limit cycle. The coupled oscillators are then integrated into a 1 times 7 coupled phased array, using the Keysight PathWave Advanced Design System (ADS) for tuning and optimization. The VDP model is used for analytic study of bifurcation, quasi-sinusoidal oscillation, quasi-periodic chaos, and oscillator death, while ADS schematics guide engineering implementation and physical fabrication. The coupled oscillators drive cavity-backed antennas, forming a one-dimensional scanning antenna array of 1 times 7. The approaches for increasing the scanning range performance are discussed.
ContributorsZhang, Kaiyue (Author) / Pan, George (Thesis advisor) / Yu, Hongbin (Committee member) / Aberle, James (Committee member) / Palais, Joseph (Committee member) / Arizona State University (Publisher)
Created2023
Description
Semiconductor memory is a key component of the computing systems. Beyond the conventional memory and data storage applications, in this dissertation, both mainstream and eNVM memory technologies are explored for radiation environment, hardware security system and machine learning applications.
In the radiation environment, e.g. aerospace, the memory devices face different energetic particles. The strike of these energetic particles can generate electron-hole pairs (directly or indirectly) as they pass through the semiconductor device, resulting in photo-induced current, and may change the memory state. First, the trend of radiation effects of the mainstream memory technologies with technology node scaling is reviewed. Then, single event effects of the oxide based resistive switching random memory (RRAM), one of eNVM technologies, is investigated from the circuit-level to the system level.
Physical Unclonable Function (PUF) has been widely investigated as a promising hardware security primitive, which employs the inherent randomness in a physical system (e.g. the intrinsic semiconductor manufacturing variability). In the dissertation, two RRAM-based PUF implementations are proposed for cryptographic key generation (weak PUF) and device authentication (strong PUF), respectively. The performance of the RRAM PUFs are evaluated with experiment and simulation. The impact of non-ideal circuit effects on the performance of the PUFs is also investigated and optimization strategies are proposed to solve the non-ideal effects. Besides, the security resistance against modeling and machine learning attacks is analyzed as well.
Deep neural networks (DNNs) have shown remarkable improvements in various intelligent applications such as image classification, speech classification and object localization and detection. Increasing efforts have been devoted to develop hardware accelerators. In this dissertation, two types of compute-in-memory (CIM) based hardware accelerator designs with SRAM and eNVM technologies are proposed for two binary neural networks, i.e. hybrid BNN (HBNN) and XNOR-BNN, respectively, which are explored for the hardware resource-limited platforms, e.g. edge devices.. These designs feature with high the throughput, scalability, low latency and high energy efficiency. Finally, we have successfully taped-out and validated the proposed designs with SRAM technology in TSMC 65 nm.
Overall, this dissertation paves the paths for memory technologies’ new applications towards the secure and energy-efficient artificial intelligence system.
In the radiation environment, e.g. aerospace, the memory devices face different energetic particles. The strike of these energetic particles can generate electron-hole pairs (directly or indirectly) as they pass through the semiconductor device, resulting in photo-induced current, and may change the memory state. First, the trend of radiation effects of the mainstream memory technologies with technology node scaling is reviewed. Then, single event effects of the oxide based resistive switching random memory (RRAM), one of eNVM technologies, is investigated from the circuit-level to the system level.
Physical Unclonable Function (PUF) has been widely investigated as a promising hardware security primitive, which employs the inherent randomness in a physical system (e.g. the intrinsic semiconductor manufacturing variability). In the dissertation, two RRAM-based PUF implementations are proposed for cryptographic key generation (weak PUF) and device authentication (strong PUF), respectively. The performance of the RRAM PUFs are evaluated with experiment and simulation. The impact of non-ideal circuit effects on the performance of the PUFs is also investigated and optimization strategies are proposed to solve the non-ideal effects. Besides, the security resistance against modeling and machine learning attacks is analyzed as well.
Deep neural networks (DNNs) have shown remarkable improvements in various intelligent applications such as image classification, speech classification and object localization and detection. Increasing efforts have been devoted to develop hardware accelerators. In this dissertation, two types of compute-in-memory (CIM) based hardware accelerator designs with SRAM and eNVM technologies are proposed for two binary neural networks, i.e. hybrid BNN (HBNN) and XNOR-BNN, respectively, which are explored for the hardware resource-limited platforms, e.g. edge devices.. These designs feature with high the throughput, scalability, low latency and high energy efficiency. Finally, we have successfully taped-out and validated the proposed designs with SRAM technology in TSMC 65 nm.
Overall, this dissertation paves the paths for memory technologies’ new applications towards the secure and energy-efficient artificial intelligence system.
ContributorsLiu, Rui (Author) / Yu, Shimeng (Thesis advisor, Committee member) / Cao, Yu (Committee member) / Barnaby, Hugh (Committee member) / Seo, Jae-Sun (Committee member) / Arizona State University (Publisher)
Created2018
Description
Graphene has been extensively researched for both scientific and technological interests since its first isolation from graphite. The excellent transport properties and long spin diffusion length of graphene make it a promising material for electronic and spintronic device applications. This dissertation deals with the optimization of magnetic field sensing in graphene and the realization of nanoparticle induced ferromagnetism in graphene towards spintronic device applications.
Graphene has been used as a channel material for magnetic sensors demonstrating the potential for very high sensitivities, especially for Hall sensors, due to its extremely high mobility and low carrier concentration. However, the two-carrier nature of graphene near the charge neutrality point (CNP) causes a nonlinearity issue for graphene Hall sensors, which limits useful operating ranges and has not been fully studied. In this dissertation, a two-channel model was used to describe the transport of graphene near the CNP. The model was carefully validated by experiments and then was used to explore the optimization of graphene sensor performance by tuning the gate operating bias under realistic constraints on linearity and power dissipation.
The manipulation of spin in graphene that is desired for spintronic applications is limited by its weak spin-orbit coupling (SOC). Proximity induced ferromagnetism (PIFM) from an adjacent ferromagnetic insulator (FMI) provides a method for enhancing SOC in graphene without degrading its transport properties. However, suitable FMIs are uncommon and difficult to integrate with graphene. In this dissertation, PIFM in graphene from an adjacent Fe3O4 magnetic nanoparticle (MNP) array was demonstrated for the first time. Observation of the anomalous Hall effect (AHE) in the device structures provided the signature of PIFM. Comparison of the test samples with different control samples conclusively proved that exchange interaction at the MNP/graphene interface was responsible for the observed characteristics. The PIFM in graphene was shown to persist at room temperature and to be gate-tunable, which are desirable features for electrically controlled spintronic device applications.
The observation of PIFM in the MNP/graphene devices indicates that the spin transfer torque (STT) from spin-polarized current in the graphene can interact with the magnetization of the MNPs. If there is sufficient STT, spin torque oscillation (STO) could be realized in this structure. In this dissertation, three methods were employed to search for signatures of STO in the devices. STO was not observed in our devices, most likely due to the weak spin-polarization for current injected from conventional ferromagnetic contacts to graphene. Calculation indicates that graphene should provide sufficient spin-polarized current for exciting STO in optimized structures that miniaturize the device area and utilize optimized tunnel-barrier contacts for improved spin injection.
Graphene has been used as a channel material for magnetic sensors demonstrating the potential for very high sensitivities, especially for Hall sensors, due to its extremely high mobility and low carrier concentration. However, the two-carrier nature of graphene near the charge neutrality point (CNP) causes a nonlinearity issue for graphene Hall sensors, which limits useful operating ranges and has not been fully studied. In this dissertation, a two-channel model was used to describe the transport of graphene near the CNP. The model was carefully validated by experiments and then was used to explore the optimization of graphene sensor performance by tuning the gate operating bias under realistic constraints on linearity and power dissipation.
The manipulation of spin in graphene that is desired for spintronic applications is limited by its weak spin-orbit coupling (SOC). Proximity induced ferromagnetism (PIFM) from an adjacent ferromagnetic insulator (FMI) provides a method for enhancing SOC in graphene without degrading its transport properties. However, suitable FMIs are uncommon and difficult to integrate with graphene. In this dissertation, PIFM in graphene from an adjacent Fe3O4 magnetic nanoparticle (MNP) array was demonstrated for the first time. Observation of the anomalous Hall effect (AHE) in the device structures provided the signature of PIFM. Comparison of the test samples with different control samples conclusively proved that exchange interaction at the MNP/graphene interface was responsible for the observed characteristics. The PIFM in graphene was shown to persist at room temperature and to be gate-tunable, which are desirable features for electrically controlled spintronic device applications.
The observation of PIFM in the MNP/graphene devices indicates that the spin transfer torque (STT) from spin-polarized current in the graphene can interact with the magnetization of the MNPs. If there is sufficient STT, spin torque oscillation (STO) could be realized in this structure. In this dissertation, three methods were employed to search for signatures of STO in the devices. STO was not observed in our devices, most likely due to the weak spin-polarization for current injected from conventional ferromagnetic contacts to graphene. Calculation indicates that graphene should provide sufficient spin-polarized current for exciting STO in optimized structures that miniaturize the device area and utilize optimized tunnel-barrier contacts for improved spin injection.
ContributorsSong, Guibin (Author) / Kiehl, Richard A. (Committee member) / Yu, Hongbin (Committee member) / Chen, Tingyong (Committee member) / Rizzo, Nicholas D (Committee member) / Arizona State University (Publisher)
Created2019
Description
The detection and segmentation of objects appearing in a natural scene, often referred to as Object Detection, has gained a lot of interest in the computer vision field. Although most existing object detectors aim to detect all the objects in a given scene, it is important to evaluate whether these methods are capable of detecting the salient objects in the scene when constraining the number of proposals that can be generated due to constraints on timing or computations during execution. Salient objects are objects that tend to be more fixated by human subjects. The detection of salient objects is important in applications such as image collection browsing, image display on small devices, and perceptual compression.
This thesis proposes a novel evaluation framework that analyses the performance of popular existing object proposal generators in detecting the most salient objects. This work also shows that, by incorporating saliency constraints, the number of generated object proposals and thus the computational cost can be decreased significantly for a target true positive detection rate (TPR).
As part of the proposed framework, salient ground-truth masks are generated from the given original ground-truth masks for a given dataset. Given an object detection dataset, this work constructs salient object location ground-truth data, referred to here as salient ground-truth data for short, that only denotes the locations of salient objects. This is obtained by first computing a saliency map for the input image and then using it to assign a saliency score to each object in the image. Objects whose saliency scores are sufficiently high are referred to as salient objects. The detection rates are analyzed for existing object proposal generators with respect to the original ground-truth masks and the generated salient ground-truth masks.
As part of this work, a salient object detection database with salient ground-truth masks was constructed from the PASCAL VOC 2007 dataset. Not only does this dataset aid in analyzing the performance of existing object detectors for salient object detection, but it also helps in the development of new object detection methods and evaluating their performance in terms of successful detection of salient objects.
This thesis proposes a novel evaluation framework that analyses the performance of popular existing object proposal generators in detecting the most salient objects. This work also shows that, by incorporating saliency constraints, the number of generated object proposals and thus the computational cost can be decreased significantly for a target true positive detection rate (TPR).
As part of the proposed framework, salient ground-truth masks are generated from the given original ground-truth masks for a given dataset. Given an object detection dataset, this work constructs salient object location ground-truth data, referred to here as salient ground-truth data for short, that only denotes the locations of salient objects. This is obtained by first computing a saliency map for the input image and then using it to assign a saliency score to each object in the image. Objects whose saliency scores are sufficiently high are referred to as salient objects. The detection rates are analyzed for existing object proposal generators with respect to the original ground-truth masks and the generated salient ground-truth masks.
As part of this work, a salient object detection database with salient ground-truth masks was constructed from the PASCAL VOC 2007 dataset. Not only does this dataset aid in analyzing the performance of existing object detectors for salient object detection, but it also helps in the development of new object detection methods and evaluating their performance in terms of successful detection of salient objects.
ContributorsKotamraju, Sai Prajwal (Author) / Karam, Lina J (Thesis advisor) / Yu, Hongbin (Committee member) / Jayasuriya, Suren (Committee member) / Arizona State University (Publisher)
Created2019
Description
Wide bandgap (WBG) semiconductors GaN (3.4 eV), Ga2O3 (4.8 eV) and AlN (6.2 eV), have gained considerable interests for energy-efficient optoelectronic and electronic applications in solid-state lighting, photovoltaics, power conversion, and so on. They can offer unique device performance compared with traditional semiconductors such as Si. Efficient GaN based light-emitting diodes (LEDs) have increasingly displaced incandescent and fluorescent bulbs as the new major light sources for lighting and display. In addition, due to their large bandgap and high critical electrical field, WBG semiconductors are also ideal candidates for efficient power conversion.
In this dissertation, two types of devices are demonstrated: optoelectronic and electronic devices. Commercial polar c-plane LEDs suffer from reduced efficiency with increasing current densities, knowns as “efficiency droop”, while nonpolar/semipolar LEDs exhibit a very low efficiency droop. A modified ABC model with weak phase space filling effects is proposed to explain the low droop performance, providing insights for designing droop-free LEDs. The other emerging optoelectronics is nonpolar/semipolar III-nitride intersubband transition (ISBT) based photodetectors in terahertz and far infrared regime due to the large optical phonon energy and band offset, and the potential of room-temperature operation. ISBT properties are systematically studied for devices with different structures parameters.
In terms of electronic devices, vertical GaN p-n diodes and Schottky barrier diodes (SBDs) with high breakdown voltages are homoepitaxially grown on GaN bulk substrates with much reduced defect densities and improved device performance. The advantages of the vertical structure over the lateral structure are multifold: smaller chip area, larger current, less sensitivity to surface states, better scalability, and smaller current dispersion. Three methods are proposed to boost the device performances: thick buffer layer design, hydrogen-plasma based edge termination technique, and multiple drift layer design. In addition, newly emerged Ga2O3 and AlN power electronics may outperform GaN devices. Because of the highly anisotropic crystal structure of Ga2O3, anisotropic electrical properties have been observed in Ga2O3 electronics. The first 1-kV-class AlN SBDs are demonstrated on cost-effective sapphire substrates. Several future topics are also proposed including selective-area doping in GaN power devices, vertical AlN power devices, and (Al,Ga,In)2O3 materials and devices.
In this dissertation, two types of devices are demonstrated: optoelectronic and electronic devices. Commercial polar c-plane LEDs suffer from reduced efficiency with increasing current densities, knowns as “efficiency droop”, while nonpolar/semipolar LEDs exhibit a very low efficiency droop. A modified ABC model with weak phase space filling effects is proposed to explain the low droop performance, providing insights for designing droop-free LEDs. The other emerging optoelectronics is nonpolar/semipolar III-nitride intersubband transition (ISBT) based photodetectors in terahertz and far infrared regime due to the large optical phonon energy and band offset, and the potential of room-temperature operation. ISBT properties are systematically studied for devices with different structures parameters.
In terms of electronic devices, vertical GaN p-n diodes and Schottky barrier diodes (SBDs) with high breakdown voltages are homoepitaxially grown on GaN bulk substrates with much reduced defect densities and improved device performance. The advantages of the vertical structure over the lateral structure are multifold: smaller chip area, larger current, less sensitivity to surface states, better scalability, and smaller current dispersion. Three methods are proposed to boost the device performances: thick buffer layer design, hydrogen-plasma based edge termination technique, and multiple drift layer design. In addition, newly emerged Ga2O3 and AlN power electronics may outperform GaN devices. Because of the highly anisotropic crystal structure of Ga2O3, anisotropic electrical properties have been observed in Ga2O3 electronics. The first 1-kV-class AlN SBDs are demonstrated on cost-effective sapphire substrates. Several future topics are also proposed including selective-area doping in GaN power devices, vertical AlN power devices, and (Al,Ga,In)2O3 materials and devices.
ContributorsFu, Houqiang (Author) / Zhao, Yuji (Thesis advisor) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Yu, Hongbin (Committee member) / Wang, Liping (Committee member) / Arizona State University (Publisher)
Created2019
Description
The Resistive Random Access Memory (ReRAM) is an emerging non-volatile memory
technology because of its attractive attributes, including excellent scalability (< 10 nm), low
programming voltage (< 3 V), fast switching speed (< 10 ns), high OFF/ON ratio (> 10),
good endurance (up to 1012 cycles) and great compatibility with silicon CMOS technology [1].
However, ReRAM suffers from larger write latency, energy and reliability issue compared to
Dynamic Random Access Memory (DRAM). To improve the energy-efficiency, latency efficiency and reliability of ReRAM storage systems, a low cost cross-layer approach that spans device, circuit, architecture and system levels is proposed.
For 1T1R 2D ReRAM system, the effect of both retention and endurance errors on
ReRAM reliability is considered. Proposed approach is to design circuit-level and architecture-level techniques to reduce raw Bit Error Rate significantly and then employ low cost Error Control Coding to achieve the desired lifetime.
For 1S1R 2D ReRAM system, a cross-point array with “multi-bit per access” per subarray
is designed for high energy-efficiency and good reliability. The errors due to cell-level as well
as array-level variations are analyzed and a low cost scheme to maintain reliability and latency
with low energy consumption is proposed.
For 1S1R 3D ReRAM system, access schemes which activate multiple subarrays with
multiple layers in a subarray are used to achieve high energy efficiency through activating fewer
subarray, and good reliability is achieved through innovative data organization.
Finally, a novel ReRAM-based accelerator design is proposed to support multiple
Convolutional Neural Networks (CNN) topologies including VGGNet, AlexNet and ResNet.
The multi-tiled architecture consists of 9 processing elements per tile, where each tile
implements the dot product operation using ReRAM as computation unit. The processing
elements operate in a systolic fashion, thereby maximizing input feature map reuse and
minimizing interconnection cost. The system-level evaluation on several network benchmarks
show that the proposed architecture can improve computation efficiency and energy efficiency
compared to a state-of-the-art ReRAM-based accelerator.
technology because of its attractive attributes, including excellent scalability (< 10 nm), low
programming voltage (< 3 V), fast switching speed (< 10 ns), high OFF/ON ratio (> 10),
good endurance (up to 1012 cycles) and great compatibility with silicon CMOS technology [1].
However, ReRAM suffers from larger write latency, energy and reliability issue compared to
Dynamic Random Access Memory (DRAM). To improve the energy-efficiency, latency efficiency and reliability of ReRAM storage systems, a low cost cross-layer approach that spans device, circuit, architecture and system levels is proposed.
For 1T1R 2D ReRAM system, the effect of both retention and endurance errors on
ReRAM reliability is considered. Proposed approach is to design circuit-level and architecture-level techniques to reduce raw Bit Error Rate significantly and then employ low cost Error Control Coding to achieve the desired lifetime.
For 1S1R 2D ReRAM system, a cross-point array with “multi-bit per access” per subarray
is designed for high energy-efficiency and good reliability. The errors due to cell-level as well
as array-level variations are analyzed and a low cost scheme to maintain reliability and latency
with low energy consumption is proposed.
For 1S1R 3D ReRAM system, access schemes which activate multiple subarrays with
multiple layers in a subarray are used to achieve high energy efficiency through activating fewer
subarray, and good reliability is achieved through innovative data organization.
Finally, a novel ReRAM-based accelerator design is proposed to support multiple
Convolutional Neural Networks (CNN) topologies including VGGNet, AlexNet and ResNet.
The multi-tiled architecture consists of 9 processing elements per tile, where each tile
implements the dot product operation using ReRAM as computation unit. The processing
elements operate in a systolic fashion, thereby maximizing input feature map reuse and
minimizing interconnection cost. The system-level evaluation on several network benchmarks
show that the proposed architecture can improve computation efficiency and energy efficiency
compared to a state-of-the-art ReRAM-based accelerator.
ContributorsMao, Manqing (Author) / Chakrabariti, Chaitali (Thesis advisor) / Yu, Shimeng (Committee member) / Cao, Yu (Committee member) / Orgas, Umit (Committee member) / Arizona State University (Publisher)
Created2019
Description
In this dissertation, I described my research on the growth and characterization of various nanostructures, such as nanowires, nanobelts and nanosheets, of different semiconductors in a Chemical Vapor Deposition (CVD) system.
In the first part of my research, I selected chalcogenides (such as CdS and CdSe) for a comprehensive study in growing two-segment axial nanowires and radial nanobelts/sheets using the ternary CdSxSe1-x alloys. I demonstrated simultaneous red (from CdSe-rich) and green (from CdS-rich) light emission from a single monolithic heterostructure with a maximum wavelength separation of 160 nm. I also demonstrated the first simultaneous two-color lasing from a single nanosheet heterostructure with a wavelength separation of 91 nm under sufficiently strong pumping power.
In the second part, I considered several combinations of source materials with different growth methods in order to extend the spectral coverage of previously demonstrated structures towards shorter wavelengths to achieve full-color emissions. I achieved this with the growth of multisegment heterostructure nanosheets (MSHNs), using ZnS and CdSe chalcogenides, via our novel growth method. By utilizing this method, I demonstrated the first growth of ZnCdSSe MSHNs with an overall lattice mismatch of 6.6%, emitting red, green and blue light simultaneously, in a single furnace run using a simple CVD system. The key to this growth method is the dual ion exchange process which converts nanosheets rich in CdSe to nanosheets rich in ZnS, demonstrated for the first time in this work. Tri-chromatic white light emission with different correlated color temperature values was achieved under different growth conditions. We demonstrated multicolor (191 nm total wavelength separation) laser from a single monolithic semiconductor nanostructure for the first time. Due to the difficulties associated with growing semiconductor materials of differing composition on a given substrate using traditional planar epitaxial technology, our nanostructures and growth method are very promising for various device applications, including but not limited to: illumination, multicolor displays, photodetectors, spectrometers and monolithic multicolor lasers.
In the first part of my research, I selected chalcogenides (such as CdS and CdSe) for a comprehensive study in growing two-segment axial nanowires and radial nanobelts/sheets using the ternary CdSxSe1-x alloys. I demonstrated simultaneous red (from CdSe-rich) and green (from CdS-rich) light emission from a single monolithic heterostructure with a maximum wavelength separation of 160 nm. I also demonstrated the first simultaneous two-color lasing from a single nanosheet heterostructure with a wavelength separation of 91 nm under sufficiently strong pumping power.
In the second part, I considered several combinations of source materials with different growth methods in order to extend the spectral coverage of previously demonstrated structures towards shorter wavelengths to achieve full-color emissions. I achieved this with the growth of multisegment heterostructure nanosheets (MSHNs), using ZnS and CdSe chalcogenides, via our novel growth method. By utilizing this method, I demonstrated the first growth of ZnCdSSe MSHNs with an overall lattice mismatch of 6.6%, emitting red, green and blue light simultaneously, in a single furnace run using a simple CVD system. The key to this growth method is the dual ion exchange process which converts nanosheets rich in CdSe to nanosheets rich in ZnS, demonstrated for the first time in this work. Tri-chromatic white light emission with different correlated color temperature values was achieved under different growth conditions. We demonstrated multicolor (191 nm total wavelength separation) laser from a single monolithic semiconductor nanostructure for the first time. Due to the difficulties associated with growing semiconductor materials of differing composition on a given substrate using traditional planar epitaxial technology, our nanostructures and growth method are very promising for various device applications, including but not limited to: illumination, multicolor displays, photodetectors, spectrometers and monolithic multicolor lasers.
ContributorsTurkdogan, Sunay (Author) / Ning, Cun Zheng (Thesis advisor) / Palais, Joseph C. (Committee member) / Yu, Hongbin (Committee member) / Mardinly, A. John (Committee member) / Arizona State University (Publisher)
Created2015
Description
The recent flurry of security breaches have raised serious concerns about the security of data communication and storage. A promising way to enhance the security of the system is through physical root of trust, such as, through use of physical unclonable functions (PUF). PUF leverages the inherent randomness in physical systems to provide device specific authentication and encryption.
In this thesis, first the design of a highly reliable resistive random access memory (RRAM) PUF is presented. Compared to existing 1 cell/bit RRAM, here the sum of the read-out currents of multiple RRAM cells are used for generating one response bit. This method statistically minimizes any early-lifetime failure due to RRAM retention degradation at high temperature or under voltage stress. Using a device model that was calibrated using IMEC HfOx RRAM experimental data, it was shown that an 8 cells/bit architecture achieves 99.9999% reliability for a lifetime >10 years at 125℃ . Also, the hardware area overhead of the proposed 8 cells/bit RRAM PUF architecture was smaller than 1 cell/bit RRAM PUF that requires error correction coding to achieve the same reliability.
Next, a basic security primitive is presented, where the RRAM PUF is embedded in the cryptographic module, SHA-256. This architecture is referred to as Embedded PUF or EPUF. EPUF has a security advantage over SHA-256 as it never exposes the PUF response to the outside world. Instead, in each round, the PUF response is used to change a few bits of the message word to produce a unique message digest for each IC. The use of EPUF as a key generation module for AES is also shown. The hardware area requirement for SHA-256 and AES-128 is then analyzed using synthesis results based on TSMC 65nm library. It is shown that the area overhead of 8 cells/bit RRAM PUF is only 1.08% of the SHA-256 module and 0.04% of the AES-128 module. The security analysis of the PUF based systems is also presented. It is shown that the EPUF-based systems are resistant towards standard attacks on PUFs, and that the security of the cryptographic modules is not compromised.
In this thesis, first the design of a highly reliable resistive random access memory (RRAM) PUF is presented. Compared to existing 1 cell/bit RRAM, here the sum of the read-out currents of multiple RRAM cells are used for generating one response bit. This method statistically minimizes any early-lifetime failure due to RRAM retention degradation at high temperature or under voltage stress. Using a device model that was calibrated using IMEC HfOx RRAM experimental data, it was shown that an 8 cells/bit architecture achieves 99.9999% reliability for a lifetime >10 years at 125℃ . Also, the hardware area overhead of the proposed 8 cells/bit RRAM PUF architecture was smaller than 1 cell/bit RRAM PUF that requires error correction coding to achieve the same reliability.
Next, a basic security primitive is presented, where the RRAM PUF is embedded in the cryptographic module, SHA-256. This architecture is referred to as Embedded PUF or EPUF. EPUF has a security advantage over SHA-256 as it never exposes the PUF response to the outside world. Instead, in each round, the PUF response is used to change a few bits of the message word to produce a unique message digest for each IC. The use of EPUF as a key generation module for AES is also shown. The hardware area requirement for SHA-256 and AES-128 is then analyzed using synthesis results based on TSMC 65nm library. It is shown that the area overhead of 8 cells/bit RRAM PUF is only 1.08% of the SHA-256 module and 0.04% of the AES-128 module. The security analysis of the PUF based systems is also presented. It is shown that the EPUF-based systems are resistant towards standard attacks on PUFs, and that the security of the cryptographic modules is not compromised.
ContributorsShrivastava, Ayush (Author) / Chakrabarti, Chaitali (Thesis advisor) / Yu, Shimeng (Committee member) / Cao, Yu (Committee member) / Arizona State University (Publisher)
Created2015
Description
Soft magnetic materials have been studied extensively in the recent past due to their applications in micro-transformers, micro-inductors, spin dependent memories etc. The unique features of these materials are the high frequency operability and high magnetic anisotropy. High uniaxial anisotropy is one of the most important properties for these materials. There are many methods to achieve high anisotropy energy (Hk) which include sputtering with presence of magnetic field, exchange bias and oblique angle sputtering.
This research project focuses on analyzing different growth techniques of thin films of Cobalt, Zirconium Tantalum Boron (CZTB) and the quality of the films resulted. The measurements include magnetic moment measurements using a Vibrating Sample Magnetometer, electrical measurements using 4 point resistivity methods and structural characterization using Scanning Electron Microscopy. Subtle changes in the growth mechanism result in different properties of these films and they are most suited for certain applications.
The growth methods presented in this research are oblique angled sputtering with localized magnetic field and oblique sputtering without presence of magnetic field. The uniaxial anisotropy can be controlled by changing the angle during sputtering. The resulting film of CZTB is tested for magnetic anisotropy and soft magnetism at room temperature by using Lakeshore 7500 Vibrating Sample Magnetometer. The results are presented, analyzed and explained using characterization techniques. Future work includes magnetic field presence during deposition, magnetic devices of this film with giga hertz range operating frequencies.
This research project focuses on analyzing different growth techniques of thin films of Cobalt, Zirconium Tantalum Boron (CZTB) and the quality of the films resulted. The measurements include magnetic moment measurements using a Vibrating Sample Magnetometer, electrical measurements using 4 point resistivity methods and structural characterization using Scanning Electron Microscopy. Subtle changes in the growth mechanism result in different properties of these films and they are most suited for certain applications.
The growth methods presented in this research are oblique angled sputtering with localized magnetic field and oblique sputtering without presence of magnetic field. The uniaxial anisotropy can be controlled by changing the angle during sputtering. The resulting film of CZTB is tested for magnetic anisotropy and soft magnetism at room temperature by using Lakeshore 7500 Vibrating Sample Magnetometer. The results are presented, analyzed and explained using characterization techniques. Future work includes magnetic field presence during deposition, magnetic devices of this film with giga hertz range operating frequencies.
ContributorsTummalapalli, Sridutt (Author) / Yu, Hongbin (Thesis advisor) / Jiang, Hanqing (Committee member) / Yu, Shimeng (Committee member) / Arizona State University (Publisher)
Created2015
Description
Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.
ContributorsKao, Wei-Chieh (Author) / Goryll, Michael (Thesis advisor) / Chowdhury, Srabanti (Committee member) / Yu, Hongbin (Committee member) / Marinella, Matthew (Committee member) / Arizona State University (Publisher)
Created2015