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- All Subjects: Electrical Engineering
- Creators: Vittal, Vijay
- Resource Type: Text
- Status: Published
Description
In modern electric power systems, energy management systems (EMSs) are responsi-ble for monitoring and controlling the generation system and transmission networks. State estimation (SE) is a critical `must run successful' component within the EMS software. This is dictated by the high reliability requirements and need to represent the closest real time model for market operations and other critical analysis functions in the EMS. Tradi-tionally, SE is run with data obtained only from supervisory control and data acquisition (SCADA) devices and systems. However, more emphasis on improving the performance of SE drives the inclusion of phasor measurement units (PMUs) into SE input data. PMU measurements are claimed to be more accurate than conventional measurements and PMUs `time stamp' measurements accurately. These widely distributed devices meas-ure the voltage phasors directly. That is, phase information for measured voltages and currents are available. PMUs provide data time stamps to synchronize measurements. Con-sidering the relatively small number of PMUs installed in contemporary power systems in North America, performing SE with only phasor measurements is not feasible. Thus a hy-brid SE, including both SCADA and PMU measurements, is the reality for contemporary power system SE. The hybrid approach is the focus of a number of research papers. There are many practical challenges in incorporating PMUs into SE input data. The higher reporting rates of PMUs as compared with SCADA measurements is one of the salient problems. The disparity of reporting rates raises a question whether buffering the phasor measurements helps to give better estimates of the states. The research presented in this thesis addresses the design of data buffers for PMU data as used in SE applications in electric power systems. The system theoretic analysis is illustrated using an operating electric power system in the southwest part of the USA. Var-ious instances of state estimation data have been used for analysis purposes. The details of the research, results obtained and conclusions drawn are presented in this document.
ContributorsMurugesan, Veerakumar (Author) / Vittal, Vijay (Committee member) / Heydt, Gerald (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2013
Description
The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive, complex, and lengthy. Rapid prototyping and emulation of analog ICs will be significant in the design and testing of complex analog systems. A new approach, Programmable ANalog Device Array (PANDA) that maps any AMS design problem to a transistor-level programmable hardware, is proposed. This approach enables fast system level validation and a reduction in post-Silicon bugs, minimizing design risk and cost. The unique features of the approach include 1) transistor-level programmability that emulates each transistor behavior in an analog design, achieving very fine granularity of reconfiguration; 2) programmable switches that are treated as a design component during analog transistor emulating, and optimized with the reconfiguration matrix; 3) compensation of AC performance degradation through boosting the bias current. Based on these principles, a digitally controlled PANDA platform is designed at 45nm node that can map AMS modules across 22nm to 90nm technology nodes. A systematic emulation approach to map any analog transistor to 45nm PANDA cell is proposed, which achieves transistor level matching accuracy of less than 5% for ID and less than 10% for Rout and Gm. Circuit level analog metrics of a voltage-controlled oscillator (VCO) emulated by PANDA, match to those of the original designs in 22nm and 90nm nodes with less than a 5% error. Several other 90nm and 22nm analog blocks are successfully emulated by the 45nm PANDA platform, including a folded-cascode operational amplifier and a sample-and-hold module (S/H). Further capabilities of PANDA are demonstrated by the first full-chip silicon of PANDA which is implemented on 65nm process This system consists of a 24×25 cell array, reconfigurable interconnect and configuration memory. The voltage and current reference circuits, op amps and a VCO with a phase interpolation circuit are emulated by PANDA.
ContributorsSuh, Jounghyuk (Author) / Bakkaloglu, Bertan (Thesis advisor) / Cao, Yu (Committee member) / Ozev, Sule (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
With growing complexity of power grid interconnections, power systems may become increasingly vulnerable to low frequency oscillations (especially inter-area oscillations) and dependent on stabilizing controls using either local signals or wide-area signals to provide adequate damping. In recent years, the ability and potential to use wide-area signals for control purposes has increased since a significant investment has been made in the U. S. in deploying synchrophasor measurement technology. Fast and reliable communication systems are essential to enable the use of wide-area signals in controls. If wide-area signals find increased applicability in controls the security and reliability of power systems could be vulnerable to disruptions in communication systems. Even though numerous modern techniques have been developed to lower the probability of communication errors, communication networks cannot be designed to be always reliable. Given this background the motivation of this work is to build resiliency in the power grid controls to respond to failures in the communication network when wide-area control signals are used. In addition, this work also deals with the delay uncertainty associated with the wide-area signal transmission. In order to counteract the negative impact of communication failures on control effectiveness, two approaches are proposed and both approaches are motivated by considering the use of a robustly designed supplementary damping control (SDC) framework associated with a static VAr compensator (SVC). When there is no communication failure, the designed controller guarantees enhanced improvement in damping performance. When the wide-area signal in use is lost due to a communication failure, however, the resilient control provides the required damping of the inter-area oscillations by either utilizing another wide-area measurement through a healthy communication route or by simply utilizing an appropriate local control signal. Simulation results prove that with either of the proposed controls included, the system is stabilized regardless of communication failures, and thereby the reliability and sustainability of power systems is improved. The proposed approaches can be extended without loss of generality to the design of any resilient controller in cyber-physical engineering systems.
ContributorsZhang, Song (Author) / Vittal, Vijay (Thesis advisor) / Heydt, Gerald (Committee member) / Si, Jennie (Committee member) / Undrill, John (Committee member) / Arizona State University (Publisher)
Created2014
Description
There is an ever growing need for larger memories which are reliable and fast. New technologies to implement non-volatile memories which are large, fast, compact and cost-efficient are being studied extensively. One of the most promising technologies being developed is the resistive RAM (ReRAM). In ReRAM the resistance of the device varies with the voltage applied across it. Programmable metallization cells (PMC) is one of the devices belonging to this category of non-volatile memories.
In order to advance the development of these devices, there is a need to develop simulation models which replicate the behavior of these devices in circuits. In this thesis, a verilogA model for the PMC has been developed. The behavior of the model has been tested using DC and transient simulations. Experimental data obtained from testing PMC devices fabricated at Arizona State University have been compared to results obtained from simulation.
A basic memory cell known as the 1T 1R cell built using the PMC has also been simulated and verified. These memory cells have the potential to be building blocks of large scale memories. I believe that the verilogA model developed in this thesis will prove to be a powerful tool for researchers and circuit developers looking to develop non-volatile memories using alternative technologies.
In order to advance the development of these devices, there is a need to develop simulation models which replicate the behavior of these devices in circuits. In this thesis, a verilogA model for the PMC has been developed. The behavior of the model has been tested using DC and transient simulations. Experimental data obtained from testing PMC devices fabricated at Arizona State University have been compared to results obtained from simulation.
A basic memory cell known as the 1T 1R cell built using the PMC has also been simulated and verified. These memory cells have the potential to be building blocks of large scale memories. I believe that the verilogA model developed in this thesis will prove to be a powerful tool for researchers and circuit developers looking to develop non-volatile memories using alternative technologies.
ContributorsBharadwaj, Vineeth (Author) / Barnaby, Hugh (Thesis advisor) / Kozicki, Michael (Committee member) / Mikkola, Esko (Committee member) / Arizona State University (Publisher)
Created2014
Description
Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which is referred to as programmable metallization cell (PMC), conductive bridge RAM (CBRAM), or electrochemical metallization memory (ECM), which is likely to surpass flash memory in all the ideal memory characteristics. A comprehensive physics-based model is needed to completely understand PMC operation and assist in design optimization.
To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities.
The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior.
The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.
To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities.
The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior.
The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.
ContributorsRajabi, Saba (Author) / Barnaby, Hugh (Thesis advisor) / Kozicki, Michael (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2014
Description
A new loop configuration capable of reducing power radiation magnitudes lower than conventional loops has been developed. This configuration is demonstrated for the case of two coaxial loops of 0.1 meter radius coupled via the magnetic reactive field. Utilizing electromagnetism theory, techniques from antenna design and a new near field design initiative, the ability to design a magnetic field has been investigated by using a full wave simulation tool. The method for realization is initiated from first order physics model, ADS and onto a full wave situation tool for the case of a non-radiating helical loop. The exploration into the design of a magnetic near field while mitigating radiation power is demonstrated using an real number of twists to form a helical wire loop while biasing the integer twisted loop in a non-conventional moebius termination. The helix loop setup as a moebius loop convention can also be expressed as a shorted antenna scheme. The 0.1 meter radius helix antenna is biased with a 1MHz frequency that categorized the antenna loop as electrically small. It is then demonstrated that helical configuration reduces the electric field and mitigates power radiation into the far field. In order to compare the radiated power reduction performance of the helical loop a shielded loop is used as a baseline for comparison. The shielded loop system of the same geometric size and frequency is shown to have power radiation expressed as -46.1 dBm. The power radiated mitigation method of the helix loop reduces the power radiated from the two loop system down to -98.72 dBm.
ContributorsMoreno, Fernando (Author) / Diaz, Rodolfo (Thesis advisor) / Aberle, James T., 1961- (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2015
Description
An important operating aspect of all transmission systems is power system stability
and satisfactory dynamic performance. The integration of renewable resources in general, and photovoltaic resources in particular into the grid has created new engineering issues. A particularly problematic operating scenario occurs when conventional generation is operated at a low level but photovoltaic solar generation is at a high level. Significant solar photovoltaic penetration as a renewable resource is becoming a reality in some electric power systems. In this thesis, special attention is given to photovoltaic generation in an actual electric power system: increased solar penetration has resulted in significant strides towards meeting renewable portfolio standards. The impact of solar generation integration on power system dynamics is studied and evaluated.
This thesis presents the impact of high solar penetration resulting in potentially
problematic low system damping operating conditions. This is the case because the power system damping provided by conventional generation may be insufficient due to reduced system inertia and change in power flow patterns affecting synchronizing and damping capability in the AC system. This typically occurs because conventional generators are rescheduled or shut down to allow for the increased solar production. This problematic case may occur at any time of the year but during the springtime months of March-May, when the system load is low and the ambient temperature is relatively low, there is the potential that over voltages may occur in the high voltage transmission system. Also, reduced damping in system response to disturbances may occur. An actual case study is considered in which real operating system data are used. Solutions to low damping cases are discussed and a solution based on the retuning of a conventional power system stabilizer is given in the thesis.
and satisfactory dynamic performance. The integration of renewable resources in general, and photovoltaic resources in particular into the grid has created new engineering issues. A particularly problematic operating scenario occurs when conventional generation is operated at a low level but photovoltaic solar generation is at a high level. Significant solar photovoltaic penetration as a renewable resource is becoming a reality in some electric power systems. In this thesis, special attention is given to photovoltaic generation in an actual electric power system: increased solar penetration has resulted in significant strides towards meeting renewable portfolio standards. The impact of solar generation integration on power system dynamics is studied and evaluated.
This thesis presents the impact of high solar penetration resulting in potentially
problematic low system damping operating conditions. This is the case because the power system damping provided by conventional generation may be insufficient due to reduced system inertia and change in power flow patterns affecting synchronizing and damping capability in the AC system. This typically occurs because conventional generators are rescheduled or shut down to allow for the increased solar production. This problematic case may occur at any time of the year but during the springtime months of March-May, when the system load is low and the ambient temperature is relatively low, there is the potential that over voltages may occur in the high voltage transmission system. Also, reduced damping in system response to disturbances may occur. An actual case study is considered in which real operating system data are used. Solutions to low damping cases are discussed and a solution based on the retuning of a conventional power system stabilizer is given in the thesis.
ContributorsPethe, Anushree Sanjeev (Author) / Vittal, Vijay (Thesis advisor) / Heydt, Gerald T (Thesis advisor) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2015
Description
An increase in the number of inverter-interfaced photovoltaic (PV) generators on existing distribution feeders affects the design, operation, and control of the distri- bution systems. Existing distribution system analysis tools are capable of supporting only snapshot and quasi-static analyses. Capturing the dynamic effects of the PV generators during the variation in the distribution system states is necessary when studying the effects of controller bandwidths, multiple voltage correction devices, and anti-islanding. This work explores the use of dynamic phasors and differential algebraic equations (DAE) for impact analysis of the PV generators on the existing distribution feeders.
The voltage unbalance induced by PV generators can aggravate the existing unbalance due to load mismatch. An increased phase unbalance significantly adds to the neutral currents, excessive neutral to ground voltages and violate the standards for unbalance factor. The objective of this study is to analyze and quantify the impacts of unbalanced PV installations on a distribution feeder. Additionally, a power electronic converter solution is proposed to mitigate the identified impacts and validate the solution's effectiveness through detailed simulations in OpenDSS.
The benefits associated with the use of energy storage systems for electric- utility-related applications are also studied. This research provides a generalized framework for strategic deployment of a lithium-ion based energy storage system to increase their benefits in a distribution feeder. A significant amount of work has been performed for a detailed characterization of the life cycle costs of an energy storage system. The objectives include - reduction of the substation transformer losses, reduction of the life cycle cost for an energy storage system, and accommodate the PV variability.
The distribution feeder laterals in the distribution feeder with relatively high PV generation as compared to the load can be operated as microgrids to achieve reliability, power quality and economic benefits. However, the renewable resources are intermittent and stochastic in nature. A novel approach for sizing and scheduling the energy storage system and microtrubine is proposed for reliable operation of microgrids. The size and schedule of the energy storage system and microturbine are determined using Benders' decomposition, considering the PV generation as a stochastic resource.
The voltage unbalance induced by PV generators can aggravate the existing unbalance due to load mismatch. An increased phase unbalance significantly adds to the neutral currents, excessive neutral to ground voltages and violate the standards for unbalance factor. The objective of this study is to analyze and quantify the impacts of unbalanced PV installations on a distribution feeder. Additionally, a power electronic converter solution is proposed to mitigate the identified impacts and validate the solution's effectiveness through detailed simulations in OpenDSS.
The benefits associated with the use of energy storage systems for electric- utility-related applications are also studied. This research provides a generalized framework for strategic deployment of a lithium-ion based energy storage system to increase their benefits in a distribution feeder. A significant amount of work has been performed for a detailed characterization of the life cycle costs of an energy storage system. The objectives include - reduction of the substation transformer losses, reduction of the life cycle cost for an energy storage system, and accommodate the PV variability.
The distribution feeder laterals in the distribution feeder with relatively high PV generation as compared to the load can be operated as microgrids to achieve reliability, power quality and economic benefits. However, the renewable resources are intermittent and stochastic in nature. A novel approach for sizing and scheduling the energy storage system and microtrubine is proposed for reliable operation of microgrids. The size and schedule of the energy storage system and microturbine are determined using Benders' decomposition, considering the PV generation as a stochastic resource.
ContributorsNagarajan, Adarsh (Author) / Ayyanar, Raja (Thesis advisor) / Vittal, Vijay (Committee member) / Heydt, Gerald (Committee member) / Karady, George G. (Committee member) / Arizona State University (Publisher)
Created2015
Description
This work explores how flexible electronics and display technology can be applied to develop new biomedical devices for medical, biological, and life science applications. It demonstrates how new biomedical devices can be manufactured by only modifying or personalizing the upper layers of a conventional thin film transistor (TFT) display process. This personalization was applied first to develop and demonstrate the world's largest flexible digital x-ray detector for medical and industrial imaging, and the world's first flexible ISFET pH biosensor using TFT technology. These new, flexible, digital x-ray detectors are more durable than conventional glass substrate x-ray detectors, and also can conform to the surface of the object being imaged. The new flexible ISFET pH biosensors are >10X less expensive to manufacture than comparable CMOS-based ISFETs and provide a sensing area that is orders of magnitude larger than CMOS-based ISFETs. This allows for easier integration with area intensive chemical and biological recognition material as well as allow for a larger number of unique recognition sites for low cost multiple disease and pathogen detection.
The flexible x-ray detector technology was then extended to demonstrate the viability of a new technique to seamlessly combine multiple smaller flexible x-ray detectors into a single very large, ultimately human sized, composite x-ray detector for new medical imaging applications such as single-exposure, low-dose, full-body digital radiography. Also explored, is a new approach to increase the sensitivity of digital x-ray detectors by selectively disabling rows in the active matrix array that are not part of the imaged region. It was then shown how high-resolution, flexible, organic light-emitting diode display (OLED) technology can be used to selectively stimulate and/or silence small groups of neurons on the cortical surface or within the deep brain as a potential new tool to diagnose and treat, as well as understand, neurological diseases and conditions. This work also explored the viability of a new miniaturized high sensitivity fluorescence measurement-based lab-on-a-chip optical biosensor using OLED display and a-Si:H PiN photodiode active matrix array technology for point-of-care diagnosis of multiple disease or pathogen biomarkers in a low cost disposable configuration.
The flexible x-ray detector technology was then extended to demonstrate the viability of a new technique to seamlessly combine multiple smaller flexible x-ray detectors into a single very large, ultimately human sized, composite x-ray detector for new medical imaging applications such as single-exposure, low-dose, full-body digital radiography. Also explored, is a new approach to increase the sensitivity of digital x-ray detectors by selectively disabling rows in the active matrix array that are not part of the imaged region. It was then shown how high-resolution, flexible, organic light-emitting diode display (OLED) technology can be used to selectively stimulate and/or silence small groups of neurons on the cortical surface or within the deep brain as a potential new tool to diagnose and treat, as well as understand, neurological diseases and conditions. This work also explored the viability of a new miniaturized high sensitivity fluorescence measurement-based lab-on-a-chip optical biosensor using OLED display and a-Si:H PiN photodiode active matrix array technology for point-of-care diagnosis of multiple disease or pathogen biomarkers in a low cost disposable configuration.
ContributorsSmith, Joseph T. (Author) / Allee, David (Thesis advisor) / Goryll, Michael (Committee member) / Kozicki, Michael (Committee member) / Blain Christen, Jennifer (Committee member) / Couture, Aaron (Committee member) / Arizona State University (Publisher)
Created2014
Description
Several state of the art, monitoring and control systems, such as DC motor
controllers, power line monitoring and protection systems, instrumentation systems and battery monitors require direct digitization of a high voltage input signals. Analog-to-Digital Converters (ADCs) that can digitize high voltage signals require high linearity and low voltage coefficient capacitors. A built in self-calibration and digital-trim algorithm correcting static mismatches in Capacitive Digital-to-Analog Converter (CDAC) used in Successive Approximation Register Analog to Digital Converters (SARADCs) is proposed. The algorithm uses a dynamic error correction (DEC) capacitor to cancel the static errors occurring in each capacitor of the array as the first step upon power-up and eliminates the need for an extra calibration DAC. Self-trimming is performed digitally during normal ADC operation. The algorithm is implemented on a 14-bit high-voltage input range SAR ADC with integrated dynamic error correction capacitors. The IC is fabricated in 0.6-um high voltage compliant CMOS process, accepting up to 24Vpp differential input signal. The proposed approach achieves 73.32 dB Signal to Noise and Distortion Ratio (SNDR) which is an improvement of 12.03 dB after self-calibration at 400 kS/s sampling rate, consuming 90-mW from a +/-15V supply. The calibration circuitry occupies 28% of the capacitor DAC, and consumes less than 15mW during operation. Measurement results shows that this algorithm reduces INL from as high as 7 LSBs down to 1 LSB and it works even in the presence of larger mismatches exceeding 260 LSBs. Similarly, it reduces DNL errors from 10 LSBs down to 1 LSB. The ADC occupies an active area of 9.76 mm2.
controllers, power line monitoring and protection systems, instrumentation systems and battery monitors require direct digitization of a high voltage input signals. Analog-to-Digital Converters (ADCs) that can digitize high voltage signals require high linearity and low voltage coefficient capacitors. A built in self-calibration and digital-trim algorithm correcting static mismatches in Capacitive Digital-to-Analog Converter (CDAC) used in Successive Approximation Register Analog to Digital Converters (SARADCs) is proposed. The algorithm uses a dynamic error correction (DEC) capacitor to cancel the static errors occurring in each capacitor of the array as the first step upon power-up and eliminates the need for an extra calibration DAC. Self-trimming is performed digitally during normal ADC operation. The algorithm is implemented on a 14-bit high-voltage input range SAR ADC with integrated dynamic error correction capacitors. The IC is fabricated in 0.6-um high voltage compliant CMOS process, accepting up to 24Vpp differential input signal. The proposed approach achieves 73.32 dB Signal to Noise and Distortion Ratio (SNDR) which is an improvement of 12.03 dB after self-calibration at 400 kS/s sampling rate, consuming 90-mW from a +/-15V supply. The calibration circuitry occupies 28% of the capacitor DAC, and consumes less than 15mW during operation. Measurement results shows that this algorithm reduces INL from as high as 7 LSBs down to 1 LSB and it works even in the presence of larger mismatches exceeding 260 LSBs. Similarly, it reduces DNL errors from 10 LSBs down to 1 LSB. The ADC occupies an active area of 9.76 mm2.
ContributorsThirunakkarasu, Shankar (Author) / Bakkaloglu, Bertan (Thesis advisor) / Garrity, Douglas (Committee member) / Kozicki, Michael (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2014