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Description
Ordered mesoporous materials have tunable pore sizes between 2 and 50 nm and are characterized by ordered pore structures and high surface areas (~1000 m2/g). This makes them particularly favorable for a number of membrane applications such as protein separation, polymer extrusion, nanowire fabrication and membrane reactors. These membranes can

Ordered mesoporous materials have tunable pore sizes between 2 and 50 nm and are characterized by ordered pore structures and high surface areas (~1000 m2/g). This makes them particularly favorable for a number of membrane applications such as protein separation, polymer extrusion, nanowire fabrication and membrane reactors. These membranes can be fabricated as top-layers on macroporous supports or as embedded membranes in a dense matrix. The first part of the work deals with the hydrothermal synthesis and water-vapor/oxygen separation properties of supported MCM-48 and a new Al-MCM-48 type membrane for potential use in air conditioning systems. Knudsen-type permeation is observed in these membranes. The combined effect of capillary condensation and the aluminosilicate matrix resulted in the highest separation factor (142) in Al-MCM-48 membranes, with a water vapor permeance of 6×10-8mol/m2Pas. The second part focuses on synthesis of embedded mesoporous silica membranes with helically ordered pores by a novel Counter Diffusion Self-Assembly (CDSA) method. This method is an extension of the interfacial synthesis method for fiber synthesis using tetrabutylorthosilicate (TBOS) and cetyltrimethylammonium bromide (CTAB) as the silica source and surfactant respectively. The initial part of this study determined the effect of TBOS height and humidity on fiber formation. From this study, the range of TBOS heights for best microscopic and macroscopic ordering were established. Next, the CDSA method was used to successfully synthesize membranes, which were characterized to have good support plugging and an ordered pore structure. Factors that influence membrane synthesis and plug microstructure were determined. SEM studies revealed the presence of gaps between the plugs and support pores, which occur due to shrinking of the plug on drying. Development of a novel liquid deposition method to seal these defects constituted the last part of this work. Post sealing, excess silica was removed by etching with hydrofluoric acid. Membrane quality was evaluated at each step using SEM and gas permeation measurements. After surfactant removal by liquid extraction, the membranes exhibited an O2 permeance of 1.65x10-6mol/m2.Pa.s and He/O2 selectivity of 3.30. The successful synthesis of this membrane is an exciting new development in the area of ordered mesoporous membrane technology.
ContributorsSeshadri, Shriya (Author) / Lin, Jerry Y. S. (Thesis advisor) / Dai, Lenore (Committee member) / Rege, Kaushal (Committee member) / Smith, David J. (Committee member) / Vogt, Bryan (Committee member) / Arizona State University (Publisher)
Created2011
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Description
III-nitride alloys are wide band gap semiconductors with a broad range of applications in optoelectronic devices such as light emitting diodes and laser diodes. Indium gallium nitride light emitting diodes have been successfully produced over the past decade. But the progress of green emission light emitting devices has been limited

III-nitride alloys are wide band gap semiconductors with a broad range of applications in optoelectronic devices such as light emitting diodes and laser diodes. Indium gallium nitride light emitting diodes have been successfully produced over the past decade. But the progress of green emission light emitting devices has been limited by the incorporation of indium in the alloy, mainly due to phase separation. This difficulty could be addressed by studying the growth and thermodynamics of these alloys. Knowledge of thermodynamic phase stabilities and of pressure - temperature - composition phase diagrams is important for an understanding of the boundary conditions of a variety of growth techniques. In this dissertation a study of the phase separation of indium gallium nitride is conducted using a regular solution model of the ternary alloy system. Graphs of Gibbs free energy of mixing were produced for a range of temperatures. Binodal and spinodal decomposition curves show the stable and unstable regions of the alloy in equilibrium. The growth of gallium nitride and indium gallium nitride was attempted by the reaction of molten gallium - indium alloy with ammonia at atmospheric pressure. Characterization by X-ray diffraction, photoluminescence, and secondary electron microscopy show that the samples produced by this method contain only gallium nitride in the hexagonal phase. The instability of indium nitride at the temperatures required for activation of ammonia accounts for these results. The photoluminescence spectra show a correlation between the intensity of a broad green emission, related to native defects, and indium composition used in the molten alloy. A different growth method was used to grow two columnar-structured gallium nitride films using ammonium chloride and gallium as reactants and nitrogen and ammonia as carrier gasses. Investigation by X-ray diffraction and spatially-resolved cathodoluminescence shows the film grown at higher temperature to be primarily hexagonal with small quantities of cubic crystallites, while the one grown at lower temperature to be pure hexagonal. This was also confirmed by low temperature photoluminescence measurements. The results presented here show that cubic and hexagonal crystallites can coexist, with the cubic phase having a much sharper and stronger luminescence. Controlled growth of the cubic phase GaN crystallites can be of use for high efficiency light detecting and emitting devices. The ammonolysis of a precursor was used to grow InGaN powders with different indium composition. High purity hexagonal GaN and InN were obtained. XRD spectra showed complete phase separation for samples with x < 30%, with ~ 9% indium incorporation in the 30% sample. The presence of InGaN in this sample was confirmed by PL measurements, where luminescence from both GaN and InGaN band edge are observed. The growth of higher indium compositions samples proved to be difficult, with only the presence of InN in the sample. Nonetheless, by controlling parameters like temperature and time may lead to successful growth of this III-nitride alloy by this method.
ContributorsHill, Arlinda (Author) / Ponce, Fernando A. (Thesis advisor) / Chamberlin, Ralph V (Committee member) / Sankey, Otto F (Committee member) / Smith, David J. (Committee member) / Tsen, Kong-Thon (Committee member) / Arizona State University (Publisher)
Created2011
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Description
HgCdTe is the dominant material currently in use for infrared (IR) focal-plane-array (FPA) technology. In this dissertation, transmission electron microscopy (TEM) was used for the characterization of epitaxial HgCdTe epilayers and HgCdTe-based devices. The microstructure of CdTe surface passivation layers deposited either by hot-wall epitaxy (HWE) or molecular beam epitaxy

HgCdTe is the dominant material currently in use for infrared (IR) focal-plane-array (FPA) technology. In this dissertation, transmission electron microscopy (TEM) was used for the characterization of epitaxial HgCdTe epilayers and HgCdTe-based devices. The microstructure of CdTe surface passivation layers deposited either by hot-wall epitaxy (HWE) or molecular beam epitaxy (MBE) on HgCdTe heterostructures was evaluated. The as-deposited CdTe passivation layers were polycrystalline and columnar. The CdTe grains were larger and more irregular when deposited by HWE, whereas those deposited by MBE were generally well-textured with mostly vertical grain boundaries. Observations and measurements using several TEM techniques showed that the CdTe/HgCdTe interface became considerably more abrupt after annealing, and the crystallinity of the CdTe layer was also improved. The microstructure and compositional profiles of CdTe(211)B/ZnTe/Si(211) heterostructures grown by MBE was investigated. Many inclined {111}-type stacking faults were present throughout the thin ZnTe layer, terminating near the point of initiation of CdTe growth. A rotation angle of about 3.5° was observed between lattice planes of the Si substrate and the final CdTe epilayer. Lattice parameter measurement and elemental profiles indicated that some local intermixing of Zn and Cd had taken place. The average widths of the ZnTe layer and the (Cd, Zn)Te transition region were found to be roughly 6.5 nm and 3.5 nm, respectively. Initial observations of CdTe(211)B/GaAs(211) heterostructures indicated much reduced defect densities near the vicinity of the substrate and within the CdTe epilayers. HgCdTe epilayers grown on CdTe(211)B/GaAs(211) composite substrate were generally of high quality, despite the presence of precipitates at the HgCdTe/CdTe interface. The microstructure of HgCdSe thin films grown by MBE on ZnTe/Si(112) and GaSb(112) substrates were investigated. The quality of the HgCdSe growth was dependent on the growth temperature and materials flux, independent of the substrate. The materials grown at 100°C were generally of high quality, while those grown at 140°C had {111}-type stacking defects and high dislocation densities. For epitaxial growth of HgCdSe on GaSb substrates, better preparation of the GaSb buffer layer will be essential in order to ensure that high-quality HgCdSe can be grown.
ContributorsZhao, Wenfeng (Author) / Smith, David J. (Thesis advisor) / McCartney, Martha (Committee member) / Carpenter, Ray (Committee member) / Bennett, Peter (Committee member) / Treacy, Michael J. (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Radio frequency (RF) transceivers require a disproportionately high effort in terms of test development time, test equipment cost, and test time. The relatively high test cost stems from two contributing factors. First, RF transceivers require the measurement of a diverse set of specifications, requiring multiple test set-ups and long test

Radio frequency (RF) transceivers require a disproportionately high effort in terms of test development time, test equipment cost, and test time. The relatively high test cost stems from two contributing factors. First, RF transceivers require the measurement of a diverse set of specifications, requiring multiple test set-ups and long test times, which complicates load-board design, debug, and diagnosis. Second, high frequency operation necessitates the use of expensive equipment, resulting in higher per second test time cost compared with mixed-signal or digital circuits. Moreover, in terms of the non-recurring engineering cost, the need to measure complex specfications complicates the test development process and necessitates a long learning process for test engineers. Test time is dominated by changing and settling time for each test set-up. Thus, single set-up test solutions are desirable. Loop-back configuration where the transmitter output is connected to the receiver input are used as the desirable test set- up for RF transceivers, since it eliminates the reliance on expensive instrumentation for RF signal analysis and enables measuring multiple parameters at once. In-phase and Quadrature (IQ) imbalance, non-linearity, DC offset and IQ time skews are some of the most detrimental imperfections in transceiver performance. Measurement of these parameters in the loop-back mode is challenging due to the coupling between the receiver (RX) and transmitter (TX) parameters. Loop-back based solutions are proposed in this work to resolve this issue. A calibration algorithm for a subset of the above mentioned impairments is also presented. Error Vector Magnitude (EVM) is a system-level parameter that is specified for most advanced communication standards. EVM measurement often takes extensive test development efforts, tester resources, and long test times. EVM is analytically related to system impairments, which are typically measured in a production test i environment. Thus, EVM test can be eliminated from the test list if the relations between EVM and system impairments are derived independent of the circuit implementation and manufacturing process. In this work, the focus is on the WLAN standard, and deriving the relations between EVM and three of the most detrimental impairments for QAM/OFDM based systems (IQ imbalance, non-linearity, and noise). Having low cost test techniques for measuring the RF transceivers imperfections and being able to analytically compute EVM from the measured parameters is a complete test solution for RF transceivers. These techniques along with the proposed calibration method can be used in improving the yield by widening the pass/fail boundaries for transceivers imperfections. For all of the proposed methods, simulation and hardware measurements prove that the proposed techniques provide accurate characterization of RF transceivers.
ContributorsNassery, Afsaneh (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kiaei, Sayfe (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2013
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Description
Synchronous buck converters have become the obvious choice of design for high efficiency voltage down-conversion applications and find wide scale usage in today's IC industry. The use of digital control in synchronous buck converters is becoming increasingly popular because of its associated advantages over traditional analog counterparts in terms of

Synchronous buck converters have become the obvious choice of design for high efficiency voltage down-conversion applications and find wide scale usage in today's IC industry. The use of digital control in synchronous buck converters is becoming increasingly popular because of its associated advantages over traditional analog counterparts in terms of design flexibility, reduced use of off-chip components, and better programmability to enable advanced controls. They also demonstrate better immunity to noise, enhances tolerance to the process, voltage and temperature (PVT) variations, low chip area and as a result low cost. It enables processing in digital domain requiring a need of analog-digital interfacing circuit viz. Analog to Digital Converter (ADC) and Digital to Analog Converter (DAC). A Digital to Pulse Width Modulator (DPWM) acts as time domain DAC required in the control loop to modulate the ON time of the Power-MOSFETs. The accuracy and efficiency of the DPWM creates the upper limit to the steady state voltage ripple of the DC - DC converter and efficiency in low load conditions. This thesis discusses the prevalent architectures for DPWM in switched mode DC - DC converters. The design of a Hybrid DPWM is presented. The DPWM is 9-bit accurate and is targeted for a Synchronous Buck Converter with a switching frequency of 1.0 MHz. The design supports low power mode(s) for the buck converter in the Pulse Frequency Modulation (PFM) mode as well as other fail-safe features. The design implementation is digital centric making it robust across PVT variations and portable to lower technology nodes. Key target of the design is to reduce design time. The design is tested across large Process (+/- 3σ), Voltage (1.8V +/- 10%) and Temperature (-55.0 °C to 125 °C) and is in the process of tape-out.
ContributorsKumar, Amit (Author) / Bakkaloglu, Bertan (Thesis advisor) / Song, Hongjiang (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2013
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Description
HgCdTe is currently the dominant material for infrared sensing and imaging, and is usually grown on lattice-matched bulk CdZnTe (CZT) substrates. There have been significant recent efforts to identify alternative substrates to CZT as well as alternative detector materials to HgCdTe. In this dissertation research, a wide range of transmission

HgCdTe is currently the dominant material for infrared sensing and imaging, and is usually grown on lattice-matched bulk CdZnTe (CZT) substrates. There have been significant recent efforts to identify alternative substrates to CZT as well as alternative detector materials to HgCdTe. In this dissertation research, a wide range of transmission electron microscopy (TEM) imaging and analytical techniques was used in the characterization of epitaxial HgCdTe and related materials and substrates for third generation IR detectors. ZnTe layers grown on Si substrates are considered to be promising candidates for lattice-matched, large-area, and low-cost composite substrates for deposition of II-VI and III-V compound semiconductors with lattice constants near 6.1 Å. After optimizing MBE growth conditions including substrate pretreatment prior to film growth, as well as nucleation and growth temperatures, thick ZnTe/Si films with high crystallinity, low defect density, and excellent surface morphology were achieved. Changes in the Zn/Te flux ratio used during growth were also investigated. Small-probe microanalysis confirmed that a small amount of As was present at the ZnTe/Si interface. A microstructural study of HgCdTe/CdTe/GaAs (211)B and CdTe/GaAs (211)B heterostructures grown using MBE was carried out. High quality MBE-grown CdTe on GaAs(211)B substrates was demonstrated to be a viable composite substrate platform for HgCdTe growth. In addition, analysis of interfacial misfit dislocations and residual strain showed that the CdTe/GaAs interface was fully relaxed. In the case of HgCdTe/CdTe/ GaAs(211)B, thin HgTe buffer layers between HgCdTe and CdTe were also investigated for improving the HgCdTe crystal quality. A set of ZnTe layers epitaxially grown on GaSb(211)B substrates using MBE was studied using high resolution X-ray diffraction (HRXRD) measurements and TEM characterization in order to investigate conditions for defect-free growth. HRXRD results gave critical thickness estimates between 350 nm and 375 nm, in good agreement with theoretical predictions. Moreover, TEM results confirmed that ZnTe layers with thicknesses of 350 nm had highly coherent interfaces and very low dislocation densities, unlike samples with the thicker ZnTe layers.
ContributorsKim, Jae Jin (Author) / Smith, David J. (Thesis advisor) / McCartney, Martha R. (Committee member) / Alford, Terry L. (Committee member) / Crozier, Peter A. (Committee member) / Arizona State University (Publisher)
Created2012
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Description
This thesis describes the design process used in the creation of a two stage cellular power amplifier. A background for understanding amplifier linearity, device properties, and ACLR estimation is provided. An outline of the design goals is given with a focus on linearity with high efficiency. The full design is

This thesis describes the design process used in the creation of a two stage cellular power amplifier. A background for understanding amplifier linearity, device properties, and ACLR estimation is provided. An outline of the design goals is given with a focus on linearity with high efficiency. The full design is broken into smaller elements which are discussed in detail. The main contribution of this thesis is the description of a novel interstage matching network topology for increasing efficiency. Ultimately the full amplifier design is simulated and compared to the measured results and design goals. It was concluded that the design was successful, and used in a commercially available product.
ContributorsSpivey, Erin (Author) / Aberle, James T., 1961- (Thesis advisor) / Kitchen, Jennifer (Committee member) / Ozev, Sule (Committee member) / Arizona State University (Publisher)
Created2012
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Description
High electron mobility transistors (HEMTs) based on Group III-nitride heterostructures have been characterized by advanced electron microscopy methods including off-axis electron holography, nanoscale chemical analysis, and electrical measurements, as well as other techniques. The dissertation was organized primarily into three topical areas: (1) characterization of near-gate defects in electrically stressed

High electron mobility transistors (HEMTs) based on Group III-nitride heterostructures have been characterized by advanced electron microscopy methods including off-axis electron holography, nanoscale chemical analysis, and electrical measurements, as well as other techniques. The dissertation was organized primarily into three topical areas: (1) characterization of near-gate defects in electrically stressed AlGaN/GaN HEMTs, (2) microstructural and chemical analysis of the gate/buffer interface of AlN/GaN HEMTs, and (3) studies of the impact of laser-liftoff processing on AlGaN/GaN HEMTs. The electrical performance of stressed AlGaN/GaN HEMTs was measured and the devices binned accordingly. Source- and drain-side degraded, undegraded, and unstressed devices were then prepared via focused-ion-beam milling for examination. Defects in the near-gate region were identified and their correlation to electrical measurements analyzed. Increased gate leakage after electrical stressing is typically attributed to "V"-shaped defects at the gate edge. However, strong evidence was found for gate metal diffusion into the barrier layer as another contributing factor. AlN/GaN HEMTs grown on sapphire substrates were found to have high electrical performance which is attributed to the AlN barrier layer, and robust ohmic and gate contact processes. TEM analysis identified oxidation at the gate metal/AlN buffer layer interface. This thin a-oxide gate insulator was further characterized by energy-dispersive x-ray spectroscopy and energy-filtered TEM. Attributed to this previously unidentified layer, high reverse gate bias up to −30 V was demonstrated and drain-induced gate leakage was suppressed to values of less than 10−6 A/mm. In addition, extrinsic gm and ft * LG were improved to the highest reported values for AlN/GaN HEMTs fabricated on sapphire substrates. Laser-liftoff (LLO) processing was used to separate the active layers from sapphire substrates for several GaN-based HEMT devices, including AlGaN/GaN and InAlN/GaN heterostructures. Warpage of the LLO samples resulted from relaxation of the as-grown strain and strain arising from dielectric and metal depositions, and this strain was quantified by both Newton's rings and Raman spectroscopy methods. TEM analysis demonstrated that the LLO processing produced no detrimental effects on the quality of the epitaxial layers. TEM micrographs showed no evidence of either damage to the ~2 μm GaN epilayer generated threading defects.
ContributorsJohnson, Michael R. (Author) / Mccartney, Martha R (Thesis advisor) / Smith, David J. (Committee member) / Goodnick, Stephen (Committee member) / Shumway, John (Committee member) / Chen, Tingyong (Committee member) / Arizona State University (Publisher)
Created2012
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Description
Doppler radar can be used to measure respiration and heart rate without contact and through obstacles. In this work, a Doppler radar architecture at 2.4 GHz and a new signal processing algorithm to estimate the respiration and heart rate are presented. The received signal is dominated by the transceiver noise,

Doppler radar can be used to measure respiration and heart rate without contact and through obstacles. In this work, a Doppler radar architecture at 2.4 GHz and a new signal processing algorithm to estimate the respiration and heart rate are presented. The received signal is dominated by the transceiver noise, LO phase noise and clutter which reduces the signal-to-noise ratio of the desired signal. The proposed architecture and algorithm are used to mitigate these issues and obtain an accurate estimate of the heart and respiration rate. Quadrature low-IF transceiver architecture is adopted to resolve null point problem as well as avoid 1/f noise and DC offset due to mixer-LO coupling. Adaptive clutter cancellation algorithm is used to enhance receiver sensitivity coupled with a novel Pattern Search in Noise Subspace (PSNS) algorithm is used to estimate respiration and heart rate. PSNS is a modified MUSIC algorithm which uses the phase noise to enhance Doppler shift detection. A prototype system was implemented using off-the-shelf TI and RFMD transceiver and tests were conduct with eight individuals. The measured results shows accurate estimate of the cardio pulmonary signals in low-SNR conditions and have been tested up to a distance of 6 meters.
ContributorsKhunti, Hitesh Devshi (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Bliss, Daniel (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2013
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Description
This thesis work mainly examined the stability and reliability issues of amorphous Indium Gallium Zinc Oxide (a-IGZO) thin film transistors under bias-illumination stress. Amorphous hydrogenated silicon has been the dominating material used in thin film transistors as a channel layer. However with the advent of modern high performance display technologies,

This thesis work mainly examined the stability and reliability issues of amorphous Indium Gallium Zinc Oxide (a-IGZO) thin film transistors under bias-illumination stress. Amorphous hydrogenated silicon has been the dominating material used in thin film transistors as a channel layer. However with the advent of modern high performance display technologies, it is required to have devices with better current carrying capability and better reproducibility. This brings the idea of new material for channel layer of these devices. Researchers have tried poly silicon materials, organic materials and amorphous mixed oxide materials as a replacement to conventional amorphous silicon layer. Due to its low price and easy manufacturing process, amorphous mixed oxide thin film transistors have become a viable option to replace the conventional ones in order to achieve high performance display circuits. But with new materials emerging, comes the challenge of reliability and stability issues associated with it. Performance measurement under bias stress and bias-illumination stress have been reported previously. This work proposes novel post processing low temperature long time annealing in optimum ambient in order to annihilate or reduce the defects and vacancies associated with amorphous material which lead to the instability or even the failure of the devices. Thin film transistors of a-IGZO has been tested for standalone illumination stress and bias-illumination stress before and after annealing. HP 4155B semiconductor parameter analyzer has been used to stress the devices and measure the output characteristics and transfer characteristics of the devices. Extra attention has been given about the effect of forming gas annealing on a-IGZO thin film. a-IGZO thin film deposited on silicon substrate has been tested for resistivity, mobility and carrier concentration before and after annealing in various ambient. Elastic Recoil Detection has been performed on the films to measure the amount of hydrogen atoms present in the film. Moreover, the circuit parameters of the thin film transistors has been extracted to verify the physical phenomenon responsible for the instability and failure of the devices. Parameters like channel resistance, carrier mobility, power factor has been extracted and variation of these parameters has been observed before and after the stress.
ContributorsRuhul Hasin, Muhammad (Author) / Alford, Terry L. (Thesis advisor) / Krause, Stephen (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2013